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I'd like you to reexamine a change. Please visit
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to look at the new patch set (#5).
Change subject: arch/x86/memmove: Add 64bit version
......................................................................
arch/x86/memmove: Add 64bit version
The 64bit handles 64bit input variables properly.
TESTED: Both qemu and real hardware can use LZ4 properly which use this code
Change-Id: Ib43ec19df97194d6b1c18bfacb5fe8211ba0ffe5
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/arch/x86/Makefile.inc
A src/arch/x86/memmove_64.S
2 files changed, 224 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/69231/5
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Change subject: soc/sifive/ux00ddr.h: Remove set but unused variables
......................................................................
Patch Set 21: Verified-1
(4 comments)
File src/soc/sifive/fu540/ux00ddr.h:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162799):
https://review.coreboot.org/c/coreboot/+/63074/comment/fa2dc29e_df0ed192
PS21, Line 179: /* char slicelsc = '0'; */
code indent should use tabs where possible
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162799):
https://review.coreboot.org/c/coreboot/+/63074/comment/432aaefe_9f79c5f4
PS21, Line 180: /* char slicemsc = '0'; */
code indent should use tabs where possible
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162799):
https://review.coreboot.org/c/coreboot/+/63074/comment/8812ed4d_0652a5f7
PS21, Line 181: /* slicelsc += (dq % 10); */
code indent should use tabs where possible
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162799):
https://review.coreboot.org/c/coreboot/+/63074/comment/5f4becc4_90ca90c0
PS21, Line 182: /* slicemsc += (dq / 10); */
code indent should use tabs where possible
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Change subject: util/sconfig: Expose apic devices
......................................................................
Patch Set 2:
(1 comment)
File src/include/device/device.h:
https://review.coreboot.org/c/coreboot/+/59313/comment/648c16b9_e9cd4fda
PS2, Line 391: config_of_lapic
> sounds legit
Since BSP is not always 0, we may be able to add a bit of syntax to specify that instead. When it's non-zero is that known at build-time or only at runtime?
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Change subject: arch/x86/memmove: Add 64bit version
......................................................................
Patch Set 3: Verified-1
(1 comment)
Commit Message:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162795):
https://review.coreboot.org/c/coreboot/+/69231/comment/39b7ac3b_8de26561
PS3, Line 10:
Possible unwrapped commit description (prefer a maximum 72 chars per line)
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Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69308 )
Change subject: mb/intel/harcuvar: Fix strict prototype warning
......................................................................
mb/intel/harcuvar: Fix strict prototype warning
Clang warns on both the declaration and the definction.
Change-Id: I94d979fcdbe41349c59248656066615bffd215b6
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/mainboard/intel/harcuvar/spd/spd.c
1 file changed, 13 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/69308/1
diff --git a/src/mainboard/intel/harcuvar/spd/spd.c b/src/mainboard/intel/harcuvar/spd/spd.c
index a66c10b..e3912ec 100644
--- a/src/mainboard/intel/harcuvar/spd/spd.c
+++ b/src/mainboard/intel/harcuvar/spd/spd.c
@@ -6,7 +6,7 @@
#include "spd.h"
/* Get SPD data for on-board memory */
-uint8_t *mainboard_find_spd_data()
+uint8_t *mainboard_find_spd_data(void)
{
uint8_t *spd_data;
int spd_index;
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Change subject: nb/intel/ironlake: Remove set but unused variable
......................................................................
Patch Set 3:
(1 comment)
Patchset:
PS2:
> Looks like a bug somewhere...
Do you prefer me to comment it out instead? I'm not going to be able to figure it out as it's outside the scope of this CL.
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Change subject: superio/nuvoton/nct6687d: Fix unexpected expression
......................................................................
Patch Set 6:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/66265/comment/9dbfd0a7_aceaef43
PS5, Line 9: Fix this by
: adding a scope for the switch case.
> This seems outdated
Done
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Hello build bot (Jenkins), Angel Pons,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/69236
to look at the new patch set (#4).
Change subject: configs: Add 64bit buildtest for prodrive/hermes
......................................................................
configs: Add 64bit buildtest for prodrive/hermes
This configuration also boots on real hardware.
Change-Id: Ic62a33f8d8c3fdaa8182e797b2bf6fbed6b55731
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
A configs/config.prodrive_hermes.x86_64
1 file changed, 29 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/69236/4
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Hello build bot (Jenkins), Michał Żygowski, Michał Kopeć, Angel Pons, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/66265
to look at the new patch set (#6).
Change subject: superio/nuvoton/nct6687d: Fix unexpected expression
......................................................................
superio/nuvoton/nct6687d: Fix unexpected expression
Expression after a case statement are not allowed.
This fixes building with clang.
Change-Id: Ie369454f10b515aa5601a5e78330e12f4b7a5e4c
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/superio/nuvoton/nct6687d/superio.c
1 file changed, 16 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/66265/6
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