coreboot-gerrit November 2022

coreboot-gerrit@coreboot.org

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[L] Change in coreboot[master]: Allow to build romstage sources inside the bootblock
by Raul Rangel (Code Review) 07 Nov '22

07 Nov '22

Attention is currently required from: Jakub Czapiga, ron minnich, Paul Menzel, Stefan Reinauer, Julius Werner, Angel Pons, Arthur Heymans, Keith Hui, Patrick Rudolph, Branden Waldner, Martin L Roth, Christian Walter, Felix Held. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55068 ) Change subject: Allow to build romstage sources inside the bootblock ...................................................................... Patch Set 33: (2 comments) File src/lib/asan.c: https://review.coreboot.org/c/coreboot/+/55068/comment/dfece419_0d9c88a3 PS33, Line 19: ENV_SEPARATE_ROMSTAGE Is there anything preventing us from enabling asan in bootblock for AMD platforms? File src/security/vboot/misc.h: https://review.coreboot.org/c/coreboot/+/55068/comment/07a3d54e_167a6906 PS33, Line 52: else if (CONFIG(VBOOT_STARTS_IN_ROMSTAGE)) This condition is duplicated -- To view, visit https://review.coreboot.org/c/coreboot/+/55068 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id68390edc1ba228b121cca89b80c64a92553e284 Gerrit-Change-Number: 55068 Gerrit-PatchSet: 33 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Erik van den Bogaert <ebogaert(a)eltan.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Reviewer: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ron minnich <rminnich(a)chromium.org> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Branden Waldner <scruffy99(a)gmail.com> Gerrit-CC: Keith Hui <buurin(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Attention: ron minnich <rminnich(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Keith Hui <buurin(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Branden Waldner <scruffy99(a)gmail.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 07 Nov 2022 15:54:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/amd/chausie: Correct naming of EC FW
by Fred Reitberger (Code Review) 07 Nov '22

07 Nov '22

Fred Reitberger has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69276 ) Change subject: mb/amd/chausie: Correct naming of EC FW ...................................................................... mb/amd/chausie: Correct naming of EC FW Change the EC FW CBFS filename prefix to a more accurate "ec/" TEST=build and boot chausie Signed-off-by: Fred Reitberger <reitbergerfred(a)gmail.com> Change-Id: Ib9ee24ca06b29c74cc0a91f9e4789df00ba1ba53 --- M src/mainboard/amd/chausie/Kconfig M src/mainboard/amd/chausie/Makefile.inc 2 files changed, 19 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/69276/1 diff --git a/src/mainboard/amd/chausie/Kconfig b/src/mainboard/amd/chausie/Kconfig index c4f7638..da0e0c4 100644 --- a/src/mainboard/amd/chausie/Kconfig +++ b/src/mainboard/amd/chausie/Kconfig @@ -76,7 +76,7 @@ depends on VBOOT_SLOTS_RW_AB || VBOOT_SLOTS_RW_A # Add the EFS and EC to the RO region only # This is a chausie-specific override of soc/amd/mendocino/Kconfig - default "apu/amdfw apu/ecfw" + default "apu/amdfw ec/ecfw" config CHROMEOS # Use default libpayload config diff --git a/src/mainboard/amd/chausie/Makefile.inc b/src/mainboard/amd/chausie/Makefile.inc index b1f93e4..3666db7 100644 --- a/src/mainboard/amd/chausie/Makefile.inc +++ b/src/mainboard/amd/chausie/Makefile.inc @@ -26,10 +26,10 @@ $(call int-subtract, 0xffffffff \ $(CONFIG_ROM_SIZE)) $(CONFIG_CHAUSIE_MCHP_FW_OFFSET) 1) -cbfs-files-y += apu/ecfw -apu/ecfw-file := $(CONFIG_CHAUSIE_MCHP_FW_FILE) -apu/ecfw-position := $(CHAUSIE_EC_POSITION) -apu/ecfw-type := raw +cbfs-files-y += ec/ecfw +ec/ecfw-file := $(CONFIG_CHAUSIE_MCHP_FW_FILE) +ec/ecfw-position := $(CHAUSIE_EC_POSITION) +ec/ecfw-type := raw else files_added:: warn_no_mchp -- To view, visit https://review.coreboot.org/c/coreboot/+/69276 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib9ee24ca06b29c74cc0a91f9e4789df00ba1ba53 Gerrit-Change-Number: 69276 Gerrit-PatchSet: 1 Gerrit-Owner: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: cpu/x86/mp_init.c: Fix the logic to add AP cpus
by Felix Held (Code Review) 07 Nov '22

07 Nov '22

Attention is currently required from: Bill XIE, Paul Menzel. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69215 ) Change subject: cpu/x86/mp_init.c: Fix the logic to add AP cpus ...................................................................... Patch Set 4: (1 comment) Patchset: PS4: since https://review.coreboot.org/c/coreboot/+/58508 the dummy lapic devices aren't needed and should be removed, so it would be better to remove those workarounds instead -- To view, visit https://review.coreboot.org/c/coreboot/+/69215 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1075bc52091e619ef79cbeab0a0f6b57cff1d708 Gerrit-Change-Number: 69215 Gerrit-PatchSet: 4 Gerrit-Owner: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Mon, 07 Nov 2022 15:17:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/amd/mendocino: Enable x86 SHA accelerator
by Felix Held (Code Review) 07 Nov '22

07 Nov '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68954 ) Change subject: soc/amd/mendocino: Enable x86 SHA accelerator ...................................................................... soc/amd/mendocino: Enable x86 SHA accelerator Enable x86 SHA accelerator for use by VBOOT library. This is useful when CBFS verification verifies the hash of the file being loaded in x86. BUG=b:227809919 TEST=Build and boot to OS in Skyrim. Observe a boot time improvement of ~10 ms with CBFS verification enabled. Change-Id: I14efe7be66f28f348330580d2e5733e11603a023 Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68954 Reviewed-by: Yu-Ping Wu <yupingso(a)google.com> Reviewed-by: Raul Rangel <rrangel(a)chromium.org> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/soc/amd/mendocino/Kconfig 1 file changed, 22 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Raul Rangel: Looks good to me, approved Yu-Ping Wu: Looks good to me, approved diff --git a/src/soc/amd/mendocino/Kconfig b/src/soc/amd/mendocino/Kconfig index 3a1a296..9da6138 100644 --- a/src/soc/amd/mendocino/Kconfig +++ b/src/soc/amd/mendocino/Kconfig @@ -102,6 +102,7 @@ select USE_FSP_NOTIFY_PHASE_READY_TO_BOOT select USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE select VBOOT_DEFINE_WIDEVINE_COUNTERS if VBOOT_STARTS_BEFORE_BOOTBLOCK + select VBOOT_X86_SHA256_ACCELERATION if VBOOT select X86_AMD_FIXED_MTRRS select X86_INIT_NEED_1_SIPI -- To view, visit https://review.coreboot.org/c/coreboot/+/68954 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I14efe7be66f28f348330580d2e5733e11603a023 Gerrit-Change-Number: 68954 Gerrit-PatchSet: 6 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: security/vboot: Update build rules using x86 SHA extension
by Felix Held (Code Review) 07 Nov '22

07 Nov '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68953 ) Change subject: security/vboot: Update build rules using x86 SHA extension ...................................................................... security/vboot: Update build rules using x86 SHA extension Currently build rules allow using x86 SHA extensions for all coreboot stages when enabled. On some SoCs where verstage can run in non-x86 environment, x86 SHA extension cannot be used. Update build rules accordingly such that x86 SHA extensions can be used in AMD SoCs. This is particularly useful when CBFS verificiation is enabled which verifies the hash of the CBFS file being loaded. BUG=b:227809919 TEST=Build and boot to OS in Skyrim. Observe that hardware acceleration is used when a CBFS file is loaded and observe an overall improvement of 10 ms. Change-Id: I4f388e963eb82990cda41d3880e66ad937334908 Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68953 Reviewed-by: Raul Rangel <rrangel(a)chromium.org> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Kangheui Won <khwon(a)chromium.org> Reviewed-by: Yu-Ping Wu <yupingso(a)google.com> --- M src/security/vboot/Makefile.inc 1 file changed, 29 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Raul Rangel: Looks good to me, approved Yu-Ping Wu: Looks good to me, approved Kangheui Won: Looks good to me, approved diff --git a/src/security/vboot/Makefile.inc b/src/security/vboot/Makefile.inc index d38fbac..bd73871 100644 --- a/src/security/vboot/Makefile.inc +++ b/src/security/vboot/Makefile.inc @@ -28,7 +28,8 @@ CC="$$(CC_$(1))" \ CFLAGS="$$(VBOOT_CFLAGS_$(1))" VBOOT2="y" \ EC_EFS="$(CONFIG_VBOOT_EC_EFS)" \ - X86_SHA_EXT="$(CONFIG_VBOOT_X86_SHA256_ACCELERATION)" \ + X86_SHA_EXT="$(if $(CONFIG_ARCH_$(call toupper,$(1))_X86_32)$(CONFIG_ARCH_$(call toupper,$(1))_X86_64),$\ + $(CONFIG_VBOOT_X86_SHA256_ACCELERATION))" \ $(MAKE) -C $(VBOOT_SOURCE) \ BUILD=$$(abspath $$(dir $$(VBOOT_LIB_$(1)))) \ V=$(V) \ -- To view, visit https://review.coreboot.org/c/coreboot/+/68953 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4f388e963eb82990cda41d3880e66ad937334908 Gerrit-Change-Number: 68953 Gerrit-PatchSet: 5 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[M] Change in coreboot[master]: soc/amd/morgana/Kconfig: Remove TODO after review
by Fred Reitberger (Code Review) 07 Nov '22

07 Nov '22

Fred Reitberger has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69275 ) Change subject: soc/amd/morgana/Kconfig: Remove TODO after review ...................................................................... soc/amd/morgana/Kconfig: Remove TODO after review Remove TODO comments after reviwing against morgana ppr #57396, rev 1.52 Signed-off-by: Fred Reitberger <reitbergerfred(a)gmail.com> Change-Id: I598daf40a774ec81a956ce8c1aeb1cbbf4b475f3 --- M src/soc/amd/morgana/Kconfig M src/soc/amd/morgana/uart.c 2 files changed, 31 insertions(+), 20 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/69275/1 diff --git a/src/soc/amd/morgana/Kconfig b/src/soc/amd/morgana/Kconfig index 814cb55..ba70fef 100644 --- a/src/soc/amd/morgana/Kconfig +++ b/src/soc/amd/morgana/Kconfig @@ -50,36 +50,37 @@ select SOC_AMD_COMMON_BLOCK_ACPI_CPPC # TODO: Check if this is still correct select SOC_AMD_COMMON_BLOCK_ACPI_GPIO # TODO: Check if this is still correct select SOC_AMD_COMMON_BLOCK_ACPI_IVRS # TODO: Check if this is still correct - select SOC_AMD_COMMON_BLOCK_AOAC # TODO: Check if this is still correct + select SOC_AMD_COMMON_BLOCK_AOAC select SOC_AMD_COMMON_BLOCK_APOB # TODO: Check if this is still correct - select SOC_AMD_COMMON_BLOCK_APOB_HASH # TODO: Check if this is still correct - select SOC_AMD_COMMON_BLOCK_BANKED_GPIOS # TODO: Check if this is still correct - select SOC_AMD_COMMON_BLOCK_DATA_FABRIC # TODO: Check if this is still correct - select SOC_AMD_COMMON_BLOCK_EMMC # TODO: Check if this is still correct + select SOC_AMD_COMMON_BLOCK_APOB_HASH + select SOC_AMD_COMMON_BLOCK_BANKED_GPIOS + select SOC_AMD_COMMON_BLOCK_DATA_FABRIC + select SOC_AMD_COMMON_BLOCK_EMMC select SOC_AMD_COMMON_BLOCK_ESPI_EXTENDED_DECODE_RANGES # TODO: Check if this is still correct select SOC_AMD_COMMON_BLOCK_GRAPHICS # TODO: Check if this is still correct select SOC_AMD_COMMON_BLOCK_HAS_ESPI # TODO: Check if this is still correct select SOC_AMD_COMMON_BLOCK_HAS_ESPI_ALERT_ENABLE # TODO: Check if this is still correct - select SOC_AMD_COMMON_BLOCK_I2C # TODO: Check if this is still correct - select SOC_AMD_COMMON_BLOCK_I23C_PAD_CTRL # TODO: Check if this is still correct - select SOC_AMD_COMMON_BLOCK_IOMMU # TODO: Check if this is still correct + select SOC_AMD_COMMON_BLOCK_I2C + select SOC_AMD_COMMON_BLOCK_I23C_PAD_CTRL + select SOC_AMD_COMMON_BLOCK_IOMMU select SOC_AMD_COMMON_BLOCK_LPC # TODO: Check if this is still correct - select SOC_AMD_COMMON_BLOCK_MCAX # TODO: Check if this is still correct - select SOC_AMD_COMMON_BLOCK_NONCAR # TODO: Check if this is still correct + select SOC_AMD_COMMON_BLOCK_MCAX + select SOC_AMD_COMMON_BLOCK_NONCAR select SOC_AMD_COMMON_BLOCK_PCI # TODO: Check if this is still correct select SOC_AMD_COMMON_BLOCK_PCI_MMCONF # TODO: Check if this is still correct select SOC_AMD_COMMON_BLOCK_PCIE_GPP_DRIVER # TODO: Check if this is still correct - select SOC_AMD_COMMON_BLOCK_PM # TODO: Check if this is still correct - select SOC_AMD_COMMON_BLOCK_PM_CHIPSET_STATE_SAVE # TODO: Check if this is still correct + select SOC_AMD_COMMON_BLOCK_PCIE_CLK_REQ # TODO: Check if this is still correct + select SOC_AMD_COMMON_BLOCK_PM + select SOC_AMD_COMMON_BLOCK_PM_CHIPSET_STATE_SAVE select SOC_AMD_COMMON_BLOCK_PSP_GEN2 # TODO: Check if this is still correct - select SOC_AMD_COMMON_BLOCK_SMBUS # TODO: Check if this is still correct - select SOC_AMD_COMMON_BLOCK_SMI # TODO: Check if this is still correct + select SOC_AMD_COMMON_BLOCK_SMBUS + select SOC_AMD_COMMON_BLOCK_SMI select SOC_AMD_COMMON_BLOCK_SMM # TODO: Check if this is still correct select SOC_AMD_COMMON_BLOCK_SMU # TODO: Check if this is still correct - select SOC_AMD_COMMON_BLOCK_SPI # TODO: Check if this is still correct - select SOC_AMD_COMMON_BLOCK_TSC_FAM17H_19H # TODO: Check if this is still correct - select SOC_AMD_COMMON_BLOCK_UART # TODO: Check if this is still correct - select SOC_AMD_COMMON_BLOCK_UCODE # TODO: Check if this is still correct + select SOC_AMD_COMMON_BLOCK_SPI + select SOC_AMD_COMMON_BLOCK_TSC_FAM17H_19H + select SOC_AMD_COMMON_BLOCK_UART + select SOC_AMD_COMMON_BLOCK_UCODE select SOC_AMD_COMMON_FSP_CCX_CPPC_HOB # TODO: Check if this is still correct select SOC_AMD_COMMON_FSP_DMI_TABLES # TODO: Check if this is still correct select SOC_AMD_COMMON_FSP_PCI # TODO: Check if this is still correct diff --git a/src/soc/amd/morgana/uart.c b/src/soc/amd/morgana/uart.c index 92cb2fe..03fc593 100644 --- a/src/soc/amd/morgana/uart.c +++ b/src/soc/amd/morgana/uart.c @@ -1,7 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -/* TODO: Update for Morgana */ - #include <amdblocks/gpio.h> #include <amdblocks/uart.h> #include <commonlib/helpers.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/69275 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I598daf40a774ec81a956ce8c1aeb1cbbf4b475f3 Gerrit-Change-Number: 69275 Gerrit-PatchSet: 1 Gerrit-Owner: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-MessageType: newchange

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[L] Change in coreboot[master]: mb/system76/adl-p: Add Lemur Pro 11 as a variant
by Tim Crawford (Code Review) 07 Nov '22

07 Nov '22

Attention is currently required from: Tim Crawford, Jeremy Soller, Angel Pons. Hello build bot (Jenkins), Jeremy Soller, Angel Pons, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/65384 to look at the new patch set (#20). Change subject: mb/system76/adl-p: Add Lemur Pro 11 as a variant ...................................................................... mb/system76/adl-p: Add Lemur Pro 11 as a variant The Lemur Pro 11 (lemp11) is an Alder Lake-U board. Tested with a custom TianoCore UefiPayloadPkg. Working: - PS/2 keyboard, touchpad - DIMM slot (with NMSO480E82-3200EA00) - M.2 NVMe SSD (with MZVL2500HCJQ) - M.2 SATA SSD (with WDS100T2B0B) - All USB ports - SD card reader - Webcam - WiFi/Bluetooth - Integrated graphics using Intel GOP driver - HDMI output - DisplayPort output over USB-C - Internal microphone - Internal speakers - Combined headset + mic 3.5mm audio - Booting Pop!_OS Linux 22.04 with kernel 5.18.5 - Internal flashing with flashrom v1.2-703-g76118a7c10ed Not working: - On-board RAM: Requires CB:65567 - Detection of devices in TBT slot on boot - S0ix suspend/resume Change-Id: Ic930df1ebacc8c7ef14dbb6c67a97eddb918b365 Signed-off-by: Tim Crawford <tcrawford(a)system76.com> --- M Documentation/mainboard/index.md A Documentation/mainboard/system76/lemp11.md M src/mainboard/system76/adl-p/Kconfig M src/mainboard/system76/adl-p/Kconfig.name M src/mainboard/system76/adl-p/Makefile.inc A src/mainboard/system76/adl-p/spd/samsung-P4AAF165WA-BCWDE.spd.hex A src/mainboard/system76/adl-p/variants/lemp11/board_info.txt A src/mainboard/system76/adl-p/variants/lemp11/data.vbt A src/mainboard/system76/adl-p/variants/lemp11/gpio.c A src/mainboard/system76/adl-p/variants/lemp11/gpio_early.c A src/mainboard/system76/adl-p/variants/lemp11/hda_verb.c A src/mainboard/system76/adl-p/variants/lemp11/overridetree.cb A src/mainboard/system76/adl-p/variants/lemp11/romstage.c 13 files changed, 592 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/65384/20 -- To view, visit https://review.coreboot.org/c/coreboot/+/65384 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic930df1ebacc8c7ef14dbb6c67a97eddb918b365 Gerrit-Change-Number: 65384 Gerrit-PatchSet: 20 Gerrit-Owner: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Jeremy Soller <jeremy(a)system76.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: mb/system76: Reset Realtek codec before configuring
by Tim Crawford (Code Review) 07 Nov '22

07 Nov '22

Attention is currently required from: Jeremy Soller, Paul Menzel. Tim Crawford has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/66918 ) Change subject: mb/system76: Reset Realtek codec before configuring ...................................................................... Patch Set 5: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/66918/comment/9c6932a8_37524e7d PS4, Line 9: avoid potential issues like : oryp5 had > Please add a reference. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/66918 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I64c1fd23f708f77a81fad0bc889f42d4df3f6e61 Gerrit-Change-Number: 66918 Gerrit-PatchSet: 5 Gerrit-Owner: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jeremy Soller <jeremy(a)system76.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Mon, 07 Nov 2022 14:42:38 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: mb/system76: Reset Realtek codec before configuring
by Tim Crawford (Code Review) 07 Nov '22

07 Nov '22

Attention is currently required from: Tim Crawford, Jeremy Soller. Hello build bot (Jenkins), Jeremy Soller, Paul Menzel, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/66918 to look at the new patch set (#5). Change subject: mb/system76: Reset Realtek codec before configuring ...................................................................... mb/system76: Reset Realtek codec before configuring Perform a codec reset before configuring to avoid potential issues like oryp5 had before 86f410479ca9 ("mb/system76/oryp5: Reset HDA before configuring"). Inspecting proprietary firmware for multiple boards shows that this is always done as well. Change-Id: I64c1fd23f708f77a81fad0bc889f42d4df3f6e61 Signed-off-by: Tim Crawford <tcrawford(a)system76.com> --- M src/mainboard/system76/addw1/variants/addw1/hda_verb.c M src/mainboard/system76/addw1/variants/addw2/hda_verb.c M src/mainboard/system76/bonw14/hda_verb.c M src/mainboard/system76/cml-u/variants/darp6/hda_verb.c M src/mainboard/system76/cml-u/variants/galp4/hda_verb.c M src/mainboard/system76/gaze15/variants/gaze14/hda_verb.c M src/mainboard/system76/gaze15/variants/gaze15/hda_verb.c M src/mainboard/system76/gaze16/variants/gaze16-3050/hda_verb.c M src/mainboard/system76/gaze16/variants/gaze16-3060/hda_verb.c M src/mainboard/system76/kbl-u/variants/galp2/hda_verb.c M src/mainboard/system76/kbl-u/variants/galp3-b/hda_verb.c M src/mainboard/system76/kbl-u/variants/galp3/hda_verb.c M src/mainboard/system76/lemp9/hda_verb.c M src/mainboard/system76/oryp5/hda_verb.c M src/mainboard/system76/oryp6/variants/oryp6/hda_verb.c M src/mainboard/system76/oryp6/variants/oryp7/hda_verb.c M src/mainboard/system76/oryp8/hda_verb.c M src/mainboard/system76/tgl-u/variants/darp7/hda_verb.c M src/mainboard/system76/tgl-u/variants/galp5/hda_verb.c M src/mainboard/system76/tgl-u/variants/lemp10/hda_verb.c M src/mainboard/system76/whl-u/variants/darp5/hda_verb.c M src/mainboard/system76/whl-u/variants/galp3-c/hda_verb.c 22 files changed, 60 insertions(+), 22 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/66918/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/66918 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I64c1fd23f708f77a81fad0bc889f42d4df3f6e61 Gerrit-Change-Number: 66918 Gerrit-PatchSet: 5 Gerrit-Owner: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Jeremy Soller <jeremy(a)system76.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: drivers/intel/fsp2_0/memory_init.c: clean code
by Felix Held (Code Review) 07 Nov '22

07 Nov '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68592 ) Change subject: drivers/intel/fsp2_0/memory_init.c: clean code ...................................................................... drivers/intel/fsp2_0/memory_init.c: clean code No need to call a function that just instantly returns. It greatly enhances readability to just check before calling a funtion and it also removes an extra argument. Change-Id: I4d57c45ede520160ef615725c023b7e92289a995 Signed-off-by: Maximilian Brune <maximilian.brune(a)9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68592 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Lean Sheng Tan <sheng.tan(a)9elements.com> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/drivers/intel/fsp2_0/memory_init.c 1 file changed, 21 insertions(+), 5 deletions(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved Lean Sheng Tan: Looks good to me, but someone else must approve diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c index f7aaed4..99b0fea 100644 --- a/src/drivers/intel/fsp2_0/memory_init.c +++ b/src/drivers/intel/fsp2_0/memory_init.c @@ -26,14 +26,11 @@ static uint8_t temp_ram[CONFIG_FSP_TEMP_RAM_SIZE] __aligned(sizeof(uint64_t)); -static void save_memory_training_data(bool s3wake, uint32_t fsp_version) +static void save_memory_training_data(uint32_t fsp_version) { size_t mrc_data_size; const void *mrc_data; - if (!CONFIG(CACHE_MRC_SETTINGS) || s3wake) - return; - mrc_data = fsp_find_nv_storage_data(&mrc_data_size); if (!mrc_data) { printk(BIOS_ERR, "FSP_NON_VOLATILE_STORAGE_HOB missing!\n"); @@ -76,7 +73,8 @@ (uintptr_t)cbmem_find(CBMEM_ID_FSP_RESERVED_MEMORY)) die("Failed to accommodate FSP reserved memory request!\n"); - save_memory_training_data(s3wake, fsp_version); + if (CONFIG(CACHE_MRC_SETTINGS) && !s3wake) + save_memory_training_data(fsp_version); /* Create romstage handof information */ romstage_handoff_init(s3wake); -- To view, visit https://review.coreboot.org/c/coreboot/+/68592 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4d57c45ede520160ef615725c023b7e92289a995 Gerrit-Change-Number: 68592 Gerrit-PatchSet: 5 Gerrit-Owner: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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coreboot-gerrit November 2022