coreboot-gerrit November 2022

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[S] Change in coreboot[master]: soc/intel/meteorlake: Implement SOC Die lock down configuration
by Felix Held (Code Review) 07 Nov '22

07 Nov '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68430 ) ( 2 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: soc/intel/meteorlake: Implement SOC Die lock down configuration ...................................................................... soc/intel/meteorlake: Implement SOC Die lock down configuration This patch implements a function to enable IOSF Primary Trunk Clock Gating. BUG=b:253210291 TEST=Able to build and boot rex to OS. Also needed for S0ix, tested with Sandbox OS + Firmware combination for S0ix entry/exit. Signed-off-by: Ravi Sarawadi <ravishankar.sarawadi(a)intel.com> Change-Id: I02e191336e99f97f4db58b27f4414001b642ad02 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68430 Reviewed-by: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Reviewed-by: Subrata Banik <subratabanik(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/soc/intel/meteorlake/lockdown.c 1 file changed, 38 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Subrata Banik: Looks good to me, approved Eric Lai: Looks good to me, but someone else must approve diff --git a/src/soc/intel/meteorlake/lockdown.c b/src/soc/intel/meteorlake/lockdown.c index 678e63a..51fbdaf 100644 --- a/src/soc/intel/meteorlake/lockdown.c +++ b/src/soc/intel/meteorlake/lockdown.c @@ -2,10 +2,16 @@ #include <device/mmio.h> #include <intelblocks/cfg.h> +#include <intelblocks/pcr.h> #include <intelpch/lockdown.h> +#include <soc/pcr_ids.h> #include <soc/pm.h> #include <stdint.h> +/* PCR PSTH Control Register */ +#define PCR_PSTH_CTRLREG 0x1d00 +#define PSTH_CTRLREG_IOSFPTCGE (1 << 2) + static void pmc_lock_pmsync(void) { uint8_t *pmcbase; @@ -53,8 +59,19 @@ pmc_lock_smi(); } +static void soc_die_lockdown_cfg(void) +{ + if (CONFIG(USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM)) + return; + + /* Enable IOSF Primary Trunk Clock Gating */ + pcr_rmw32(PID_PSTH, PCR_PSTH_CTRLREG, ~0, PSTH_CTRLREG_IOSFPTCGE); +} + void soc_lockdown_config(int chipset_lockdown) { /* PMC lock down configuration */ pmc_lockdown_cfg(chipset_lockdown); + /* SOC Die lock down configuration */ + soc_die_lockdown_cfg(); } -- To view, visit https://review.coreboot.org/c/coreboot/+/68430 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I02e191336e99f97f4db58b27f4414001b642ad02 Gerrit-Change-Number: 68430 Gerrit-PatchSet: 4 Gerrit-Owner: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-CC: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.corp-partner.google.com> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: vendorcode/amd/ccx_cppc_data.h: Fix header guard
by Felix Held (Code Review) 07 Nov '22

07 Nov '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/69230 ) Change subject: vendorcode/amd/ccx_cppc_data.h: Fix header guard ...................................................................... vendorcode/amd/ccx_cppc_data.h: Fix header guard Change-Id: I027c3aa7bb206112107ee120cf6f9854e37c5636 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69230 Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> Reviewed-by: Felix Held <felix-coreboot(a)felixheld.de> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/vendorcode/amd/fsp/common/ccx_cppc_data.h 1 file changed, 15 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Felix Held: Looks good to me, approved Angel Pons: Looks good to me, approved diff --git a/src/vendorcode/amd/fsp/common/ccx_cppc_data.h b/src/vendorcode/amd/fsp/common/ccx_cppc_data.h index ac88776..1f41d48 100644 --- a/src/vendorcode/amd/fsp/common/ccx_cppc_data.h +++ b/src/vendorcode/amd/fsp/common/ccx_cppc_data.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#ifndef COMMOM_FSP_CCX_CPPC_DATA_H +#ifndef COMMON_FSP_CCX_CPPC_DATA_H #define COMMON_FSP_CCX_CPPC_DATA_H #include <types.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/69230 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I027c3aa7bb206112107ee120cf6f9854e37c5636 Gerrit-Change-Number: 69230 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: soc/intel/meteorlake: Fix incompatible function pointers
by Felix Held (Code Review) 07 Nov '22

07 Nov '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/66263 ) Change subject: soc/intel/meteorlake: Fix incompatible function pointers ...................................................................... soc/intel/meteorlake: Fix incompatible function pointers const void is a meaningless return type and clang complains about incompatible function pointer signatures. Change-Id: Ia00706b9cd718e590819621986dbd20555f6c226 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/66263 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> Reviewed-by: Subrata Banik <subratabanik(a)google.com> --- M src/soc/intel/meteorlake/fsp_params.c M src/soc/intel/meteorlake/romstage/fsp_params.c 2 files changed, 19 insertions(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved Subrata Banik: Looks good to me, approved diff --git a/src/soc/intel/meteorlake/fsp_params.c b/src/soc/intel/meteorlake/fsp_params.c index c727fb3..4fd8f79 100644 --- a/src/soc/intel/meteorlake/fsp_params.c +++ b/src/soc/intel/meteorlake/fsp_params.c @@ -420,7 +420,7 @@ /* Override settings per board if required. */ mainboard_update_soc_chip_config(config); - const void (*fill_fsps_params[])(FSP_S_CONFIG *s_cfg, + void (*fill_fsps_params[])(FSP_S_CONFIG *s_cfg, const struct soc_intel_meteorlake_config *config) = { fill_fsps_lpss_params, fill_fsps_cpu_params, diff --git a/src/soc/intel/meteorlake/romstage/fsp_params.c b/src/soc/intel/meteorlake/romstage/fsp_params.c index 0b7e79e6..6e56eae 100644 --- a/src/soc/intel/meteorlake/romstage/fsp_params.c +++ b/src/soc/intel/meteorlake/romstage/fsp_params.c @@ -284,7 +284,7 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg, const struct soc_intel_meteorlake_config *config) { - const void (*const fill_fspm_params[])(FSP_M_CONFIG *m_cfg, + void (*fill_fspm_params[])(FSP_M_CONFIG *m_cfg, const struct soc_intel_meteorlake_config *config) = { fill_fspm_igd_params, fill_fspm_mrc_params, -- To view, visit https://review.coreboot.org/c/coreboot/+/66263 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia00706b9cd718e590819621986dbd20555f6c226 Gerrit-Change-Number: 66263 Gerrit-PatchSet: 5 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: 3rdparty/blobs: Advance submodule pointer
by Felix Held (Code Review) 07 Nov '22

07 Nov '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68587 ) Change subject: 3rdparty/blobs: Advance submodule pointer ...................................................................... 3rdparty/blobs: Advance submodule pointer This contains the following commits: * 835724d: mainboard/starlabs/starbook: Update the EC binaries for StarLabs * ecbe941: soc/mediatek: Update capitalization of coreboot * 0e4444e: soc/mediatek/mt8188: Update MCUPM firmware from v1.01.02 to v1.01.03 * 88570f6: mainboard/starlabs/starbook/adl: Update the EC binary to 1.01 by Sean Rhodes * f8e84db@ mainboard/starlabs/cezanne/starbook: Add EC binary 1.02 by Sean Rhodes Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Change-Id: I7afd43102718f211fe8d4fd69061dcdce5bfc323 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68587 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> --- M 3rdparty/blobs 1 file changed, 25 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved diff --git a/3rdparty/blobs b/3rdparty/blobs index 5a19332..f8e84db 160000 --- a/3rdparty/blobs +++ b/3rdparty/blobs @@ -1 +1 @@ -Subproject commit 5a19332deb332479c98e13923b1023f1a5cb271f +Subproject commit f8e84db377ea27b3eea576e9b367b1ac7f728f79 -- To view, visit https://review.coreboot.org/c/coreboot/+/68587 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7afd43102718f211fe8d4fd69061dcdce5bfc323 Gerrit-Change-Number: 68587 Gerrit-PatchSet: 7 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: mb/starlabs/*: Enable the Mirror flag for boards that support it
by Felix Held (Code Review) 07 Nov '22

07 Nov '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68939 ) Change subject: mb/starlabs/*: Enable the Mirror flag for boards that support it ...................................................................... mb/starlabs/*: Enable the Mirror flag for boards that support it Enable the mirror flag for CML and TGL. Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Change-Id: I51678bdb8d876d238076e12c6315a53c5da59628 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68939 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/mainboard/starlabs/starbook/Kconfig M src/mainboard/starlabs/starbook/cmos.default M src/mainboard/starlabs/starbook/cmos.layout M src/mainboard/starlabs/starbook/variants/tgl/cmos.default M src/mainboard/starlabs/starbook/variants/tgl/cmos.layout 5 files changed, 21 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved diff --git a/src/mainboard/starlabs/starbook/Kconfig b/src/mainboard/starlabs/starbook/Kconfig index f3f50ad..0854c14 100644 --- a/src/mainboard/starlabs/starbook/Kconfig +++ b/src/mainboard/starlabs/starbook/Kconfig @@ -27,6 +27,7 @@ select BOARD_ROMSIZE_KB_16384 select BOARD_STARLABS_STARBOOK_SERIES select EC_STARLABS_MAX_CHARGE + select EC_STARLABS_MIRROR_FLAG select EC_STARLABS_NEED_ITE_BIN select HAVE_INTEL_PTT select HAVE_SPD_IN_CBFS @@ -43,6 +44,7 @@ select DRIVERS_INTEL_USB4_RETIMER select EC_STARLABS_KBL_LEVELS select EC_STARLABS_MAX_CHARGE + select EC_STARLABS_MIRROR_FLAG select EC_STARLABS_NEED_ITE_BIN select MEMORY_MAPPED_TPM select MAINBOARD_HAS_TPM2 diff --git a/src/mainboard/starlabs/starbook/cmos.default b/src/mainboard/starlabs/starbook/cmos.default index f1276cc..b7f77e4 100644 --- a/src/mainboard/starlabs/starbook/cmos.default +++ b/src/mainboard/starlabs/starbook/cmos.default @@ -15,6 +15,7 @@ # EC kbl_timeout=30 seconds fn_ctrl_swap=Disable +mirror_flag=Enable # southbridge power_on_after_fail=Disable # Functions diff --git a/src/mainboard/starlabs/starbook/cmos.layout b/src/mainboard/starlabs/starbook/cmos.layout index 887c0b2..8b6a463 100644 --- a/src/mainboard/starlabs/starbook/cmos.layout +++ b/src/mainboard/starlabs/starbook/cmos.layout @@ -34,6 +34,7 @@ 608 1 e 1 fn_ctrl_swap 616 2 e 8 max_charge 624 2 e 9 fan_mode +632 1 e 1 mirror_flag # coreboot config options: southbridge 800 2 e 6 power_on_after_fail diff --git a/src/mainboard/starlabs/starbook/variants/tgl/cmos.default b/src/mainboard/starlabs/starbook/variants/tgl/cmos.default index cfc9a61..62bb28d 100644 --- a/src/mainboard/starlabs/starbook/variants/tgl/cmos.default +++ b/src/mainboard/starlabs/starbook/variants/tgl/cmos.default @@ -16,6 +16,7 @@ # EC kbl_timeout=30 seconds fn_ctrl_swap=Disable +mirror_flag=Enable # southbridge power_on_after_fail=Disable # Functions diff --git a/src/mainboard/starlabs/starbook/variants/tgl/cmos.layout b/src/mainboard/starlabs/starbook/variants/tgl/cmos.layout index c4a49c5d..d792426 100644 --- a/src/mainboard/starlabs/starbook/variants/tgl/cmos.layout +++ b/src/mainboard/starlabs/starbook/variants/tgl/cmos.layout @@ -35,6 +35,7 @@ 608 1 e 1 fn_ctrl_swap 616 2 e 8 max_charge 624 2 e 9 fan_mode +632 1 e 1 mirror_flag # coreboot config options: southbridge 800 2 e 6 power_on_after_fail -- To view, visit https://review.coreboot.org/c/coreboot/+/68939 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I51678bdb8d876d238076e12c6315a53c5da59628 Gerrit-Change-Number: 68939 Gerrit-PatchSet: 6 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[M] Change in coreboot[master]: ec/starlabs/merlin: Add support for enabling the mirror flag
by Felix Held (Code Review) 07 Nov '22

07 Nov '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68938 ) Change subject: ec/starlabs/merlin: Add support for enabling the mirror flag ...................................................................... ec/starlabs/merlin: Add support for enabling the mirror flag When enabled, the EC will mirror the firmware contained inside the coreboot ROM. This allows it to be updated at the same time as coreboot. Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Change-Id: Ief088e012b65be32648f581fc3190e1000bca241 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68938 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/ec/starlabs/merlin/Kconfig M src/ec/starlabs/merlin/ec.h M src/ec/starlabs/merlin/ite.c M src/ec/starlabs/merlin/variants/adl/ecdefs.h M src/ec/starlabs/merlin/variants/apl/ecdefs.h M src/ec/starlabs/merlin/variants/cezanne/ecdefs.h M src/ec/starlabs/merlin/variants/cml/ecdefs.h M src/ec/starlabs/merlin/variants/glk/ecdefs.h M src/ec/starlabs/merlin/variants/glkr/ecdefs.h M src/ec/starlabs/merlin/variants/kbl/ecdefs.h M src/ec/starlabs/merlin/variants/merlin/ecdefs.h M src/ec/starlabs/merlin/variants/tgl/ecdefs.h 12 files changed, 57 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved diff --git a/src/ec/starlabs/merlin/Kconfig b/src/ec/starlabs/merlin/Kconfig index 6ccd217..203fd48 100644 --- a/src/ec/starlabs/merlin/Kconfig +++ b/src/ec/starlabs/merlin/Kconfig @@ -64,6 +64,13 @@ help Select if the mainboard supports limiting the maximum charge of the battery. +config EC_STARLABS_MIRROR_FLAG + bool + default n + depends on EC_STARLABS_ITE + help + Select if the EC should mirror the EC firmware contained in the coreboot ROM. + config EC_STARLABS_MERLIN bool "Use open-source Merlin EC Firmware" default n diff --git a/src/ec/starlabs/merlin/ec.h b/src/ec/starlabs/merlin/ec.h index ca1d081..ff01c89 100644 --- a/src/ec/starlabs/merlin/ec.h +++ b/src/ec/starlabs/merlin/ec.h @@ -98,6 +98,10 @@ #define KBL_DISABLED 0x00 #define KBL_ENABLED 0xdd +/* Mirror Flag */ +#define MIRROR_DISABLED 0x00 +#define MIRROR_ENABLED 0x01 + uint16_t ec_get_version(void); #endif diff --git a/src/ec/starlabs/merlin/ite.c b/src/ec/starlabs/merlin/ite.c index 357c67c..d2d7c45 100644 --- a/src/ec/starlabs/merlin/ite.c +++ b/src/ec/starlabs/merlin/ite.c @@ -70,6 +70,7 @@ * trackpad_state * kbl_brightness * kbl_state + * mirror_flag */ /* @@ -247,6 +248,25 @@ 1, kbl_state, ARRAY_SIZE(kbl_state))); + + /* + * Mirror Flag + * + * Setting: mirror_flag + * + * Values: Off, On + * Default: On + */ + const uint8_t mirror_flag[] = { + MIRROR_DISABLED, + MIRROR_ENABLED + }; + if (CONFIG(EC_STARLABS_MIRROR_FLAG)) + ec_write(ECRAM_MIRROR_FLAG, + get_ec_value_from_option("mirror_flag", + 1, + mirror_flag, + ARRAY_SIZE(mirror_flag))); } static struct device_operations ops = { diff --git a/src/ec/starlabs/merlin/variants/adl/ecdefs.h b/src/ec/starlabs/merlin/variants/adl/ecdefs.h index 28f7e4b..18480e2 100644 --- a/src/ec/starlabs/merlin/variants/adl/ecdefs.h +++ b/src/ec/starlabs/merlin/variants/adl/ecdefs.h @@ -23,5 +23,5 @@ #define ECRAM_MAX_CHARGE 0x1a #define ECRAM_FAN_MODE 0x1b #define ECRAM_FAST_CHARGE dead_code_t(uint8_t) - +#define ECRAM_MIRROR_FLAG 0x05 #endif diff --git a/src/ec/starlabs/merlin/variants/apl/ecdefs.h b/src/ec/starlabs/merlin/variants/apl/ecdefs.h index fa7e79b..5cbe14e 100644 --- a/src/ec/starlabs/merlin/variants/apl/ecdefs.h +++ b/src/ec/starlabs/merlin/variants/apl/ecdefs.h @@ -23,5 +23,6 @@ #define ECRAM_MAX_CHARGE dead_code_t(uint8_t) #define ECRAM_FAN_MODE dead_code_t(uint8_t) #define ECRAM_FAST_CHARGE dead_code_t(uint8_t) +#define ECRAM_MIRROR_FLAG 0x04 #endif diff --git a/src/ec/starlabs/merlin/variants/cezanne/ecdefs.h b/src/ec/starlabs/merlin/variants/cezanne/ecdefs.h index 6a3bad9..0826456 100644 --- a/src/ec/starlabs/merlin/variants/cezanne/ecdefs.h +++ b/src/ec/starlabs/merlin/variants/cezanne/ecdefs.h @@ -23,5 +23,6 @@ #define ECRAM_MAX_CHARGE 0x23 #define ECRAM_FAN_MODE 0x24 #define ECRAM_FAST_CHARGE dead_code_t(uint8_t) +#define ECRAM_MIRROR_FLAG 0x05 #endif diff --git a/src/ec/starlabs/merlin/variants/cml/ecdefs.h b/src/ec/starlabs/merlin/variants/cml/ecdefs.h index 6a24bc4..0a2654b 100644 --- a/src/ec/starlabs/merlin/variants/cml/ecdefs.h +++ b/src/ec/starlabs/merlin/variants/cml/ecdefs.h @@ -23,5 +23,6 @@ #define ECRAM_KBL_BRIGHTNESS 0x19 #define ECRAM_FN_LOCK_STATE 0x2c #define ECRAM_FAST_CHARGE dead_code_t(uint8_t) +#define ECRAM_MIRROR_FLAG 0x04 #endif diff --git a/src/ec/starlabs/merlin/variants/glk/ecdefs.h b/src/ec/starlabs/merlin/variants/glk/ecdefs.h index fefdd14..b2e2f2f 100644 --- a/src/ec/starlabs/merlin/variants/glk/ecdefs.h +++ b/src/ec/starlabs/merlin/variants/glk/ecdefs.h @@ -23,5 +23,6 @@ #define ECRAM_MAX_CHARGE dead_code_t(uint8_t) #define ECRAM_FAN_MODE dead_code_t(uint8_t) #define ECRAM_FAST_CHARGE dead_code_t(uint8_t) +#define ECRAM_MIRROR_FLAG 0x04 #endif diff --git a/src/ec/starlabs/merlin/variants/glkr/ecdefs.h b/src/ec/starlabs/merlin/variants/glkr/ecdefs.h index 038c378..ecc117c 100644 --- a/src/ec/starlabs/merlin/variants/glkr/ecdefs.h +++ b/src/ec/starlabs/merlin/variants/glkr/ecdefs.h @@ -23,5 +23,6 @@ #define ECRAM_MAX_CHARGE dead_code_t(uint8_t) #define ECRAM_FAN_MODE dead_code_t(uint8_t) #define ECRAM_FAST_CHARGE 0x18 +#define ECRAM_MIRROR_FLAG dead_code_t(uint8_t) #endif diff --git a/src/ec/starlabs/merlin/variants/kbl/ecdefs.h b/src/ec/starlabs/merlin/variants/kbl/ecdefs.h index 3b69317..8f3355d 100644 --- a/src/ec/starlabs/merlin/variants/kbl/ecdefs.h +++ b/src/ec/starlabs/merlin/variants/kbl/ecdefs.h @@ -23,5 +23,6 @@ #define ECRAM_FN_CTRL_REVERSE 0x43 #define ECRAM_MAX_CHARGE dead_code_t(uint8_t) #define ECRAM_FAST_CHARGE dead_code_t(uint8_t) +#define ECRAM_MIRROR_FLAG 0x04 #endif diff --git a/src/ec/starlabs/merlin/variants/merlin/ecdefs.h b/src/ec/starlabs/merlin/variants/merlin/ecdefs.h index f02c73a..08f80cb 100644 --- a/src/ec/starlabs/merlin/variants/merlin/ecdefs.h +++ b/src/ec/starlabs/merlin/variants/merlin/ecdefs.h @@ -20,5 +20,6 @@ #define ECRAM_FAN_MODE 0x50 #define ECRAM_MAX_CHARGE 0x51 #define ECRAM_FAST_CHARGE 0x52 +#define ECRAM_MIRROR_FLAG 0x05 #endif diff --git a/src/ec/starlabs/merlin/variants/tgl/ecdefs.h b/src/ec/starlabs/merlin/variants/tgl/ecdefs.h index cbc7b86e..c17b025 100644 --- a/src/ec/starlabs/merlin/variants/tgl/ecdefs.h +++ b/src/ec/starlabs/merlin/variants/tgl/ecdefs.h @@ -23,5 +23,6 @@ #define ECRAM_MAX_CHARGE 0x1a #define ECRAM_FAN_MODE 0x1b #define ECRAM_FAST_CHARGE dead_code_t(uint8_t) +#define ECRAM_MIRROR_FLAG 0x05 #endif -- To view, visit https://review.coreboot.org/c/coreboot/+/68938 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ief088e012b65be32648f581fc3190e1000bca241 Gerrit-Change-Number: 68938 Gerrit-PatchSet: 5 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: Documentation/drivers: Update section on touchscreen runtime detection
by Felix Held (Code Review) 07 Nov '22

07 Nov '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/69175 ) Change subject: Documentation/drivers: Update section on touchscreen runtime detection ...................................................................... Documentation/drivers: Update section on touchscreen runtime detection Update section now that google/skyrim and google/guybrush implement power sequencing and touchscreen runtime detection. Change-Id: Ida63bebf18575d6856edfc65965ff82a4072df87 Signed-off-by: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69175 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Reviewed-by: Raul Rangel <rrangel(a)chromium.org> --- M Documentation/drivers/dt_entries.md 1 file changed, 21 insertions(+), 3 deletions(-) Approvals: build bot (Jenkins): Verified Raul Rangel: Looks good to me, approved Eric Lai: Looks good to me, approved diff --git a/Documentation/drivers/dt_entries.md b/Documentation/drivers/dt_entries.md index 7726b45..9df965f 100644 --- a/Documentation/drivers/dt_entries.md +++ b/Documentation/drivers/dt_entries.md @@ -162,9 +162,10 @@ Touchscreens can use this feature as well, but special care is needed to implement the proper power sequencing for the device to be detected. Generally, this means driving the enable GPIO high and holding the reset GPIO low in early -GPIO init (bootblock/romstage), then releasing reset in ramstage. While no -boards in the tree currently implement this, it has been used in downstream -forks without issue for some time now. +GPIO init (bootblock/romstage), then releasing reset in ramstage. The first +mainboards in the tree to implement this are google/skyrim and google/guybrush. +This feature has also been used in downstream forks without issue for some time +now on several other boards. ### wake -- To view, visit https://review.coreboot.org/c/coreboot/+/69175 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ida63bebf18575d6856edfc65965ff82a4072df87 Gerrit-Change-Number: 69175 Gerrit-PatchSet: 3 Gerrit-Owner: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: mb/google/guybrush: Use detect vs probed flag for touchscreens
by Felix Held (Code Review) 07 Nov '22

07 Nov '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/69199 ) Change subject: mb/google/guybrush: Use detect vs probed flag for touchscreens ...................................................................... mb/google/guybrush: Use detect vs probed flag for touchscreens Now that coreboot performs the necessary power sequencing, switch from using the 'probed' flag to 'detect' for all I2C touchscreens. This alleviates ChromeOS from having to probe to see which touchscreen model is actually present, prevents breaking ACPI spec by generating device entries with status 'enabled and present' which aren't actually present, and improves compatibility with upstream Linux and Windows. BUG=b:121309055 TEST=build/boot ChromeOS and Linux on guybrush, ensure touchscreen is functional, and ACPI device entry generated for correct touchscreen model. This mirrors the changes made for skyrim in CB:67779. Change-Id: Ib6a76b969d3a245eccde5352231eb7e36736f2e0 Signed-off-by: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69199 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Raul Rangel <rrangel(a)chromium.org> --- M src/mainboard/google/guybrush/variants/dewatt/overridetree.cb M src/mainboard/google/guybrush/variants/guybrush/overridetree.cb M src/mainboard/google/guybrush/variants/nipperkin/overridetree.cb 3 files changed, 32 insertions(+), 4 deletions(-) Approvals: build bot (Jenkins): Verified Raul Rangel: Looks good to me, approved diff --git a/src/mainboard/google/guybrush/variants/dewatt/overridetree.cb b/src/mainboard/google/guybrush/variants/dewatt/overridetree.cb index 8649f1d..0ad0931 100644 --- a/src/mainboard/google/guybrush/variants/dewatt/overridetree.cb +++ b/src/mainboard/google/guybrush/variants/dewatt/overridetree.cb @@ -157,7 +157,7 @@ register "generic.hid" = ""ELAN6918"" register "generic.desc" = ""ELAN Touchscreen"" register "generic.irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_89)" - register "generic.probed" = "1" + register "generic.detect" = "1" register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_121)" register "generic.reset_delay_ms" = "20" register "generic.reset_off_delay_ms" = "2" diff --git a/src/mainboard/google/guybrush/variants/guybrush/overridetree.cb b/src/mainboard/google/guybrush/variants/guybrush/overridetree.cb index 9577d14..23379c9 100644 --- a/src/mainboard/google/guybrush/variants/guybrush/overridetree.cb +++ b/src/mainboard/google/guybrush/variants/guybrush/overridetree.cb @@ -93,7 +93,7 @@ register "generic.hid" = ""GDIX0000"" register "generic.desc" = ""Goodix Touchscreen"" register "generic.irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_89)" - register "generic.probed" = "1" + register "generic.detect" = "1" register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_68)" register "generic.enable_delay_ms" = "10" register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_121)" diff --git a/src/mainboard/google/guybrush/variants/nipperkin/overridetree.cb b/src/mainboard/google/guybrush/variants/nipperkin/overridetree.cb index 18b1cab..ea1f7d6 100644 --- a/src/mainboard/google/guybrush/variants/nipperkin/overridetree.cb +++ b/src/mainboard/google/guybrush/variants/nipperkin/overridetree.cb @@ -300,7 +300,7 @@ chip drivers/i2c/generic register "hid" = ""ELAN0001"" register "desc" = ""ELAN Touchscreen"" - register "probed" = "1" + register "detect" = "1" register "irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_89)" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_68)" register "enable_delay_ms" = "1" @@ -313,7 +313,7 @@ register "generic.hid" = ""GTCH7503"" register "generic.desc" = ""G2TOUCH Touchscreen"" register "generic.irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_89)" - register "generic.probed" = "1" + register "generic.detect" = "1" register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_68)" register "generic.enable_delay_ms" = "1" register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_121)" -- To view, visit https://review.coreboot.org/c/coreboot/+/69199 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib6a76b969d3a245eccde5352231eb7e36736f2e0 Gerrit-Change-Number: 69199 Gerrit-PatchSet: 2 Gerrit-Owner: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: mb/google/guybrush: Implement touchscreen power sequencing
by Felix Held (Code Review) 07 Nov '22

07 Nov '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/69178 ) Change subject: mb/google/guybrush: Implement touchscreen power sequencing ...................................................................... mb/google/guybrush: Implement touchscreen power sequencing As all variants have a touchscreen option, in baseboard table set the enable GPIO high and hold in reset during romstage, then release reset in ramstage. This will allow the touchscreen to make use of the runtime I2C detect feature (enabled in a subsequent commit) so that an ACPI device entry is created only for the touchscreen actually present. Variants/SKUs which do not have a touchscreen (if any) can use the romstage/ramstage GPIO override tables to set the associated enable/ reset GPIOs to NC. This mirrors the change to skyrim in CB:67778. BUG=b:121309055 TEST=build/boot guybrush with rest of patch series Change-Id: I9b3356b8b3a0e68a307838a4b18775d25b32e548 Signed-off-by: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69178 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Raul Rangel <rrangel(a)chromium.org> --- M src/mainboard/google/guybrush/variants/baseboard/gpio.c 1 file changed, 34 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Raul Rangel: Looks good to me, approved diff --git a/src/mainboard/google/guybrush/variants/baseboard/gpio.c b/src/mainboard/google/guybrush/variants/baseboard/gpio.c index beb654f..595f680 100644 --- a/src/mainboard/google/guybrush/variants/baseboard/gpio.c +++ b/src/mainboard/google/guybrush/variants/baseboard/gpio.c @@ -135,7 +135,7 @@ /* TCHSCR_REPORT_EN */ PAD_GPO(GPIO_120, LOW), /* TCHSCR_RESET_L */ - PAD_GPO(GPIO_121, LOW), + PAD_GPO(GPIO_121, HIGH), /* GPIO_122 - GPIO_128: Not available */ /* SOC_DISABLE_DISP_BL */ PAD_GPO(GPIO_129, LOW), @@ -284,6 +284,11 @@ PAD_NC(GPIO_70), /* PCIE_RST0_L */ PAD_NFO(GPIO_26, PCIE_RST_L, HIGH), + /* Enable touchscreen, hold in reset */ + /* EN_PP3300_TCHSCR */ + PAD_GPO(GPIO_68, HIGH), + /* TCHSCR_RESET_L */ + PAD_GPO(GPIO_121, LOW), }; const struct soc_amd_gpio *baseboard_romstage_gpio_table(size_t *size) -- To view, visit https://review.coreboot.org/c/coreboot/+/69178 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9b3356b8b3a0e68a307838a4b18775d25b32e548 Gerrit-Change-Number: 69178 Gerrit-PatchSet: 2 Gerrit-Owner: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[M] Change in coreboot[master]: util/scripts: Add script to show platforms, CPU, type, and date added
by Felix Held (Code Review) 07 Nov '22

07 Nov '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/63799 ) Change subject: util/scripts: Add script to show platforms, CPU, type, and date added ...................................................................... util/scripts: Add script to show platforms, CPU, type, and date added This is the script used to generate the list of platforms that were removed from the master branch at each release. Generate a list for the old branch, another for the new, and compare the two. Representative output: ```eval_rst +-------------------------+-------------------+------------+----------+ | Vendor/Board | Processor | Date added | Brd type | +=========================+===================+============+==========+ | 51nb/x210 | INTEL_KABYLAKE | 2020-03-16 | laptop | | acer/aspire_vn7_572g | INTEL_SKYLAKE | 2022-01-28 | laptop | | acer/g43t-am3 | INTEL_X4X | 2020-09-28 | desktop | | amd/bilby | AMD_PICASSO | 2021-02-17 | eval | | amd/birman | AMD_MORGANA | 2022-10-10 | eval | | system76/whl-u | INTEL_WHISKEYLAKE | 2021-04-14 | laptop | | ti/beaglebone | TI_AM335X | 2013-05-26 | sbc | | up/squared | INTEL_APOLLOLAKE | 2019-05-22 | mini | +-------------------------+-------------------+------------+----------+ ``` Signed-off-by: Martin Roth <gaumless(a)gmail.com> Change-Id: I4f7265d95df31f3a74aa2aa164f6a094c1139750 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63799 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Nicholas Chin <nic.c3.14(a)gmail.com> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> --- M util/scripts/description.md A util/scripts/show_platforms.sh 2 files changed, 84 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved Nicholas Chin: Looks good to me, but someone else must approve diff --git a/util/scripts/description.md b/util/scripts/description.md index eb7a1e8..780e9c9 100644 --- a/util/scripts/description.md +++ b/util/scripts/description.md @@ -25,5 +25,8 @@ `Perl` * _rm_unused_code_ - Remove all code not used for a platform from the local git repository for auditing or release `Bash` + * _show_platforms.sh_ - Makes a list of platforms in the tree. Does + not show variants. + `Shell` * _ucode_h_to_bin.sh_ - Microcode conversion tool `Bash` * _update_submodules_ - Check all submodules for updates `Bash` diff --git a/util/scripts/show_platforms.sh b/util/scripts/show_platforms.sh new file mode 100755 index 0000000..39d7772 --- /dev/null +++ b/util/scripts/show_platforms.sh @@ -0,0 +1,47 @@ +#!/bin/bash +# +# SPDX-License-Identifier: GPL-2.0-only +# +# This script finds all of the top-level mainboards, then goes through +# and finds the date the directory was added, the processor type, and +# the board type. +# +# This could be improved by finding all of the variants, then figuring +# out when those veriants were added. +# It's also very slow, but only needs to be run once in a while... + +readarray -t platforms < <(find src/mainboard -mindepth 3 -name 'Kconfig' | sort) + +echo '```eval_rst' +echo "+-------------------------------+------------------------+------------+-----------+" +echo "| Vendor/Board | Processor | Date added | Brd type |" +echo "+===============================+========================+============+===========+" + +for file in "${platforms[@]}"; do + platformname="$(echo "${file}" | sed 's|.*/mainboard/||;s|/Kconfig||')" + if [[ ! -f "${file/Kconfig/board_info.txt}" ]]; then + continue + fi + chips="$(grep "CPU_\|SOC_\|NORTHBRIDGE" "${file}" | + grep -v "SUBTYPE\|COMMON\|SOCKET\|ENABLE\|CONSOLE\|SMU\|depends on\|ESPI\|INTEL_CSE\|NORTHBRIDGE_AMD_AGESA\|INTEL_SLOT\|REBOOT\|DISABLE" | + sed -e 's|\s\+select\s\+||' \ + -e 's|\s\+if.*||' \ + -e 's|SKYLAKE_SOC_PCH|INTEL_SKYLAKE|' \ + -e 's|CPU_AMD_AGESA|AMD|' \ + -e 's|SOC_INTEL_ALDERLAKE_PCH_|INTEL_ALDERLAKE|' \ + -e 's|QC_|QUALCOMM_|' \ + -e 's/SOC_\|NORTHBRIDGE_\|PCH_\|CPU_//g' | + sort -u)" + if [[ ! -f ${file/Kconfig/board_info.txt} ]]; then + continue + fi + create_date="$(git log --format="format:%cs" -- "${file}" | tail -n1)" + platform_type="$(sed -nE -e 's/Category: (.*)/\1/p' "${file/Kconfig/board_info.txt}" 2>/dev/null)" + for chip in ${chips}; do + + printf "| %-29s | %-22s | %-10s | %-9s |\n" "${platformname}" "${chip}" "${create_date}" "${platform_type}" + done +done + +echo "+-------------------------------+------------------------+------------+-----------+" +echo '```' -- To view, visit https://review.coreboot.org/c/coreboot/+/63799 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4f7265d95df31f3a74aa2aa164f6a094c1139750 Gerrit-Change-Number: 63799 Gerrit-PatchSet: 5 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-MessageType: merged

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coreboot-gerrit November 2022