coreboot-gerrit November 2022

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[master]: soc/intel/alderlake: Check MANUF_LOCK when logging manufacturing mode
by Paul Menzel (Code Review) 08 Nov '22

08 Nov '22

Attention is currently required from: Tarun Tuli, Kangheui Won, Reka Norman, Rizwan Qureshi. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69324 ) Change subject: soc/intel/alderlake: Check MANUF_LOCK when logging manufacturing mode ...................................................................... Patch Set 1: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/69324/comment/9ff859b2_e21e46ba PS1, Line 22: On an anahera which has gone through EOM: Add a blank above? https://review.coreboot.org/c/coreboot/+/69324/comment/1ec56fe2_9097fc95 PS1, Line 24: How was it before the patch? -- To view, visit https://review.coreboot.org/c/coreboot/+/69324 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iac605baa291ab5cc5f28464006f4828c12c748fe Gerrit-Change-Number: 69324 Gerrit-PatchSet: 1 Gerrit-Owner: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Kangheui Won <khwon(a)chromium.org> Gerrit-Attention: Reka Norman <rekanorman(a)chromium.org> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Comment-Date: Tue, 08 Nov 2022 12:00:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/aldrlake: Update ME HFSTS register definition
by Paul Menzel (Code Review) 08 Nov '22

08 Nov '22

Attention is currently required from: Tarun Tuli, Rizwan Qureshi. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69286 ) Change subject: soc/intel/aldrlake: Update ME HFSTS register definition ...................................................................... Patch Set 1: (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/69286/comment/ad645129_a03d117c PS1, Line 7: aldrlake alderlake https://review.coreboot.org/c/coreboot/+/69286/comment/a3d74381_9c98f223 PS1, Line 9: AlderLake Alder Lake https://review.coreboot.org/c/coreboot/+/69286/comment/a89ca73b_77b5faae PS1, Line 11: What problem does this fix? -- To view, visit https://review.coreboot.org/c/coreboot/+/69286 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9aeee7a3b41ad59c03391207930a253ffff19ae5 Gerrit-Change-Number: 69286 Gerrit-PatchSet: 1 Gerrit-Owner: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Reka Norman <rekanorman(a)chromium.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Comment-Date: Tue, 08 Nov 2022 11:58:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: mem_chip_info: Update to new format
by Yu-Ping Wu (Code Review) 08 Nov '22

08 Nov '22

Attention is currently required from: Julius Werner, Xixi Chen. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68871 ) Change subject: mem_chip_info: Update to new format ...................................................................... Patch Set 5: -Code-Review (1 comment) File src/soc/mediatek/common/memory.c: https://review.coreboot.org/c/coreboot/+/68871/comment/6615ad17_6caaaad0 PS3, Line 129: ddr->mrr_info.mr8_density[r] > Yes, ddr->mrr_info.mr8_density[r] is in bytes. Then I guess we'd have to convert it to megabits here. -- To view, visit https://review.coreboot.org/c/coreboot/+/68871 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If34e6857439b6f6ab225344e5b4dd0ff11d8d42a Gerrit-Change-Number: 68871 Gerrit-PatchSet: 5 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Xixi Chen <xixi.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-CC: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-CC: Yidi Lin <yidilin(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Xixi Chen <xixi.chen(a)mediatek.corp-partner.google.com> Gerrit-Comment-Date: Tue, 08 Nov 2022 11:53:33 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Comment-In-Reply-To: Xixi Chen <xixi.chen(a)mediatek.corp-partner.google.com> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/meteorlake: Implement SOC Die lock down configuration
by 9elements QA (Code Review) 08 Nov '22

08 Nov '22

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68430 ) Change subject: soc/intel/meteorlake: Implement SOC Die lock down configuration ...................................................................... Patch Set 4: Automatic boot test returned (PASS/FAIL/TOTAL): 14 / 1 / 15 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES_ and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/134615 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/134614 PASS: x86_32 "ThinkPad T500" , build config LENOVO_T500 and payload SeaBIOS : https://lava.9esec.io/r/134613 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload TianoCore : https://lava.9esec.io/r/134611 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload SeaBIOS : https://lava.9esec.io/r/134610 FAIL: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload TianoCore : https://lava.9esec.io/r/134609 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload SeaBIOS : https://lava.9esec.io/r/134608 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload TianoCore : https://lava.9esec.io/r/134607 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload SeaBIOS : https://lava.9esec.io/r/134606 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload TianoCore : https://lava.9esec.io/r/134605 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload SeaBIOS : https://lava.9esec.io/r/134604 PASS: x86_64 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_X86_64 and payload SeaBIOS : https://lava.9esec.io/r/134603 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ASAN and payload SeaBIOS : https://lava.9esec.io/r/134602 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ and payload SeaBIOS : https://lava.9esec.io/r/134601 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX and payload SeaBIOS : https://lava.9esec.io/r/134600 Please note: This test is under development and might not be accurate at all! -- To view, visit https://review.coreboot.org/c/coreboot/+/68430 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I02e191336e99f97f4db58b27f4414001b642ad02 Gerrit-Change-Number: 68430 Gerrit-PatchSet: 4 Gerrit-Owner: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-CC: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.corp-partner.google.com> Gerrit-Comment-Date: Tue, 08 Nov 2022 11:18:32 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: mem_chip_info: Update to new format
by Xixi Chen (Code Review) 08 Nov '22

08 Nov '22

Attention is currently required from: Julius Werner, Yu-Ping Wu. Xixi Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68871 ) Change subject: mem_chip_info: Update to new format ...................................................................... Patch Set 5: (1 comment) File src/soc/mediatek/common/memory.c: https://review.coreboot.org/c/coreboot/+/68871/comment/f6d0534a_13d47079 PS3, Line 129: ddr->mrr_info.mr8_density[r] > Wait, I think `ddr->mrr_info.mr8_density[r]` is in bytes instead of megabits. Xixi, please confirm. Yes, ddr->mrr_info.mr8_density[r] is in bytes. -- To view, visit https://review.coreboot.org/c/coreboot/+/68871 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If34e6857439b6f6ab225344e5b4dd0ff11d8d42a Gerrit-Change-Number: 68871 Gerrit-PatchSet: 5 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Xixi Chen <xixi.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-CC: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-CC: Yidi Lin <yidilin(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Tue, 08 Nov 2022 10:30:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Comment-In-Reply-To: Xixi Chen <xixi.chen(a)mediatek.corp-partner.google.com> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: comment

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[L] Change in coreboot[master]: [WIP]aopen/dxplplusu: Enable SMM_ASEG
by build bot (Jenkins) (Code Review) 08 Nov '22

08 Nov '22

Attention is currently required from: Angel Pons, Patrick Rudolph. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61517 ) Change subject: [WIP]aopen/dxplplusu: Enable SMM_ASEG ...................................................................... Patch Set 3: Verified+1 (64 comments) File src/southbridge/intel/i82801dx/smihandler.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/5328c8d0_15e2884e PS3, Line 45: if (pm1_sts & (1 << 15)) printk(BIOS_SPEW, "WAK "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/b5add4a5_31d9ff50 PS3, Line 46: if (pm1_sts & (1 << 14)) printk(BIOS_SPEW, "PCIEXPWAK "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/041b6468_38c79134 PS3, Line 47: if (pm1_sts & (1 << 11)) printk(BIOS_SPEW, "PRBTNOR "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/39278e27_d75083ae PS3, Line 48: if (pm1_sts & (1 << 10)) printk(BIOS_SPEW, "RTC "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/01cc3de5_52124678 PS3, Line 49: if (pm1_sts & (1 << 8)) printk(BIOS_SPEW, "PWRBTN "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/be01ed3f_7112ffd1 PS3, Line 50: if (pm1_sts & (1 << 5)) printk(BIOS_SPEW, "GBL "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/7c71ab53_5a3beb9d PS3, Line 51: if (pm1_sts & (1 << 4)) printk(BIOS_SPEW, "BM "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/b88ec2ab_a238e60b PS3, Line 52: if (pm1_sts & (1 << 0)) printk(BIOS_SPEW, "TMROF "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/9b782296_ea37dd57 PS3, Line 76: if (smi_sts & (1 << 26)) printk(BIOS_DEBUG, "SPI "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/4fddd599_db63b378 PS3, Line 77: if (smi_sts & (1 << 25)) printk(BIOS_DEBUG, "EL_SMI "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/4c0add94_7aac5db7 PS3, Line 78: if (smi_sts & (1 << 21)) printk(BIOS_DEBUG, "MONITOR "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/b769088c_fb256083 PS3, Line 79: if (smi_sts & (1 << 20)) printk(BIOS_DEBUG, "PCI_EXP_SMI "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/8e9af439_3b80c438 PS3, Line 80: if (smi_sts & (1 << 18)) printk(BIOS_DEBUG, "INTEL_USB2 "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/7d1f6967_a1c6576f PS3, Line 81: if (smi_sts & (1 << 17)) printk(BIOS_DEBUG, "LEGACY_USB2 "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/cb9b71c2_9bb915d0 PS3, Line 82: if (smi_sts & (1 << 16)) printk(BIOS_DEBUG, "SMBUS_SMI "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/210abca6_ac9391b7 PS3, Line 83: if (smi_sts & (1 << 15)) printk(BIOS_DEBUG, "SERIRQ_SMI "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/583c921c_f1b954c9 PS3, Line 84: if (smi_sts & (1 << 14)) printk(BIOS_DEBUG, "PERIODIC "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/3ac622c7_781057b1 PS3, Line 85: if (smi_sts & (1 << 13)) printk(BIOS_DEBUG, "TCO "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/03b2f310_aa11dbe3 PS3, Line 86: if (smi_sts & (1 << 12)) printk(BIOS_DEBUG, "DEVMON "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/a2b7d7d8_ac4b1d03 PS3, Line 87: if (smi_sts & (1 << 11)) printk(BIOS_DEBUG, "MCSMI "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/e189e8a1_91e505f0 PS3, Line 88: if (smi_sts & (1 << 10)) printk(BIOS_DEBUG, "GPI "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/cac1bdb7_3b0b28bc PS3, Line 89: if (smi_sts & (1 << 9)) printk(BIOS_DEBUG, "GPE0 "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/d632bed4_48747d7f PS3, Line 90: if (smi_sts & (1 << 8)) printk(BIOS_DEBUG, "PM1 "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/3b285f87_1e8362a2 PS3, Line 91: if (smi_sts & (1 << 6)) printk(BIOS_DEBUG, "SWSMI_TMR "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/a4033bbe_447bea62 PS3, Line 92: if (smi_sts & (1 << 5)) printk(BIOS_DEBUG, "APM "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/b9c197d2_5ffc9d56 PS3, Line 93: if (smi_sts & (1 << 4)) printk(BIOS_DEBUG, "SLP_SMI "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/63f1725c_fb13deab PS3, Line 94: if (smi_sts & (1 << 3)) printk(BIOS_DEBUG, "LEGACY_USB "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/edb15405_062d72a5 PS3, Line 95: if (smi_sts & (1 << 2)) printk(BIOS_DEBUG, "BIOS "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/011d617f_d556bb74 PS3, Line 118: for (i=31; i>= 16; i--) { spaces required around that '=' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/b94c1550_f771e884 PS3, Line 118: for (i=31; i>= 16; i--) { spaces required around that '>=' (ctx:VxW) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/ab7cf284_c4c9a778 PS3, Line 119: if (gpe0_sts & (1 << i)) printk(BIOS_DEBUG, "GPIO%d ", (i-16)); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/58b9d6ec_2951d0d5 PS3, Line 121: if (gpe0_sts & (1 << 14)) printk(BIOS_DEBUG, "USB4 "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/dd0d9af9_de772ed4 PS3, Line 122: if (gpe0_sts & (1 << 13)) printk(BIOS_DEBUG, "PME_B0 "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/7bcfdbc4_fa19f63f PS3, Line 123: if (gpe0_sts & (1 << 12)) printk(BIOS_DEBUG, "USB3 "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/0159bdbb_069f9650 PS3, Line 124: if (gpe0_sts & (1 << 11)) printk(BIOS_DEBUG, "PME "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/26c00434_dc4e7da2 PS3, Line 125: if (gpe0_sts & (1 << 10)) printk(BIOS_DEBUG, "EL_SCI/BATLOW "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/1b8b8306_74c9c84a PS3, Line 126: if (gpe0_sts & (1 << 9)) printk(BIOS_DEBUG, "PCI_EXP "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/ecc1d21e_467ffd73 PS3, Line 127: if (gpe0_sts & (1 << 8)) printk(BIOS_DEBUG, "RI "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/3736f911_c268d487 PS3, Line 128: if (gpe0_sts & (1 << 7)) printk(BIOS_DEBUG, "SMB_WAK "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/c4a83778_56399e59 PS3, Line 129: if (gpe0_sts & (1 << 6)) printk(BIOS_DEBUG, "TCO_SCI "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/4c5cf163_ef4e366d PS3, Line 130: if (gpe0_sts & (1 << 5)) printk(BIOS_DEBUG, "AC97 "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/ace0d4ce_9aa1ade2 PS3, Line 131: if (gpe0_sts & (1 << 4)) printk(BIOS_DEBUG, "USB2 "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/44f6aa71_6c393466 PS3, Line 132: if (gpe0_sts & (1 << 3)) printk(BIOS_DEBUG, "USB1 "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/760d0995_a2e196df PS3, Line 133: if (gpe0_sts & (1 << 2)) printk(BIOS_DEBUG, "HOT_PLUG "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/1083e3c2_9dcdab75 PS3, Line 134: if (gpe0_sts & (1 << 0)) printk(BIOS_DEBUG, "THRM "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/6acf48bd_fd3e22f9 PS3, Line 159: if (tco_sts & (1 << 20)) printk(BIOS_DEBUG, "SMLINK_SLV "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/170f77a0_79a0e995 PS3, Line 160: if (tco_sts & (1 << 18)) printk(BIOS_DEBUG, "BOOT "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/ab1b2a8f_dae00753 PS3, Line 161: if (tco_sts & (1 << 17)) printk(BIOS_DEBUG, "SECOND_TO "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/e62b20a8_be9689d3 PS3, Line 162: if (tco_sts & (1 << 16)) printk(BIOS_DEBUG, "INTRD_DET "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/f66861b5_68f56584 PS3, Line 163: if (tco_sts & (1 << 12)) printk(BIOS_DEBUG, "DMISERR "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/8e440700_f5174272 PS3, Line 164: if (tco_sts & (1 << 10)) printk(BIOS_DEBUG, "DMISMI "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/25cb9757_26d74c7c PS3, Line 165: if (tco_sts & (1 << 9)) printk(BIOS_DEBUG, "DMISCI "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/95e7ef27_6084c5ae PS3, Line 166: if (tco_sts & (1 << 8)) printk(BIOS_DEBUG, "BIOSWR "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/ee9d9449_6fbb6f84 PS3, Line 167: if (tco_sts & (1 << 7)) printk(BIOS_DEBUG, "NEWCENTURY "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/63268a2c_9a41f91a PS3, Line 168: if (tco_sts & (1 << 3)) printk(BIOS_DEBUG, "TIMEOUT "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/b1c85263_f6ccb8a6 PS3, Line 169: if (tco_sts & (1 << 2)) printk(BIOS_DEBUG, "TCO_INT "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/649c1072_7f95fdf7 PS3, Line 170: if (tco_sts & (1 << 1)) printk(BIOS_DEBUG, "SW_TCO "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/754a312b_eab68289 PS3, Line 171: if (tco_sts & (1 << 0)) printk(BIOS_DEBUG, "NMI2SMI "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/374e4965_f6a87a8c PS3, Line 247: case ACPI_S0: printk(BIOS_DEBUG, "SMI#: Entering S0 (On)\n"); break; trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/c8baac4f_8de0319e PS3, Line 248: case ACPI_S1: printk(BIOS_DEBUG, "SMI#: Entering S1 (Assert STPCLK#)\n"); break; trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/8d3c405d_3dd94e11 PS3, Line 254: case ACPI_S4: printk(BIOS_DEBUG, "SMI#: Entering S4 (Suspend-To-Disk)\n"); break; trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/93b664b7_9c222860 PS3, Line 274: default: printk(BIOS_DEBUG, "SMI#: ERROR: SLP_TYP reserved\n"); break; trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/70cfca96_7fb1db4c PS3, Line 352: printk(BIOS_DEBUG, "GPI (mask %04x)\n",reg16); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162959): https://review.coreboot.org/c/coreboot/+/61517/comment/c9cfd0a9_6d9f09f8 PS3, Line 488: if (dump) { braces {} are not necessary for single statement blocks -- To view, visit https://review.coreboot.org/c/coreboot/+/61517 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If20a7092117612a1a9e25eb6ac480e105acd57d7 Gerrit-Change-Number: 61517 Gerrit-PatchSet: 3 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Tue, 08 Nov 2022 10:13:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XL] Change in coreboot[master]: Revert "mb/aopen/dxplplusu: Remove board"
by build bot (Jenkins) (Code Review) 08 Nov '22

08 Nov '22

Attention is currently required from: Angel Pons, Kyösti Mälkki, Elyes Haouas, Felix Held. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69339 ) Change subject: Revert "mb/aopen/dxplplusu: Remove board" ...................................................................... Patch Set 4: (9 comments) File src/northbridge/intel/e7505/northbridge.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162958): https://review.coreboot.org/c/coreboot/+/69339/comment/12a1b330_aa2b79d8 PS4, Line 72: if (dev->path.type == DEVICE_PATH_DOMAIN) { braces {} are not necessary for any arm of this statement File src/northbridge/intel/e7505/raminit.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162958): https://review.coreboot.org/c/coreboot/+/69339/comment/b418cb5b_48ec2b67 PS4, Line 175: while (i--) { braces {} are not necessary for single statement blocks Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162958): https://review.coreboot.org/c/coreboot/+/69339/comment/bc785a92_e628dc59 PS4, Line 696: BUG(); Avoid crashing the kernel - try using WARN_ON & recovery code rather than BUG() or BUG_ON() Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162958): https://review.coreboot.org/c/coreboot/+/69339/comment/52959287_84c32496 PS4, Line 1187: if (!(dimm_mask & (1 << i))) { braces {} are not necessary for single statement blocks Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162958): https://review.coreboot.org/c/coreboot/+/69339/comment/df81cb3d_3dd51081 PS4, Line 1204: if (value != ERROR_SCHEME_ECC) { braces {} are not necessary for single statement blocks Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162958): https://review.coreboot.org/c/coreboot/+/69339/comment/55db7669_8d6f0af6 PS4, Line 1274: if (sdram_width.side1 == 4) { braces {} are not necessary for single statement blocks Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162958): https://review.coreboot.org/c/coreboot/+/69339/comment/30205a44_0c3139c2 PS4, Line 1278: if (sdram_width.side2 == 4) { braces {} are not necessary for single statement blocks File src/southbridge/intel/i82801dx/i82801dx.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162958): https://review.coreboot.org/c/coreboot/+/69339/comment/3b036287_54db1f84 PS4, Line 55: if (!dev->enabled) { braces {} are not necessary for single statement blocks Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162958): https://review.coreboot.org/c/coreboot/+/69339/comment/fc556200_a781c301 PS4, Line 58: if (new_disable_mask != cur_disable_mask) { braces {} are not necessary for single statement blocks -- To view, visit https://review.coreboot.org/c/coreboot/+/69339 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia1cd02278240d1b5d006fb2a7730d3d86390f85b Gerrit-Change-Number: 69339 Gerrit-PatchSet: 4 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 08 Nov 2022 10:13:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/common/block/pcie/rtd3: Skip Power On if _STA returns 1
by 9elements QA (Code Review) 08 Nov '22

08 Nov '22

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69189 ) Change subject: soc/intel/common/block/pcie/rtd3: Skip Power On if _STA returns 1 ...................................................................... Patch Set 3: Automatic boot test returned (PASS/FAIL/TOTAL): 15 / 1 / 16 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES_ and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/134583 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/134582 PASS: x86_32 "ThinkPad T500" , build config LENOVO_T500 and payload SeaBIOS : https://lava.9esec.io/r/134581 PASS: x86_32 "HP Z220 SFF Workstation" , build config HP_Z220_SFF_WORKSTATION and payload LinuxBoot_BB_kexec : https://lava.9esec.io/r/134580 FAIL: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload TianoCore : https://lava.9esec.io/r/134579 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload SeaBIOS : https://lava.9esec.io/r/134578 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload TianoCore : https://lava.9esec.io/r/134577 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload SeaBIOS : https://lava.9esec.io/r/134576 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload TianoCore : https://lava.9esec.io/r/134575 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload SeaBIOS : https://lava.9esec.io/r/134574 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload TianoCore : https://lava.9esec.io/r/134573 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload SeaBIOS : https://lava.9esec.io/r/134572 PASS: x86_64 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_X86_64 and payload SeaBIOS : https://lava.9esec.io/r/134571 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ASAN and payload SeaBIOS : https://lava.9esec.io/r/134570 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ and payload SeaBIOS : https://lava.9esec.io/r/134569 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX and payload SeaBIOS : https://lava.9esec.io/r/134568 Please note: This test is under development and might not be accurate at all! -- To view, visit https://review.coreboot.org/c/coreboot/+/69189 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I296ce1b85417a5dbaca558511cd7fc51a3a38c84 Gerrit-Change-Number: 69189 Gerrit-PatchSet: 3 Gerrit-Owner: Kane Chen <kane.chen(a)intel.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Kane Chen <kane.chen(a)intel.com> Gerrit-Comment-Date: Tue, 08 Nov 2022 10:13:06 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[XL] Change in coreboot[master]: Revert "mb/aopen/dxplplusu: Remove board"
by Kyösti Mälkki (Code Review) 08 Nov '22

08 Nov '22

Attention is currently required from: Angel Pons, Kyösti Mälkki, Elyes Haouas, Felix Held. Hello build bot (Jenkins), Angel Pons, Arthur Heymans, Elyes Haouas, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/69339 to look at the new patch set (#4). Change subject: Revert "mb/aopen/dxplplusu: Remove board" ...................................................................... Revert "mb/aopen/dxplplusu: Remove board" This reverts commit eb76a455cd39ec59b7f2ba28baeec9538befd59e and applies minor fixes to make it build again. PARALLEL_MP was working prior to board removal and no relevant SMI handlers were implemented. So NO_SMM choice is now selected. Change-Id: Ia1cd02278240d1b5d006fb2a7730d3d86390f85b Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/arch/x86/smbios.c M src/cpu/intel/Kconfig M src/cpu/intel/Makefile.inc A src/cpu/intel/model_f2x/Kconfig A src/cpu/intel/model_f2x/Makefile.inc A src/cpu/intel/model_f2x/model_f2x_init.c A src/cpu/intel/socket_mPGA604/Kconfig A src/cpu/intel/socket_mPGA604/Makefile.inc M src/cpu/x86/Kconfig A src/mainboard/aopen/Kconfig A src/mainboard/aopen/Kconfig.name A src/mainboard/aopen/dxplplusu/Kconfig A src/mainboard/aopen/dxplplusu/Kconfig.name A src/mainboard/aopen/dxplplusu/Makefile.inc A src/mainboard/aopen/dxplplusu/acpi/e7505_pri.asl A src/mainboard/aopen/dxplplusu/acpi/e7505_sec.asl A src/mainboard/aopen/dxplplusu/acpi/i82801db.asl A src/mainboard/aopen/dxplplusu/acpi/p64h2.asl A src/mainboard/aopen/dxplplusu/acpi/power.asl A src/mainboard/aopen/dxplplusu/acpi/scsi.asl A src/mainboard/aopen/dxplplusu/acpi/superio.asl A src/mainboard/aopen/dxplplusu/acpi_tables.c A src/mainboard/aopen/dxplplusu/board_info.txt A src/mainboard/aopen/dxplplusu/bootblock.c A src/mainboard/aopen/dxplplusu/devicetree.cb A src/mainboard/aopen/dxplplusu/dsdt.asl A src/northbridge/intel/e7505/Kconfig A src/northbridge/intel/e7505/Makefile.inc A src/northbridge/intel/e7505/e7505.h A src/northbridge/intel/e7505/memmap.c A src/northbridge/intel/e7505/northbridge.c A src/northbridge/intel/e7505/raminit.c A src/northbridge/intel/e7505/raminit.h A src/northbridge/intel/e7505/romstage.c M src/southbridge/intel/common/smbus.c A src/southbridge/intel/i82801dx/Kconfig A src/southbridge/intel/i82801dx/Makefile.inc A src/southbridge/intel/i82801dx/ac97.c A src/southbridge/intel/i82801dx/bootblock.c A src/southbridge/intel/i82801dx/chip.h A src/southbridge/intel/i82801dx/early_smbus.c A src/southbridge/intel/i82801dx/fadt.c A src/southbridge/intel/i82801dx/i82801dx.c A src/southbridge/intel/i82801dx/i82801dx.h A src/southbridge/intel/i82801dx/ide.c A src/southbridge/intel/i82801dx/lpc.c A src/southbridge/intel/i82801dx/usb.c A src/southbridge/intel/i82801dx/usb2.c A src/southbridge/intel/i82870/82870.h A src/southbridge/intel/i82870/Kconfig A src/southbridge/intel/i82870/Makefile.inc A src/southbridge/intel/i82870/ioapic.c A src/southbridge/intel/i82870/pcibridge.c M src/superio/smsc/Makefile.inc A src/superio/smsc/lpc47m10x/Kconfig A src/superio/smsc/lpc47m10x/Makefile.inc A src/superio/smsc/lpc47m10x/early_serial.c A src/superio/smsc/lpc47m10x/lpc47m10x.h A src/superio/smsc/lpc47m10x/superio.c 59 files changed, 4,485 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/69339/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/69339 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia1cd02278240d1b5d006fb2a7730d3d86390f85b Gerrit-Change-Number: 69339 Gerrit-PatchSet: 4 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: mb/google/brya/marasov: Select ISH driver
by Subrata Banik (Code Review) 08 Nov '22

08 Nov '22

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69379 ) Change subject: mb/google/brya/marasov: Select ISH driver ...................................................................... mb/google/brya/marasov: Select ISH driver This patch ensures that Marasov selects the ISH driver for devices with UFS enabled. BUG=b:256566011 TEST=Able to build Marasov. Signed-off-by: Subrata Banik <subratabanik(a)google.com> Change-Id: I97a0aa3bc6976be32ddbf1fc6b37c16bb62a62e5 --- M src/mainboard/google/brya/Kconfig.name 1 file changed, 17 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/69379/1 diff --git a/src/mainboard/google/brya/Kconfig.name b/src/mainboard/google/brya/Kconfig.name index 4ead1f9..99a52bb 100644 --- a/src/mainboard/google/brya/Kconfig.name +++ b/src/mainboard/google/brya/Kconfig.name @@ -297,3 +297,4 @@ config BOARD_GOOGLE_MARASOV bool "-> Marasov" select BOARD_GOOGLE_BASEBOARD_BRYA + select DRIVERS_INTEL_ISH -- To view, visit https://review.coreboot.org/c/coreboot/+/69379 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I97a0aa3bc6976be32ddbf1fc6b37c16bb62a62e5 Gerrit-Change-Number: 69379 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: newchange

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