coreboot-gerrit November 2022

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[S] Change in coreboot[master]: src/device: Add MDIO operation
by Mario Scheithauer (Code Review) 08 Nov '22

08 Nov '22

Mario Scheithauer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69382 ) Change subject: src/device: Add MDIO operation ...................................................................... src/device: Add MDIO operation The interface is necessary for SOC specific MDIO access. Change-Id: I6691f92c4233bc30afc9029840b06f74bb1eb4b2 Signed-off-by: Mario Scheithauer <mario.scheithauer(a)siemens.com> --- M src/device/Makefile.inc A src/device/mdio.c M src/include/device/device.h A src/include/device/mdio.h 4 files changed, 46 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/69382/1 diff --git a/src/device/Makefile.inc b/src/device/Makefile.inc index 28acd73..3018ef9 100644 --- a/src/device/Makefile.inc +++ b/src/device/Makefile.inc @@ -64,3 +64,4 @@ ramstage-$(CONFIG_XHCI_UTILS) += xhci.c ramstage-y += gpio.c +ramstage-y += mdio.c diff --git a/src/device/mdio.c b/src/device/mdio.c new file mode 100644 index 0000000..9b2e921 --- /dev/null +++ b/src/device/mdio.c @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <console/console.h> +#include <device/device.h> +#include <device/mdio.h> +#include <stddef.h> + +const struct mdio_operations *dev_get_mdio_ops(struct device *dev) +{ + if (!dev || !dev->ops || !dev->ops->ops_mdio) { + printk(BIOS_ERR, "Could not get mdio operations."); + return NULL; + } + + return dev->ops->ops_mdio; +} diff --git a/src/include/device/device.h b/src/include/device/device.h index 0f9c39f..3a89663 100644 --- a/src/include/device/device.h +++ b/src/include/device/device.h @@ -20,6 +20,7 @@ struct spi_bus_operations; struct usb_bus_operations; struct gpio_operations; +struct mdio_operations; /* Chip operations */ struct chip_operations { @@ -67,6 +68,7 @@ const struct smbus_bus_operations *ops_smbus_bus; const struct pnp_mode_ops *ops_pnp_mode; const struct gpio_operations *ops_gpio; + const struct mdio_operations *ops_mdio; }; /** diff --git a/src/include/device/mdio.h b/src/include/device/mdio.h new file mode 100644 index 0000000..1688206 --- /dev/null +++ b/src/include/device/mdio.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef __DEVICE_MDIO_H__ +#define __DEVICE_MDIO_H__ + +struct device; +struct mdio_operations { + uint16_t (*read)(struct device *dev, uint8_t phy_adr, uint8_t reg_adr); + void (*write)(struct device *dev, uint8_t phy_adr, uint8_t reg_adr, uint16_t data); +}; + +/* Helper for getting mdio operations from a device */ +const struct mdio_operations *dev_get_mdio_ops(struct device *dev); + +#endif /* __DEVICE_MDIO_H__ */ -- To view, visit https://review.coreboot.org/c/coreboot/+/69382 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6691f92c4233bc30afc9029840b06f74bb1eb4b2 Gerrit-Change-Number: 69382 Gerrit-PatchSet: 1 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: soc/qualcomm/sc7280: Move AOP load and reset handle to Romstage
by 9elements QA (Code Review) 08 Nov '22

08 Nov '22

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67673 ) Change subject: soc/qualcomm/sc7280: Move AOP load and reset handle to Romstage ...................................................................... Patch Set 23: Automatic boot test returned (PASS/FAIL/TOTAL): 14 / 1 / 15 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES_ and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/134680 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/134679 PASS: x86_32 "ThinkPad T500" , build config LENOVO_T500 and payload SeaBIOS : https://lava.9esec.io/r/134678 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload TianoCore : https://lava.9esec.io/r/134677 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload SeaBIOS : https://lava.9esec.io/r/134676 FAIL: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload TianoCore : https://lava.9esec.io/r/134675 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload SeaBIOS : https://lava.9esec.io/r/134674 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload TianoCore : https://lava.9esec.io/r/134673 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload SeaBIOS : https://lava.9esec.io/r/134672 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload TianoCore : https://lava.9esec.io/r/134671 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload SeaBIOS : https://lava.9esec.io/r/134670 PASS: x86_64 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_X86_64 and payload SeaBIOS : https://lava.9esec.io/r/134669 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ASAN and payload SeaBIOS : https://lava.9esec.io/r/134668 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ and payload SeaBIOS : https://lava.9esec.io/r/134667 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX and payload SeaBIOS : https://lava.9esec.io/r/134666 Please note: This test is under development and might not be accurate at all! -- To view, visit https://review.coreboot.org/c/coreboot/+/67673 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iabc8ee8f6e7b14d237b0aeaae42da8077f9dafc4 Gerrit-Change-Number: 67673 Gerrit-PatchSet: 23 Gerrit-Owner: Sudheer Amrabadi <samrabad(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: T.Michael Turney <tmiketurney(a)gmail.com> Gerrit-Comment-Date: Tue, 08 Nov 2022 13:24:29 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: src/drivers/ipmi: retry ipmi_get_device_id in ipmi_kcs_init
by Sergii Dmytruk (Code Review) 08 Nov '22

08 Nov '22

Attention is currently required from: Patrick Rudolph, Jonathan Zhang, Johnny Lin, Christian Walter, Nill Ge, TangYiwei. Sergii Dmytruk has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69310 ) Change subject: src/drivers/ipmi: retry ipmi_get_device_id in ipmi_kcs_init ...................................................................... Patch Set 1: (1 comment) File src/drivers/ipmi/ipmi_kcs_ops.c: https://review.coreboot.org/c/coreboot/+/69310/comment/d047ae1a_3eef66e4 PS1, Line 118: dev->enabled = 0; If `dev->enabled` is set to `0` here, maybe we should just return and not get into the loop? It won't set `dev->enabled` to `1` anyway. -- To view, visit https://review.coreboot.org/c/coreboot/+/69310 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2b972c905fb0f8223570212432a4a10bd715f3f7 Gerrit-Change-Number: 69310 Gerrit-PatchSet: 1 Gerrit-Owner: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Nill Ge <geshijian(a)bytedance.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: TangYiwei Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Nill Ge <geshijian(a)bytedance.com> Gerrit-Attention: TangYiwei Gerrit-Comment-Date: Tue, 08 Nov 2022 13:23:02 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/alderlake: Check MANUF_LOCK when logging manufacturing mode
by Michał Żygowski (Code Review) 08 Nov '22

08 Nov '22

Attention is currently required from: Tarun Tuli, Kangheui Won, Reka Norman, Rizwan Qureshi. Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69324 ) Change subject: soc/intel/alderlake: Check MANUF_LOCK when logging manufacturing mode ...................................................................... Patch Set 1: (1 comment) File src/soc/intel/alderlake/me.c: https://review.coreboot.org/c/coreboot/+/69324/comment/c9307ae5_9a33dfa8 PS1, Line 141: hfsts1.fields.mfg_mode This bit only reflects the regions' writability in flash descriptor. So basically fpf_soc_lock and manuf_lock should be the only bits to be checked, shouldn't they? -- To view, visit https://review.coreboot.org/c/coreboot/+/69324 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iac605baa291ab5cc5f28464006f4828c12c748fe Gerrit-Change-Number: 69324 Gerrit-PatchSet: 1 Gerrit-Owner: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Kangheui Won <khwon(a)chromium.org> Gerrit-Attention: Reka Norman <rekanorman(a)chromium.org> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Comment-Date: Tue, 08 Nov 2022 13:20:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: mainboard/msi/ms7d25: Add support for DDR5 variant
by Michał Żygowski (Code Review) 08 Nov '22

08 Nov '22

Attention is currently required from: Felix Singer, Paul Menzel, Michał Kopeć, Angel Pons. Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68448 ) Change subject: mainboard/msi/ms7d25: Add support for DDR5 variant ...................................................................... Patch Set 5: (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/68448/comment/3f12186b_9ed01ad3 PS3, Line 12: TEST=Boot MSI PRO Z690-A board successfully to Ubuntu 22.04. > It’d be great if you added, what DIMMs you tested with. Done File src/mainboard/msi/ms7d25/Kconfig: https://review.coreboot.org/c/coreboot/+/68448/comment/8509926b_4cb22510 PS3, Line 4: config BOARD_MSI_Z690_A_PRO_WIFI > If this is the DDR5 variant, why not append `_DDR5`? It is just Kconfig name and does not really matter. I can add it if you say so, but I wanted to match the board's name displayed in SMBIOS File src/mainboard/msi/ms7d25/Kconfig.name: https://review.coreboot.org/c/coreboot/+/68448/comment/b33e7dd3_273e0d5e PS3, Line 2: bool "PRO Z690-A (WIFI) DDR4" > … or mention it in the commit message. WIFI is optional here thus the parentheses. It does not change the port in any way except the SMBIOS string. -- To view, visit https://review.coreboot.org/c/coreboot/+/68448 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I652a879d1616df4708fe4690797ad98384897f53 Gerrit-Change-Number: 68448 Gerrit-PatchSet: 5 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Tue, 08 Nov 2022 13:17:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: mainboard/msi/ms7d25: Add support for DDR5 variant
by Michał Żygowski (Code Review) 08 Nov '22

08 Nov '22

Attention is currently required from: Felix Singer, Michał Żygowski, Michał Kopeć, Angel Pons. Hello build bot (Jenkins), Paul Menzel, Michał Kopeć, Angel Pons, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/68448 to look at the new patch set (#5). Change subject: mainboard/msi/ms7d25: Add support for DDR5 variant ...................................................................... mainboard/msi/ms7d25: Add support for DDR5 variant The DDR5 board is almost identical to the DDR4 one. The only major difference is the board's DDR5 memory design. TEST=Boot MSI PRO Z690-A board successfully to Ubuntu 22.04. Memory: Crucial CT8G48C40U5.M4A1 in all 4 slots. Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com> Change-Id: I652a879d1616df4708fe4690797ad98384897f53 --- M configs/config.msi_ms7d25 A configs/config.msi_ms7d25_ddr4 M src/mainboard/msi/ms7d25/Kconfig M src/mainboard/msi/ms7d25/Kconfig.name M src/mainboard/msi/ms7d25/mainboard.c M src/mainboard/msi/ms7d25/romstage_fsp_params.c 6 files changed, 72 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/68448/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/68448 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I652a879d1616df4708fe4690797ad98384897f53 Gerrit-Change-Number: 68448 Gerrit-PatchSet: 5 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: mainboard/msi/ms7d25: Add support for DDR5 variant
by Michał Żygowski (Code Review) 08 Nov '22

08 Nov '22

Attention is currently required from: Felix Singer, Michał Żygowski, Michał Kopeć, Angel Pons. Hello build bot (Jenkins), Paul Menzel, Michał Kopeć, Angel Pons, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/68448 to look at the new patch set (#4). Change subject: mainboard/msi/ms7d25: Add support for DDR5 variant ...................................................................... mainboard/msi/ms7d25: Add support for DDR5 variant The DDR5 board is almost identical to the DDR4 one. The only major difference is the board's DDR5 memory design. TEST=Boot MSI PRO Z690-A board successfully to Ubuntu 22.04. Memory used: Crucial CT8G48C40U5.M4A1 in all 4 slots. Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com> Change-Id: I652a879d1616df4708fe4690797ad98384897f53 --- M configs/config.msi_ms7d25 A configs/config.msi_ms7d25_ddr4 M src/mainboard/msi/ms7d25/Kconfig M src/mainboard/msi/ms7d25/Kconfig.name M src/mainboard/msi/ms7d25/mainboard.c M src/mainboard/msi/ms7d25/romstage_fsp_params.c 6 files changed, 72 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/68448/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/68448 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I652a879d1616df4708fe4690797ad98384897f53 Gerrit-Change-Number: 68448 Gerrit-PatchSet: 4 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: mb/elmex: Clean up includes
by Elyes Haouas (Code Review) 08 Nov '22

08 Nov '22

Elyes Haouas has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/68921 ) Change subject: mb/elmex: Clean up includes ...................................................................... Abandoned please see 69112 -- To view, visit https://review.coreboot.org/c/coreboot/+/68921 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idf8fd7eb8620abb3abf36e7d2f191d386a27003b Gerrit-Change-Number: 68921 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

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[S] Change in coreboot[master]: superio/nuvoton/nct6687d: Fix unexpected expression
by Michał Żygowski (Code Review) 08 Nov '22

08 Nov '22

Attention is currently required from: Paul Menzel, Michał Kopeć, Angel Pons, Arthur Heymans, Felix Held. Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/66265 ) Change subject: superio/nuvoton/nct6687d: Fix unexpected expression ...................................................................... Patch Set 6: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/66265 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie369454f10b515aa5601a5e78330e12f4b7a5e4c Gerrit-Change-Number: 66265 Gerrit-PatchSet: 6 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 08 Nov 2022 13:09:54 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/xeon_sp: Move SMBIOS type 4 override functions from mainboa...
by Elyes Haouas (Code Review) 08 Nov '22

08 Nov '22

Attention is currently required from: Jonathan Zhang, Johnny Lin, Christian Walter, Jingle Hsu, Shuming Chu (Shuming), Arthur Heymans. Elyes Haouas has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69363 ) Change subject: soc/intel/xeon_sp: Move SMBIOS type 4 override functions from mainboard to soc ...................................................................... Patch Set 1: (1 comment) File src/soc/intel/xeon_sp/ramstage.c: https://review.coreboot.org/c/coreboot/+/69363/comment/85ad8fc4_d385feca PS1, Line 3: <arch/cpu.h> maybe use <cpu/cpu.h> instead of <arch/cpu.h> ? -- To view, visit https://review.coreboot.org/c/coreboot/+/69363 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I17df8de67bc2f5e89ea04da36efb2480a7e73174 Gerrit-Change-Number: 69363 Gerrit-PatchSet: 1 Gerrit-Owner: Shuming Chu (Shuming) <s1218944(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-CC: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-Attention: Shuming Chu (Shuming) <s1218944(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Tue, 08 Nov 2022 12:52:36 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit November 2022