coreboot-gerrit November 2022

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[S] Change in coreboot[master]: sb/intel/i82801dx/bootblock.c: Include "i82801dx.h"
by Elyes Haouas (Code Review) 17 Nov '22

17 Nov '22

Attention is currently required from: Kyösti Mälkki. Elyes Haouas has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69717 ) Change subject: sb/intel/i82801dx/bootblock.c: Include "i82801dx.h" ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: Thx -- To view, visit https://review.coreboot.org/c/coreboot/+/69717 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I58ff31ab98c4310478cf3bbe8aecce4000ac8205 Gerrit-Change-Number: 69717 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Thu, 17 Nov 2022 11:24:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: sb/intel/i82801dx/bootblock.c: Include "i82801dx.h"
by Elyes Haouas (Code Review) 17 Nov '22

17 Nov '22

Elyes Haouas has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69717 ) Change subject: sb/intel/i82801dx/bootblock.c: Include "i82801dx.h" ...................................................................... sb/intel/i82801dx/bootblock.c: Include "i82801dx.h" Change-Id: I58ff31ab98c4310478cf3bbe8aecce4000ac8205 Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> --- M src/southbridge/intel/i82801dx/bootblock.c 1 file changed, 12 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/69717/1 diff --git a/src/southbridge/intel/i82801dx/bootblock.c b/src/southbridge/intel/i82801dx/bootblock.c index c22eb3e..cbc12dd 100644 --- a/src/southbridge/intel/i82801dx/bootblock.c +++ b/src/southbridge/intel/i82801dx/bootblock.c @@ -3,6 +3,8 @@ #include <arch/bootblock.h> #include <device/pci_ops.h> +#include "i82801dx.h" + void bootblock_early_southbridge_init(void) { /* Set FWH IDs for 2 MB flash part. */ -- To view, visit https://review.coreboot.org/c/coreboot/+/69717 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I58ff31ab98c4310478cf3bbe8aecce4000ac8205 Gerrit-Change-Number: 69717 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: arch/arm/eabi_compat.c: Add eabi_clr
by build bot (Jenkins) (Code Review) 17 Nov '22

17 Nov '22

Attention is currently required from: Julius Werner. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69743 ) Change subject: arch/arm/eabi_compat.c: Add eabi_clr ...................................................................... Patch Set 1: (7 comments) File src/arch/arm/eabi_compat.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-163903): https://review.coreboot.org/c/coreboot/+/69743/comment/d5401f71_6b44e2dd PS1, Line 40: void __aeabi_memclr4 (void *dest, size_t n) space prohibited between function name and open parenthesis '(' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-163903): https://review.coreboot.org/c/coreboot/+/69743/comment/86552778_aeffab79 PS1, Line 41: __attribute((alias ("__aeabi_memclr"))); space prohibited between function name and open parenthesis '(' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-163903): https://review.coreboot.org/c/coreboot/+/69743/comment/2cd7bd80_8939e6e9 PS1, Line 43: void __aeabi_memclr8 (void *dest, size_t n) space prohibited between function name and open parenthesis '(' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-163903): https://review.coreboot.org/c/coreboot/+/69743/comment/dd1f0134_ff8d1f52 PS1, Line 44: __attribute((alias ("__aeabi_memclr"))); space prohibited between function name and open parenthesis '(' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-163903): https://review.coreboot.org/c/coreboot/+/69743/comment/e5b1df2a_95c60d22 PS1, Line 47: void __aeabi_memclr (void *dest, size_t n); space prohibited between function name and open parenthesis '(' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-163903): https://review.coreboot.org/c/coreboot/+/69743/comment/6620dc6c_ee53e5c6 PS1, Line 48: void __aeabi_memclr (void *dest, size_t n) space prohibited between function name and open parenthesis '(' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-163903): https://review.coreboot.org/c/coreboot/+/69743/comment/38488b4b_3747c32b PS1, Line 50: __aeabi_memset (dest, n, 0); space prohibited between function name and open parenthesis '(' -- To view, visit https://review.coreboot.org/c/coreboot/+/69743 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I460a0096918141c1cf8826bdf1853a3aa3aecff8 Gerrit-Change-Number: 69743 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Thu, 17 Nov 2022 11:18:06 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: ec/google/chromeec: Fix clang warnings
by build bot (Jenkins) (Code Review) 17 Nov '22

17 Nov '22

Attention is currently required from: Caveh Jalali, Julius Werner, Boris Mittelberg. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69742 ) Change subject: ec/google/chromeec: Fix clang warnings ...................................................................... Patch Set 1: (2 comments) Commit Message: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-163902): https://review.coreboot.org/c/coreboot/+/69742/comment/04ce6d75_2908d9bb PS1, Line 8: 'an union' may be misspelled - perhaps 'a union'? File src/ec/google/chromeec/ec_commands.h: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-163902): https://review.coreboot.org/c/coreboot/+/69742/comment/f1232c43_1e214f25 PS1, Line 4644: } __ec_todo_packed set_param ; space prohibited before semicolon -- To view, visit https://review.coreboot.org/c/coreboot/+/69742 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8b5233618081db86caedcb2d14870974e109ed9b Gerrit-Change-Number: 69742 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Boris Mittelberg <bmbm(a)google.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Caveh Jalali <caveh(a)chromium.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Boris Mittelberg <bmbm(a)google.com> Gerrit-Comment-Date: Thu, 17 Nov 2022 11:17:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: arch/arm: Fix assembling files with clang
by Arthur Heymans (Code Review) 17 Nov '22

17 Nov '22

Attention is currently required from: Arthur Heymans, Julius Werner. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63058 ) Change subject: arch/arm: Fix assembling files with clang ...................................................................... Patch Set 26: (4 comments) Patchset: PS26: All instructions should be the same now. File src/arch/arm/libgcc/lib1funcs.S: https://review.coreboot.org/c/coreboot/+/63058/comment/d923089e_d0730f36 PS1, Line 70: movne \curbit, \curbit, lsr #4 @ No, any more bits to do? > > Are you trying to copy what 'ARM: 8844/1: use unified assembler in assembly files' did in Linux? T […] Done File src/arch/arm/memset.S: https://review.coreboot.org/c/coreboot/+/63058/comment/b3c5aa42_c03956e8 PS1, Line 46: > Should still use tabs to align like the rest of the code. Done https://review.coreboot.org/c/coreboot/+/63058/comment/88f74106_5094192c PS1, Line 111: strle r1, [ip], #1 @ 1 > This is changing the instruction too. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/63058 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia320dc2c460c99d934b8f17dee7748a9def4e750 Gerrit-Change-Number: 63058 Gerrit-PatchSet: 26 Gerrit-Owner: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Thu, 17 Nov 2022 11:17:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Arthur Heymans <arthur.heymans(a)9elements.com> Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: arch/arm: Buildtest all arm targets with clang
by Arthur Heymans (Code Review) 17 Nov '22

17 Nov '22

Attention is currently required from: Julius Werner. Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69747 ) Change subject: arch/arm: Buildtest all arm targets with clang ...................................................................... arch/arm: Buildtest all arm targets with clang Change-Id: I88cf8ce16fb6c61c19d615e396f5871179b06fc8 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/arch/arm/Kconfig 1 file changed, 11 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/69747/1 diff --git a/src/arch/arm/Kconfig b/src/arch/arm/Kconfig index ed838a5..5ae0a57 100644 --- a/src/arch/arm/Kconfig +++ b/src/arch/arm/Kconfig @@ -1,5 +1,6 @@ config ARCH_ARM bool + select ARCH_SUPPORTS_CLANG config ARCH_BOOTBLOCK_ARM bool -- To view, visit https://review.coreboot.org/c/coreboot/+/69747 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I88cf8ce16fb6c61c19d615e396f5871179b06fc8 Gerrit-Change-Number: 69747 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: arch/x86: Buildtest clang targets with VBOOT_STARTS_BEFORE_BOOTBLOCK
by Arthur Heymans (Code Review) 17 Nov '22

17 Nov '22

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69746 ) Change subject: arch/x86: Buildtest clang targets with VBOOT_STARTS_BEFORE_BOOTBLOCK ...................................................................... arch/x86: Buildtest clang targets with VBOOT_STARTS_BEFORE_BOOTBLOCK TESTED: google/vilboz boots with clang build. Change-Id: Ie115c27b4cb0b8f83d7647bdd27ffcbac9376399 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/arch/x86/Kconfig 1 file changed, 13 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/69746/1 diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig index ef08f56..f7b9250 100644 --- a/src/arch/x86/Kconfig +++ b/src/arch/x86/Kconfig @@ -33,7 +33,7 @@ select ARCH_VERSTAGE_X86_32 if !VBOOT_STARTS_BEFORE_BOOTBLOCK select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 - select ARCH_SUPPORTS_CLANG if !VBOOT_STARTS_BEFORE_BOOTBLOCK + select ARCH_SUPPORTS_CLANG # stage selectors for x64 -- To view, visit https://review.coreboot.org/c/coreboot/+/69746 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie115c27b4cb0b8f83d7647bdd27ffcbac9376399 Gerrit-Change-Number: 69746 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: arch/arm/armv7: Disable generating neon FPU code
by Arthur Heymans (Code Review) 17 Nov '22

17 Nov '22

Attention is currently required from: Julius Werner. Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69745 ) Change subject: arch/arm/armv7: Disable generating neon FPU code ...................................................................... arch/arm/armv7: Disable generating neon FPU code By default clang generates code with neon instructions. These are not supported on all arm targets so default to fpu=none. Change-Id: I48fc505107d131466be39f466151df62b2d2bd0b Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/arch/arm/armv7/Makefile.inc 1 file changed, 14 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/69745/1 diff --git a/src/arch/arm/armv7/Makefile.inc b/src/arch/arm/armv7/Makefile.inc index d9f78e5..53261ee 100644 --- a/src/arch/arm/armv7/Makefile.inc +++ b/src/arch/arm/armv7/Makefile.inc @@ -9,6 +9,7 @@ ifeq ($(CONFIG_COMPILER_GCC),y) armv7_asm_flags += -Wa,-mno-warn-deprecated else # CLANG +armv7_flags += -mfpu=none bootblock-ld-ccopts += -target arm-eabi verstage-ld-ccopts += -target arm-eabi romstage-ld-ccopts += -target arm-eabi -- To view, visit https://review.coreboot.org/c/coreboot/+/69745 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I48fc505107d131466be39f466151df62b2d2bd0b Gerrit-Change-Number: 69745 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: arm/armv7/Makefile.inc: Fix processing ld files with clang
by Arthur Heymans (Code Review) 17 Nov '22

17 Nov '22

Attention is currently required from: Julius Werner. Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69744 ) Change subject: arm/armv7/Makefile.inc: Fix processing ld files with clang ...................................................................... arm/armv7/Makefile.inc: Fix processing ld files with clang When processing linker scripts clang needs to be set for the proper target or it gets confused by other options. Change-Id: I040aa14a06c728269ca1026e0002392e5ac8fef8 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/arch/arm/armv7/Makefile.inc 1 file changed, 19 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/69744/1 diff --git a/src/arch/arm/armv7/Makefile.inc b/src/arch/arm/armv7/Makefile.inc index 5675a26..d9f78e5 100644 --- a/src/arch/arm/armv7/Makefile.inc +++ b/src/arch/arm/armv7/Makefile.inc @@ -8,6 +8,12 @@ armv7_asm_flags = -Wa,-mthumb -Wa,-mimplicit-it=always ifeq ($(CONFIG_COMPILER_GCC),y) armv7_asm_flags += -Wa,-mno-warn-deprecated +else # CLANG +bootblock-ld-ccopts += -target arm-eabi +verstage-ld-ccopts += -target arm-eabi +romstage-ld-ccopts += -target arm-eabi +ramstage-ld-ccopts += -target arm-eabi +rmodule_arm-ld-ccopts += -target arm-eabi endif armv7-r_asm_flags = $(armv7-r_flags) $(armv7_asm_flags) -- To view, visit https://review.coreboot.org/c/coreboot/+/69744 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I040aa14a06c728269ca1026e0002392e5ac8fef8 Gerrit-Change-Number: 69744 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: arch/arm/eabi_compat.c: Add eabi_clr
by Arthur Heymans (Code Review) 17 Nov '22

17 Nov '22

Attention is currently required from: Julius Werner. Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69743 ) Change subject: arch/arm/eabi_compat.c: Add eabi_clr ...................................................................... arch/arm/eabi_compat.c: Add eabi_clr Clang generated code uses this for zero initialized variables. Change-Id: I460a0096918141c1cf8826bdf1853a3aa3aecff8 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/arch/arm/eabi_compat.c 1 file changed, 27 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/69743/1 diff --git a/src/arch/arm/eabi_compat.c b/src/arch/arm/eabi_compat.c index cbc285c..4e7afe4 100644 --- a/src/arch/arm/eabi_compat.c +++ b/src/arch/arm/eabi_compat.c @@ -34,3 +34,18 @@ { (void) memset(dest, c, n); } + +/* Support the alias for the __aeabi_memclr which may + assume memory alignment. */ +void __aeabi_memclr4 (void *dest, size_t n) + __attribute((alias ("__aeabi_memclr"))); + +void __aeabi_memclr8 (void *dest, size_t n) + __attribute((alias ("__aeabi_memclr"))); + +/* Support the routine __aeabi_memclr. */ +void __aeabi_memclr (void *dest, size_t n); +void __aeabi_memclr (void *dest, size_t n) +{ + __aeabi_memset (dest, n, 0); +} -- To view, visit https://review.coreboot.org/c/coreboot/+/69743 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I460a0096918141c1cf8826bdf1853a3aa3aecff8 Gerrit-Change-Number: 69743 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: newchange

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coreboot-gerrit November 2022