coreboot-gerrit November 2022

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[M] Change in coreboot[master]: cbmem_top: Change the return value to uintptr_t
by Elyes Haouas (Code Review) 17 Nov '22

17 Nov '22

Attention is currently required from: Raul Rangel, Jeff Daly, Jonathan Zhang, Matt DeVillier, Julius Werner, Angel Pons, Arthur Heymans, Andrey Petrov, Lance Zhao, Jason Glenesk, Johnny Lin, Tim Wawrzynczak, Christian Walter, Vanessa Eusebio, Fred Reitberger, Elyes Haouas, Tim Chu, Felix Held. Hello Jeff Daly, Raul Rangel, Jakub Czapiga, Jonathan Zhang, Matt DeVillier, Julius Werner, Angel Pons, Arthur Heymans, Andrey Petrov, Lance Zhao, Jason Glenesk, Johnny Lin, Tim Wawrzynczak, Christian Walter, Vanessa Eusebio, Fred Reitberger, Felix Held, Tim Chu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/69163 to look at the new patch set (#9). Change subject: cbmem_top: Change the return value to uintptr_t ...................................................................... cbmem_top: Change the return value to uintptr_t Get rid of a lot of casts. Change-Id: Ib757c0548f6f643747ba8d70228b3d6dfa5182cd Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> --- M src/arch/x86/postcar_loader.c M src/drivers/amd/agesa/mtrr_fixme.c M src/drivers/intel/fsp1_1/car.c M src/drivers/intel/fsp2_0/hob_verify.c M src/drivers/mrc_cache/mrc_cache.c M src/include/cbmem.h M src/lib/imd_cbmem.c M src/lib/prog_loaders.c M src/northbridge/intel/e7505/memmap.c M src/northbridge/intel/gm45/memmap.c M src/northbridge/intel/gm45/northbridge.c M src/northbridge/intel/haswell/memmap.c M src/northbridge/intel/i440bx/memmap.c M src/northbridge/intel/i945/memmap.c M src/northbridge/intel/i945/northbridge.c M src/northbridge/intel/ironlake/memmap.c M src/northbridge/intel/pineview/memmap.c M src/northbridge/intel/sandybridge/memmap.c M src/northbridge/intel/x4x/memmap.c M src/northbridge/intel/x4x/northbridge.c M src/soc/amd/cezanne/root_complex.c M src/soc/amd/glinda/root_complex.c M src/soc/amd/mendocino/root_complex.c M src/soc/amd/morgana/root_complex.c M src/soc/amd/picasso/root_complex.c M src/soc/amd/stoneyridge/memmap.c M src/soc/amd/stoneyridge/northbridge.c M src/soc/amd/stoneyridge/romstage.c M src/soc/intel/baytrail/memmap.c M src/soc/intel/broadwell/memmap.c M src/soc/intel/common/block/systemagent/memmap.c M src/soc/intel/common/block/systemagent/systemagent.c M src/soc/intel/denverton_ns/acpi.c M src/soc/intel/denverton_ns/memmap.c M src/soc/intel/denverton_ns/systemagent.c M src/soc/intel/quark/memmap.c M src/soc/intel/quark/northcluster.c M src/soc/intel/xeon_sp/memmap.c M src/soc/intel/xeon_sp/uncore.c 39 files changed, 63 insertions(+), 81 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/69163/9 -- To view, visit https://review.coreboot.org/c/coreboot/+/69163 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib757c0548f6f643747ba8d70228b3d6dfa5182cd Gerrit-Change-Number: 69163 Gerrit-PatchSet: 9 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Lance Zhao Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: cbmem_top: Change the return value to uintptr_t
by Elyes Haouas (Code Review) 17 Nov '22

17 Nov '22

Attention is currently required from: Raul Rangel, Jeff Daly, Jonathan Zhang, Matt DeVillier, Julius Werner, Angel Pons, Arthur Heymans, Andrey Petrov, Lance Zhao, Jason Glenesk, Johnny Lin, Tim Wawrzynczak, Christian Walter, Vanessa Eusebio, Fred Reitberger, Elyes Haouas, Tim Chu, Felix Held. Hello Jeff Daly, Raul Rangel, Jakub Czapiga, Jonathan Zhang, Matt DeVillier, Julius Werner, Angel Pons, Arthur Heymans, Andrey Petrov, Lance Zhao, Jason Glenesk, Johnny Lin, Tim Wawrzynczak, Christian Walter, Vanessa Eusebio, Fred Reitberger, Felix Held, Tim Chu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/69163 to look at the new patch set (#8). Change subject: cbmem_top: Change the return value to uintptr_t ...................................................................... cbmem_top: Change the return value to uintptr_t Get rid of a lot of casts. Change-Id: Ib757c0548f6f643747ba8d70228b3d6dfa5182cd Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> --- M src/arch/x86/postcar_loader.c M src/drivers/amd/agesa/mtrr_fixme.c M src/drivers/intel/fsp1_1/car.c M src/drivers/intel/fsp2_0/hob_verify.c M src/drivers/mrc_cache/mrc_cache.c M src/include/cbmem.h M src/lib/imd_cbmem.c M src/lib/prog_loaders.c M src/northbridge/intel/gm45/memmap.c M src/northbridge/intel/gm45/northbridge.c M src/northbridge/intel/haswell/memmap.c M src/northbridge/intel/i440bx/memmap.c M src/northbridge/intel/i945/memmap.c M src/northbridge/intel/i945/northbridge.c M src/northbridge/intel/ironlake/memmap.c M src/northbridge/intel/pineview/memmap.c M src/northbridge/intel/sandybridge/memmap.c M src/northbridge/intel/x4x/memmap.c M src/northbridge/intel/x4x/northbridge.c M src/soc/amd/cezanne/root_complex.c M src/soc/amd/glinda/root_complex.c M src/soc/amd/mendocino/root_complex.c M src/soc/amd/morgana/root_complex.c M src/soc/amd/picasso/root_complex.c M src/soc/amd/stoneyridge/memmap.c M src/soc/amd/stoneyridge/northbridge.c M src/soc/amd/stoneyridge/romstage.c M src/soc/intel/baytrail/memmap.c M src/soc/intel/broadwell/memmap.c M src/soc/intel/common/block/systemagent/memmap.c M src/soc/intel/common/block/systemagent/systemagent.c M src/soc/intel/denverton_ns/acpi.c M src/soc/intel/denverton_ns/memmap.c M src/soc/intel/denverton_ns/systemagent.c M src/soc/intel/quark/memmap.c M src/soc/intel/quark/northcluster.c M src/soc/intel/xeon_sp/memmap.c M src/soc/intel/xeon_sp/uncore.c 38 files changed, 61 insertions(+), 49 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/69163/8 -- To view, visit https://review.coreboot.org/c/coreboot/+/69163 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib757c0548f6f643747ba8d70228b3d6dfa5182cd Gerrit-Change-Number: 69163 Gerrit-PatchSet: 8 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Lance Zhao Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: soc/amd/common/acpi: Implement DTTS Proposal
by Dtrain Hsu (Code Review) 17 Nov '22

17 Nov '22

Attention is currently required from: Raul Rangel, Jason Nien, EricKY Cheng, Matt DeVillier, Paul Menzel, Eric Lai, Martin Roth, Eric Peers, LeilaCY Lin, Jason Glenesk, Caveh Jalali, Tim Wawrzynczak, Fred Reitberger, Karthikeyan Ramasubramanian, Boris Mittelberg, Felix Held. Dtrain Hsu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68471 ) Change subject: soc/amd/common/acpi: Implement DTTS Proposal ...................................................................... Patch Set 53: Code-Review+1 (1 comment) File src/soc/amd/common/acpi/DTTS.asl: https://review.coreboot.org/c/coreboot/+/68471/comment/1d361404_174de6ca PS53, Line 10: Method (DTTS, 0, Serialized) Could you help to point out where calls DTTS()? I did not see it. Thanks. -- To view, visit https://review.coreboot.org/c/coreboot/+/68471 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I866e5e497e2936984e713029b5f0b6d54cbc9622 Gerrit-Change-Number: 68471 Gerrit-PatchSet: 53 Gerrit-Owner: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Boris Mittelberg <bmbm(a)google.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Peers <epeers(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-CC: LeilaCY Lin <leilacy_lin(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Eric Peers <epeers(a)google.com> Gerrit-Attention: LeilaCY Lin <leilacy_lin(a)compal.corp-partner.google.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Caveh Jalali <caveh(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Attention: Boris Mittelberg <bmbm(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 17 Nov 2022 09:52:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: util/genbuild_h: Set fixed git hash length
by Michał Żygowski (Code Review) 17 Nov '22

17 Nov '22

Attention is currently required from: Maciej Pijanowski. Hello Maciej Pijanowski, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/69716 to review the following change. Change subject: util/genbuild_h: Set fixed git hash length ...................................................................... util/genbuild_h: Set fixed git hash length The commit hash length as produced by the genbuild_h.sh can differ depending on the environment (not really sure whether git version, config, or anything else is the reason here). By focing fixed length, we can improve build reproducibility on different machines, as this information is stored in the binary as the COREBOOT_ORIGIN_GIT_REVISION string. See below reference on heads issue describing similar problem: https://github.com/osresearch/heads/pull/1228 Signed-off-by: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Change-Id: Idf77596e5af7115417a400956678b8aaaf67c3b0 --- M util/genbuild_h/genbuild_h.sh 1 file changed, 22 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/69716/1 diff --git a/util/genbuild_h/genbuild_h.sh b/util/genbuild_h/genbuild_h.sh index 8c72ddf..e7e1a10 100755 --- a/util/genbuild_h/genbuild_h.sh +++ b/util/genbuild_h/genbuild_h.sh @@ -20,8 +20,8 @@ # $1: format string get_git_head_data() { - LANG= git log --no-show-signature -1 --format="format:$1" 2>/dev/null || \ - LANG= git log -1 --format="format:$1" + LANG= git log --no-show-signature -1 --abbrev=10 --format="format:$1" 2>/dev/null || \ + LANG= git log -1 --abbrev=10 --format="format:$1" } if [ "${BUILD_TIMELESS}" = "1" ]; then -- To view, visit https://review.coreboot.org/c/coreboot/+/69716 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idf77596e5af7115417a400956678b8aaaf67c3b0 Gerrit-Change-Number: 69716 Gerrit-PatchSet: 1 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-Attention: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-MessageType: newchange

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[M] Change in coreboot[master]: soc/intel/meteorlake: Log CSE RO write protection info for MTL
by Kapil Porwal (Code Review) 17 Nov '22

17 Nov '22

Attention is currently required from: Tarun Tuli, Subrata Banik. Kapil Porwal has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69571 ) Change subject: soc/intel/meteorlake: Log CSE RO write protection info for MTL ...................................................................... Patch Set 7: (1 comment) File src/soc/intel/meteorlake/me.c: https://review.coreboot.org/c/coreboot/+/69571/comment/b2c6a8da_7a2e097d PS6, Line 79: > consider dividing this CL into 3 Cls further […] Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/69571 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idb072a873a8b8323532799f5fc64f995c9f0a604 Gerrit-Change-Number: 69571 Gerrit-PatchSet: 7 Gerrit-Owner: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Comment-Date: Thu, 17 Nov 2022 09:38:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/meteorlake: Print vars related to ME mfg mode
by Kapil Porwal (Code Review) 17 Nov '22

17 Nov '22

Attention is currently required from: Tarun Tuli, Subrata Banik. Kapil Porwal has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69739 ) Change subject: soc/intel/meteorlake: Print vars related to ME mfg mode ...................................................................... soc/intel/meteorlake: Print vars related to ME mfg mode BUG=none TEST=Build and boot to google/rex. Excerpt from google/rex coreboot log: [DEBUG] ME: FPFs Committed : NO [DEBUG] ME: Manufacturing Vars Locked : NO Signed-off-by: Kapil Porwal <kapilporwal(a)google.com> Change-Id: Iec07c1f951fbbf51541917c8b99d19f2f12980b2 --- M src/soc/intel/meteorlake/me.c 1 file changed, 21 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/69739/1 diff --git a/src/soc/intel/meteorlake/me.c b/src/soc/intel/meteorlake/me.c index 68cb62c..abac8ba 100644 --- a/src/soc/intel/meteorlake/me.c +++ b/src/soc/intel/meteorlake/me.c @@ -124,6 +124,10 @@ */ printk(BIOS_DEBUG, "ME: SPI Protection Mode Enabled : %s\n", hfsts1.fields.mfg_mode ? "NO" : "YES"); + printk(BIOS_DEBUG, "ME: FPFs Committed : %s\n", + hfsts6.fields.fpf_soc_lock ? "YES" : "NO"); + printk(BIOS_DEBUG, "ME: Manufacturing Vars Locked : %s\n", + hfsts6.fields.manuf_lock ? "YES" : "NO"); printk(BIOS_DEBUG, "ME: FW Partition Table : %s\n", hfsts1.fields.fpt_bad ? "BAD" : "OK"); printk(BIOS_DEBUG, "ME: Bringup Loader Failure : %s\n", -- To view, visit https://review.coreboot.org/c/coreboot/+/69739 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iec07c1f951fbbf51541917c8b99d19f2f12980b2 Gerrit-Change-Number: 69739 Gerrit-PatchSet: 1 Gerrit-Owner: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: soc/intel/meteorlake: Rename method is_eom to is_manuf_mode
by Kapil Porwal (Code Review) 17 Nov '22

17 Nov '22

Attention is currently required from: Tarun Tuli, Subrata Banik. Kapil Porwal has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69698 ) Change subject: soc/intel/meteorlake: Rename method is_eom to is_manuf_mode ...................................................................... soc/intel/meteorlake: Rename method is_eom to is_manuf_mode BUG=none TEST=Build and boot to google/rex. Excerpt from google/rex coreboot log: [DEBUG] ME: Manufacturing Mode : YES Signed-off-by: Kapil Porwal <kapilporwal(a)google.com> Change-Id: I8d2de3365126ba618c987c412c4e9784012f9e0b --- M src/soc/intel/meteorlake/me.c 1 file changed, 27 insertions(+), 10 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/69698/1 diff --git a/src/soc/intel/meteorlake/me.c b/src/soc/intel/meteorlake/me.c index 743e963..68cb62c 100644 --- a/src/soc/intel/meteorlake/me.c +++ b/src/soc/intel/meteorlake/me.c @@ -76,16 +76,15 @@ } __packed fields; }; - -/* - * Manufacturing mode is disabled if the descriptor is locked, fuses - * are programmed and manufacturing variables are locked. - * The function returns true if manufacturing mode is disabled otherwise false. - */ -static bool is_eom(union me_hfsts1 hfsts1, union me_hfsts6 hfsts6) +static bool is_manuf_mode(union me_hfsts1 hfsts1, union me_hfsts6 hfsts6) { - return (hfsts1.fields.mfg_mode == 0) && (hfsts6.fields.manuf_lock == 1) && - (hfsts6.fields.fpf_soc_lock == 1); + /* + * ME manufacturing mode is disabled if the descriptor is locked, fuses + * are programmed and manufacturing variables are locked. + */ + return !((hfsts1.fields.mfg_mode == 0) && + (hfsts6.fields.fpf_soc_lock == 1) && + (hfsts6.fields.manuf_lock == 1)); } static void dump_me_status(void *unused) @@ -96,6 +95,7 @@ union me_hfsts4 hfsts4; union me_hfsts5 hfsts5; union me_hfsts6 hfsts6; + bool manuf_mode; if (!is_cse_enabled()) return; @@ -114,8 +114,9 @@ printk(BIOS_DEBUG, "ME: HFSTS5 : 0x%08X\n", hfsts5.data); printk(BIOS_DEBUG, "ME: HFSTS6 : 0x%08X\n", hfsts6.data); + manuf_mode = is_manuf_mode(hfsts1, hfsts6); printk(BIOS_DEBUG, "ME: Manufacturing Mode : %s\n", - is_eom(hfsts1, hfsts6) ? "NO" : "YES"); + manuf_mode ? "YES" : "NO"); /* * The SPI Protection Mode bit reflects SPI descriptor -- To view, visit https://review.coreboot.org/c/coreboot/+/69698 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8d2de3365126ba618c987c412c4e9784012f9e0b Gerrit-Change-Number: 69698 Gerrit-PatchSet: 1 Gerrit-Owner: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: newchange

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[M] Change in coreboot[master]: soc/intel/meteorlake: Log CSE RO write protection info for MTL
by Kapil Porwal (Code Review) 17 Nov '22

17 Nov '22

Attention is currently required from: Tarun Tuli, Kapil Porwal. Hello build bot (Jenkins), Tarun Tuli, Subrata Banik, Sridhar Siricilla, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/69571 to look at the new patch set (#7). Change subject: soc/intel/meteorlake: Log CSE RO write protection info for MTL ...................................................................... soc/intel/meteorlake: Log CSE RO write protection info for MTL The patch logs CSE RO's write protection information for Meteor Lake platform. As part of write protection information, coreboot logs status on CSE RO write protection and range. Also, logs error message if EOM is disabled, and write protection for CSE RO is not enabled. Port of commit abe0d810f009 ("soc/intel/alderlake: Log CSE RO write protection info for ADL"). BUG=none TEST=Verify the write protection details on google/rex. Excerpt from google/rex coreboot log: [DEBUG] ME: WP for RO is enabled : YES [DEBUG] ME: RO write protection scope - Start=0x4000, End=0x396FFF Signed-off-by: Kapil Porwal <kapilporwal(a)google.com> Change-Id: Idb072a873a8b8323532799f5fc64f995c9f0a604 --- M src/soc/intel/meteorlake/me.c 1 file changed, 51 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/69571/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/69571 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idb072a873a8b8323532799f5fc64f995c9f0a604 Gerrit-Change-Number: 69571 Gerrit-PatchSet: 7 Gerrit-Owner: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-MessageType: newpatchset

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[L] Change in coreboot[master]: ifdtool: Move regions to seperate file
by build bot (Jenkins) (Code Review) 17 Nov '22

17 Nov '22

Attention is currently required from: Patrick Rudolph, Stefan Reinauer. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68695 ) Change subject: ifdtool: Move regions to seperate file ...................................................................... Patch Set 7: Verified-1 (1 comment) File util/ifdtool/regions.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-163890): https://review.coreboot.org/c/coreboot/+/68695/comment/6f429172_b24450d4 PS7, Line 186: } adding a line without newline at end of file -- To view, visit https://review.coreboot.org/c/coreboot/+/68695 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6a1ba1799c69881b1f48d903b8f86e7cd93815c2 Gerrit-Change-Number: 68695 Gerrit-PatchSet: 7 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julian Elischer <jrelis(a)google.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Comment-Date: Thu, 17 Nov 2022 09:31:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[L] Change in coreboot[master]: security/tpm: add TPM log format as per 1.2 spec
by Michał Żygowski (Code Review) 17 Nov '22

17 Nov '22

Attention is currently required from: Maciej Pijanowski, Christian Walter, Julius Werner, Krystian Hebel, Sergii Dmytruk. Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68747 ) Change subject: security/tpm: add TPM log format as per 1.2 spec ...................................................................... Patch Set 6: (2 comments) File src/commonlib/include/commonlib/tpm_log_defs.h: https://review.coreboot.org/c/coreboot/+/68747/comment/7aa2aaa4_67025f1c PS5, Line 1: /* SPDX-License-Identifier: GPL-2.0-only */ > It's partially based on a commit by Michał Żygowski, so asked him. […] It even should be moved to bsd includes. Let's do it. File src/security/tpm/Kconfig: https://review.coreboot.org/c/coreboot/+/68747/comment/00d039d0_e812707b PS5, Line 108: bool "TPM 1.2 format" > I don't think such usage is forbidden. Isn't TPM2.0 using only crypto agile format?? -- To view, visit https://review.coreboot.org/c/coreboot/+/68747 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I89720615a75573d44dd0a39ad3d7faa78f125843 Gerrit-Change-Number: 68747 Gerrit-PatchSet: 6 Gerrit-Owner: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Attention: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Comment-Date: Thu, 17 Nov 2022 09:30:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Comment-In-Reply-To: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-MessageType: comment

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