coreboot-gerrit November 2022

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[XL] Change in coreboot[master]: [WIP]zstd support
by Julius Werner (Code Review) 18 Nov '22

18 Nov '22

Attention is currently required from: Shelley Chen, Martin L Roth, Arthur Heymans. Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69753 ) Change subject: [WIP]zstd support ...................................................................... Patch Set 1: (11 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/69753/comment/a346ff0b_09c54bdd PS1, Line 13: now... Did you use ZSTD_initStaticDCtx() for that? With a local buffer or something? That whole API is very strange to me, with the way you need to pass a custom buffer and call the estimateSize function (although the size for DCtxs seems to be simple and constant). It seems like you could probably just do ``` static ZSTD_DCtx dctx; /* global */ ... ZSTD_initStaticDCtx((void *)&dctx, sizeof(dctx)); ZSTD_decompressDCtx(&dctx, ...); ``` although that's a very roundabout way to just give it a pointer to a global. Patchset: PS1: Cool! Seems like a lot of people are interested in improving decompression lately. I hope you can figure out where the performance is getting stuck right now. File src/commonlib/Makefile.inc: https://review.coreboot.org/c/coreboot/+/69753/comment/ce0ba6fb_a2135574 PS1, Line 72: ramstage-y += zstd-1.5.2/lib/common/zstd_common.c This should go into commonlib/bsd so it can be shared with libpayload (looks like the sources are all BSD anyway, or did I miss something?). File src/commonlib/zstd-1.5.2/lib/common/cpu.h: https://review.coreboot.org/c/coreboot/+/69753/comment/50cba043_cdcb0363 PS1, Line 32: MEM_STATIC ZSTD_cpuid_t ZSTD_cpuid(void) { We should be deciding any CPU features at compile-time via Kconfig rather than having it do runtime detection. That should save a bit of binary size and possibly also make it faster. (Not sure if this is actually used in decompression?) File src/commonlib/zstd-1.5.2/lib/common/debug.c: https://review.coreboot.org/c/coreboot/+/69753/comment/ca15d014_9d9b82d5 PS1, Line 19: * such as DEBUGLOG and RAWLOG Removing support for this dynamic tracing might save some instructions/branches. File src/commonlib/zstd-1.5.2/lib/common/error_private.c: https://review.coreboot.org/c/coreboot/+/69753/comment/b973e827_688363ca PS1, Line 15: const char* ERR_getErrorString(ERR_enum code) Could probably save a few 100 bytes by turning this into numbers if necessary. File src/commonlib/zstd-1.5.2/lib/common/mem.h: https://review.coreboot.org/c/coreboot/+/69753/comment/3cc2cd16_3e761f02 PS1, Line 145: * In some circumstances, it's the only known way to get the most performance (i.e. GCC + ARMv6) We could probably use 2 here, that's what we're doing in a lot of other code as well. https://review.coreboot.org/c/coreboot/+/69753/comment/777a3ab8_3701c95a PS1, Line 174: return one.c[0]; This might be one of the reasons it's slow, because it can't compile-time detect this for GCC. Tying it into our <endian.h> may make things more efficient. File src/commonlib/zstd-1.5.2/lib/common/xxhash.h: https://review.coreboot.org/c/coreboot/+/69753/comment/5ff1d316_d3751a66 PS1, Line 14: We have this in src/lib. Probably better to take it from there than to have it in the binary twice. https://review.coreboot.org/c/coreboot/+/69753/comment/3695bd5f_b3609a3d PS1, Line 1629: #elif (defined(XXH_FORCE_MEMORY_ACCESS) && (XXH_FORCE_MEMORY_ACCESS==2)) More low-level access wrappers that might be generating suboptimal code depending on how this preprocessor soup works out. The version we have in src/lib should be doing the right things already (I hope). File util/cbfstool/compress.c: https://review.coreboot.org/c/coreboot/+/69753/comment/ddbf46d1_b57e4341 PS1, Line 66: ZSTD_maxCLevel Have you played around with different levels? Maybe a lower level would make decompression faster? -- To view, visit https://review.coreboot.org/c/coreboot/+/69753 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I34508268f8767008ef25cb9e466d201345881232 Gerrit-Change-Number: 69753 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Fri, 18 Nov 2022 01:09:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: mb/google/brya/variants/crota: Configure TDC current for VR domains.
by Eric Lai (Code Review) 18 Nov '22

18 Nov '22

Eric Lai has submitted this change. ( https://review.coreboot.org/c/coreboot/+/69135 ) Change subject: mb/google/brya/variants/crota: Configure TDC current for VR domains. ...................................................................... mb/google/brya/variants/crota: Configure TDC current for VR domains. +-----------+-------+-------+---------+-------------+----------+ | Setting | AC LL | DC LL | ICC MAX | TDC Current | TDC Time | | |(mOhms)|(mOhms)| (A) | (A) | (msec) | +-----------+-------+-------+---------+-------------+----------+ | IA | 2.8 | 2.8 | 80 | 43 | 28000 | +-----------+-------+-------+---------+-------------+----------+ | GT | 3.2 | 3.2 | 40 | 23 | 28000 | +-----------+-------+-------+---------+-------------+----------+ - IA TDC current from 20A to 43A. - GT TDC current from 20A to 23A. BUG=b:256754175 TEST=Build test image and use PTAT to check IA and GT value Signed-off-by: Johnny Li <johnny_li(a)wistron.corp-partner.google.com> Change-Id: Ife36655f077bae567bff3c3e33f779c990cf5ed9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/69135 Reviewed-by: Tarun Tuli <taruntuli(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Paul Yang <paul.f.yang(a)intel.corp-partner.google.com> Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> --- M src/mainboard/google/brya/variants/crota/overridetree.cb 1 file changed, 53 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Sumeet R Pawnikar: Looks good to me, approved Paul Yang: Looks good to me, but someone else must approve Tarun Tuli: Looks good to me, but someone else must approve diff --git a/src/mainboard/google/brya/variants/crota/overridetree.cb b/src/mainboard/google/brya/variants/crota/overridetree.cb index 847cf6c..01a8aad 100644 --- a/src/mainboard/google/brya/variants/crota/overridetree.cb +++ b/src/mainboard/google/brya/variants/crota/overridetree.cb @@ -21,6 +21,31 @@ register "sagv" = "SaGv_Enabled" register "max_dram_speed_mts" = "4800" register "cnvi_bt_audio_offload" = "1" + # +-----------+-------+-------+---------+-------------+----------+ + # | Setting | AC LL | DC LL | ICC MAX | TDC Current | TDC Time | + # | |(mOhms)|(mOhms)| (A) | (A) | (msec) | + # +-----------+-------+-------+---------+-------------+----------+ + # | IA | 2.8 | 2.8 | 80 | 43 | 28000 | + # +-----------+-------+-------+---------+-------------+----------+ + # | GT | 3.2 | 3.2 | 40 | 23 | 28000 | + # +-----------+-------+-------+---------+-------------+----------+ + register "domain_vr_config[VR_DOMAIN_IA]" = "{ + .vr_config_enable = 1, + .ac_loadline = 280, + .dc_loadline = 280, + .icc_max = VR_CFG_AMP(80), + .tdc_timewindow = 28000, + .tdc_currentlimit = VR_CFG_TDC_AMP(43), + }" + + register "domain_vr_config[VR_DOMAIN_GT]" = "{ + .vr_config_enable = 1, + .ac_loadline = 320, + .dc_loadline = 320, + .icc_max = VR_CFG_AMP(40), + .tdc_timewindow = 28000, + .tdc_currentlimit = VR_CFG_TDC_AMP(23), + }" # Acoustic settings register "acoustic_noise_mitigation" = "1" -- To view, visit https://review.coreboot.org/c/coreboot/+/69135 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ife36655f077bae567bff3c3e33f779c990cf5ed9 Gerrit-Change-Number: 69135 Gerrit-PatchSet: 10 Gerrit-Owner: Johnny Li <johnny_li(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Paul F Yang <paul.f.yang(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Paul Yang <paul.f.yang(a)intel.corp-partner.google.com> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-CC: Peter Chi <peter_chi(a)wistron.corp-partner.google.com> Gerrit-CC: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-CC: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: mb/google/rex: Disable `ACPI PM timer`
by Eric Lai (Code Review) 18 Nov '22

18 Nov '22

Attention is currently required from: Tarun Tuli, Subrata Banik. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69685 ) Change subject: mb/google/rex: Disable `ACPI PM timer` ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/69685 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2a23b417ff7fb6328323380a7df46b4b397fc8eb Gerrit-Change-Number: 69685 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Comment-Date: Fri, 18 Nov 2022 00:37:20 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/rex: Enable TCSS DisplayPort detection at preboot
by Eric Lai (Code Review) 18 Nov '22

18 Nov '22

Attention is currently required from: Tarun Tuli, John Zhao, Kapil Porwal. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67742 ) Change subject: mb/google/rex: Enable TCSS DisplayPort detection at preboot ...................................................................... Patch Set 7: (1 comment) File src/mainboard/google/rex/Kconfig: https://review.coreboot.org/c/coreboot/+/67742/comment/ae30de68_6a8c8c46 PS7, Line 30: RUN_FSP_GOP Any condition we don't have RUN_FSP_GOP on Rex? -- To view, visit https://review.coreboot.org/c/coreboot/+/67742 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1a8a13e937c7132696aa39d85c3c6b6fb2dd13a5 Gerrit-Change-Number: 67742 Gerrit-PatchSet: 7 Gerrit-Owner: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: John Zhao <john.zhao(a)intel.corp-partner.google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: John Zhao <john.zhao(a)intel.com> Gerrit-Comment-Date: Fri, 18 Nov 2022 00:36:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: ec/google/chromeec: Remove EC_HOST_EVENT_USB_CHARGER
by Eric Lai (Code Review) 18 Nov '22

18 Nov '22

Attention is currently required from: Tarun Tuli, Jason Nien, Caveh Jalali, Kapil Porwal, Nick Vaccaro, Martin Roth, Boris Mittelberg. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69374 ) Change subject: ec/google/chromeec: Remove EC_HOST_EVENT_USB_CHARGER ...................................................................... Patch Set 4: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/69374 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9e3e0e9b45385766343489ae2d8fc43fb0954923 Gerrit-Change-Number: 69374 Gerrit-PatchSet: 4 Gerrit-Owner: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Boris Mittelberg <bmbm(a)google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Caveh Jalali <caveh(a)chromium.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Boris Mittelberg <bmbm(a)google.com> Gerrit-Comment-Date: Fri, 18 Nov 2022 00:31:09 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: Makefile.inc: Remove workaround ACPI warnings
by Felix Held (Code Review) 18 Nov '22

18 Nov '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/69514 ) Change subject: Makefile.inc: Remove workaround ACPI warnings ...................................................................... Makefile.inc: Remove workaround ACPI warnings No boards now have a missing dependency so remove the workaround. Change-Id: I787f6aa588175ba620a068918c42edc9d257c3ef Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69514 Reviewed-by: Nico Huber <nico.h(a)gmx.de> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Elyes Haouas <ehaouas(a)noos.fr> Reviewed-by: Felix Held <felix-coreboot(a)felixheld.de> --- M Makefile.inc M src/mainboard/acer/g43t-am3/Kconfig M src/mainboard/asrock/h81m-hds/Kconfig M src/mainboard/asus/h61-series/Kconfig M src/mainboard/asus/p5qpl-am/Kconfig M src/mainboard/foxconn/d41s/Kconfig M src/mainboard/foxconn/g41s-k/Kconfig M src/mainboard/gigabyte/ga-d510ud/Kconfig M src/mainboard/intel/dcp847ske/Kconfig M src/mainboard/intel/dg41wv/Kconfig M src/mainboard/intel/dg43gt/Kconfig M src/mainboard/intel/emeraldlake2/Kconfig M src/mainboard/supermicro/x10slm-f/Kconfig M src/mainboard/supermicro/x9scl/Kconfig 14 files changed, 17 insertions(+), 56 deletions(-) Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, but someone else must approve Felix Held: Looks good to me, approved Elyes Haouas: Looks good to me, approved diff --git a/Makefile.inc b/Makefile.inc index 563a2bc..b4c2cdf 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -265,26 +265,9 @@ # ResourceTemplate is the correct code. # As it's valid ASL, disable the warning. EMPTY_RESOURCE_TEMPLATE_WARNING = 3150 -# IASL compiler check for usage of _CRS, _DIS, _PRS, and _SRS objects: -# 1) If _PRS is present, must have _CRS and _SRS -# 2) If _SRS is present, must have _PRS (_PRS requires _CRS and _SRS) -# 3) If _DIS is present, must have _SRS (_SRS requires _PRS, _PRS requires _CRS and _SRS) -# 4) If _SRS is present, probably should have a _DIS (Remark only) -# A warning will be issued for each of these cases. -# For existing ASL code, ignore this warnings -IASL_MISSING_DEPENDENCY = 3141 IASL_WARNINGS_LIST = $(EMPTY_RESOURCE_TEMPLATE_WARNING) -ifeq ($(CONFIG_IGNORE_IASL_MISSING_DEPENDENCY),y) - IASL_WARNINGS_LIST += $(IASL_MISSING_DEPENDENCY) -build_complete:: - printf "*** WARNING: The ASL code for this platform is incomplete. Please fix it. ***\n" - printf "*** If _PRS is present, must have _CRS and _SRS ***\n" - printf "*** If _SRS is present, must have _PRS and _CRS ***\n" - printf "*** If _DIS is present, must have _SRS, _PRS and _CRS ***\n" -endif - IGNORED_IASL_WARNINGS = $(addprefix -vw , $(IASL_WARNINGS_LIST)) define asl_template diff --git a/src/mainboard/acer/g43t-am3/Kconfig b/src/mainboard/acer/g43t-am3/Kconfig index dd2bf3f..1d4fd53 100644 --- a/src/mainboard/acer/g43t-am3/Kconfig +++ b/src/mainboard/acer/g43t-am3/Kconfig @@ -2,9 +2,6 @@ if BOARD_ACER_G43T_AM3 -config IGNORE_IASL_MISSING_DEPENDENCY - def_bool y - config BOARD_SPECIFIC_OPTIONS def_bool y select CPU_INTEL_SOCKET_LGA775 diff --git a/src/mainboard/asrock/h81m-hds/Kconfig b/src/mainboard/asrock/h81m-hds/Kconfig index 4b21ec5..4edd2bc 100644 --- a/src/mainboard/asrock/h81m-hds/Kconfig +++ b/src/mainboard/asrock/h81m-hds/Kconfig @@ -2,9 +2,6 @@ if BOARD_ASROCK_H81M_HDS -config IGNORE_IASL_MISSING_DEPENDENCY - def_bool y - config BOARD_SPECIFIC_OPTIONS def_bool y select BOARD_ROMSIZE_KB_4096 diff --git a/src/mainboard/asus/h61-series/Kconfig b/src/mainboard/asus/h61-series/Kconfig index 48e4220..eeec4e7 100644 --- a/src/mainboard/asus/h61-series/Kconfig +++ b/src/mainboard/asus/h61-series/Kconfig @@ -14,9 +14,6 @@ if BOARD_ASUS_H61_SERIES -config IGNORE_IASL_MISSING_DEPENDENCY - def_bool y - config MAINBOARD_DIR default "asus/h61-series" diff --git a/src/mainboard/asus/p5qpl-am/Kconfig b/src/mainboard/asus/p5qpl-am/Kconfig index 100f591..2359e32 100644 --- a/src/mainboard/asus/p5qpl-am/Kconfig +++ b/src/mainboard/asus/p5qpl-am/Kconfig @@ -2,9 +2,6 @@ if BOARD_ASUS_P5QPL_AM || BOARD_ASUS_P5G41T_M_LX -config IGNORE_IASL_MISSING_DEPENDENCY - def_bool y - config BOARD_SPECIFIC_OPTIONS def_bool y select CPU_INTEL_SOCKET_LGA775 diff --git a/src/mainboard/foxconn/d41s/Kconfig b/src/mainboard/foxconn/d41s/Kconfig index 33d5e6d..6ddc7df 100644 --- a/src/mainboard/foxconn/d41s/Kconfig +++ b/src/mainboard/foxconn/d41s/Kconfig @@ -2,9 +2,6 @@ if BOARD_FOXCONN_D41S -config IGNORE_IASL_MISSING_DEPENDENCY - def_bool y - config BOARD_SPECIFIC_OPTIONS def_bool y select CPU_INTEL_SOCKET_FCBGA559 diff --git a/src/mainboard/foxconn/g41s-k/Kconfig b/src/mainboard/foxconn/g41s-k/Kconfig index a98a47a..b223759 100644 --- a/src/mainboard/foxconn/g41s-k/Kconfig +++ b/src/mainboard/foxconn/g41s-k/Kconfig @@ -2,9 +2,6 @@ if BOARD_FOXCONN_G41S_K || BOARD_FOXCONN_G41M -config IGNORE_IASL_MISSING_DEPENDENCY - def_bool y - config BOARD_SPECIFIC_OPTIONS def_bool y select CPU_INTEL_SOCKET_LGA775 diff --git a/src/mainboard/gigabyte/ga-d510ud/Kconfig b/src/mainboard/gigabyte/ga-d510ud/Kconfig index 4739f81..731b9f4 100644 --- a/src/mainboard/gigabyte/ga-d510ud/Kconfig +++ b/src/mainboard/gigabyte/ga-d510ud/Kconfig @@ -2,9 +2,6 @@ if BOARD_GIGABYTE_GA_D510UD -config IGNORE_IASL_MISSING_DEPENDENCY - def_bool y - config BOARD_SPECIFIC_OPTIONS def_bool y select BOARD_ROMSIZE_KB_512 diff --git a/src/mainboard/intel/dcp847ske/Kconfig b/src/mainboard/intel/dcp847ske/Kconfig index c5e5afd..ebc172b 100644 --- a/src/mainboard/intel/dcp847ske/Kconfig +++ b/src/mainboard/intel/dcp847ske/Kconfig @@ -1,8 +1,5 @@ if BOARD_INTEL_DCP847SKE -config IGNORE_IASL_MISSING_DEPENDENCY - def_bool y - config BOARD_SPECIFIC_OPTIONS def_bool y select BOARD_ROMSIZE_KB_8192 diff --git a/src/mainboard/intel/dg41wv/Kconfig b/src/mainboard/intel/dg41wv/Kconfig index 8c5a5d6..bb201bc 100644 --- a/src/mainboard/intel/dg41wv/Kconfig +++ b/src/mainboard/intel/dg41wv/Kconfig @@ -2,9 +2,6 @@ if BOARD_INTEL_DG41WV -config IGNORE_IASL_MISSING_DEPENDENCY - def_bool y - config BOARD_SPECIFIC_OPTIONS def_bool y select CPU_INTEL_SOCKET_LGA775 diff --git a/src/mainboard/intel/dg43gt/Kconfig b/src/mainboard/intel/dg43gt/Kconfig index 55b5cd0..c3c853c 100644 --- a/src/mainboard/intel/dg43gt/Kconfig +++ b/src/mainboard/intel/dg43gt/Kconfig @@ -2,9 +2,6 @@ if BOARD_INTEL_DG43GT -config IGNORE_IASL_MISSING_DEPENDENCY - def_bool y - config BOARD_SPECIFIC_OPTIONS def_bool y select CPU_INTEL_SOCKET_LGA775 diff --git a/src/mainboard/intel/emeraldlake2/Kconfig b/src/mainboard/intel/emeraldlake2/Kconfig index 0220d73..86fe98a 100644 --- a/src/mainboard/intel/emeraldlake2/Kconfig +++ b/src/mainboard/intel/emeraldlake2/Kconfig @@ -1,8 +1,5 @@ if BOARD_INTEL_EMERALDLAKE2 -config IGNORE_IASL_MISSING_DEPENDENCY - def_bool y - config BOARD_SPECIFIC_OPTIONS def_bool y select NORTHBRIDGE_INTEL_SANDYBRIDGE diff --git a/src/mainboard/supermicro/x10slm-f/Kconfig b/src/mainboard/supermicro/x10slm-f/Kconfig index 24e67c7..28c7c1a 100644 --- a/src/mainboard/supermicro/x10slm-f/Kconfig +++ b/src/mainboard/supermicro/x10slm-f/Kconfig @@ -2,9 +2,6 @@ if BOARD_SUPERMICRO_X10SLM_PLUS_F -config IGNORE_IASL_MISSING_DEPENDENCY - def_bool y - config BOARD_SPECIFIC_OPTIONS def_bool y select BOARD_ROMSIZE_KB_16384 diff --git a/src/mainboard/supermicro/x9scl/Kconfig b/src/mainboard/supermicro/x9scl/Kconfig index 469b791..40b4213 100644 --- a/src/mainboard/supermicro/x9scl/Kconfig +++ b/src/mainboard/supermicro/x9scl/Kconfig @@ -1,8 +1,5 @@ if BOARD_SUPERMICRO_X9SCL -config IGNORE_IASL_MISSING_DEPENDENCY - def_bool y - config BOARD_SPECIFIC_OPTIONS def_bool y select BOARD_ROMSIZE_KB_8192 -- To view, visit https://review.coreboot.org/c/coreboot/+/69514 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I787f6aa588175ba620a068918c42edc9d257c3ef Gerrit-Change-Number: 69514 Gerrit-PatchSet: 6 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[M] Change in coreboot[master]: Makefile.inc: Remove workaround ACPI warnings
by Felix Held (Code Review) 18 Nov '22

18 Nov '22

Attention is currently required from: Martin L Roth, Angel Pons, Arthur Heymans, Elyes Haouas. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69514 ) Change subject: Makefile.inc: Remove workaround ACPI warnings ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/69514 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I787f6aa588175ba620a068918c42edc9d257c3ef Gerrit-Change-Number: 69514 Gerrit-PatchSet: 5 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Comment-Date: Fri, 18 Nov 2022 00:14:03 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/skyrim/var/frostflow: Set Package Power Parameters
by Tim Van Patten (Code Review) 18 Nov '22

18 Nov '22

Attention is currently required from: John Su, Jason Nien, Matt DeVillier, Chris Wang, Martin Roth. Tim Van Patten has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69565 ) Change subject: mb/google/skyrim/var/frostflow: Set Package Power Parameters ...................................................................... Patch Set 4: (1 comment) File src/mainboard/google/skyrim/variants/frostflow/overridetree.cb: https://review.coreboot.org/c/coreboot/+/69565/comment/315b6137_9dca9d9b PS4, Line 10: register "stapm_time_constant_s" = "200" `stapm_time_constant_s` is the only value that's different from `src/mainboard/google/skyrim/variants/skyrim/overridetree.cb`. Assuming it works correctly, I think this CL should just be this single line, since it's not including all of the DPTC values defined in `skyrim/overridetree.cb` anyway. -- To view, visit https://review.coreboot.org/c/coreboot/+/69565 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I15a69df1436aba05bc19eaffd79394e5ca9bdb3a Gerrit-Change-Number: 69565 Gerrit-PatchSet: 4 Gerrit-Owner: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Reviewer: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-CC: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-CC: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-CC: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-CC: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-CC: Van Chen <van_chen(a)compal.corp-partner.google.com> Gerrit-Attention: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Comment-Date: Fri, 18 Nov 2022 00:10:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/skyrim/var/frostflow: Set Package Power Parameters
by Karthik Ramasubramanian (Code Review) 18 Nov '22

18 Nov '22

Attention is currently required from: John Su, Jason Nien, Matt DeVillier, Chris Wang, Martin Roth, Tim Van Patten. Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69565 ) Change subject: mb/google/skyrim/var/frostflow: Set Package Power Parameters ...................................................................... Patch Set 4: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/69565 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I15a69df1436aba05bc19eaffd79394e5ca9bdb3a Gerrit-Change-Number: 69565 Gerrit-PatchSet: 4 Gerrit-Owner: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Reviewer: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-CC: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-CC: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-CC: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-CC: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-CC: Van Chen <van_chen(a)compal.corp-partner.google.com> Gerrit-Attention: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Tim Van Patten <timvp(a)google.com> Gerrit-Comment-Date: Fri, 18 Nov 2022 00:00:13 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: driver/intel/fsp2_0/hand_off_block: rework fsp_display_fvi_version_hob
by Felix Held (Code Review) 18 Nov '22

18 Nov '22

Attention is currently required from: Subrata Banik, Arthur Heymans, Andrey Petrov. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69499 ) Change subject: driver/intel/fsp2_0/hand_off_block: rework fsp_display_fvi_version_hob ...................................................................... Patch Set 2: (1 comment) This change is ready for review. Commit Message: https://review.coreboot.org/c/coreboot/+/69499/comment/ce8b4482_548a18fc PS1, Line 12: > just noticed that the part of the commit message that should have said that this slightly changes be […] i've pushed an updated version that supports multiple uuid_fv_info hobs. i'm not sure if there will only be one of those hobs or if there are multiple, so i'd need some input if patchset 1 or 2 is the correct/better solution -- To view, visit https://review.coreboot.org/c/coreboot/+/69499 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3398043dbdb3fc618277cefdd349b2c935bbfa52 Gerrit-Change-Number: 69499 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Comment-Date: Thu, 17 Nov 2022 23:58:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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