coreboot-gerrit November 2022

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[master]: mb/google/rex: Enable TCSS DisplayPort detection at preboot
by John Zhao (Code Review) 18 Nov '22

18 Nov '22

Attention is currently required from: Tarun Tuli, Kapil Porwal, John Zhao, Eric Lai. John Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67742 ) Change subject: mb/google/rex: Enable TCSS DisplayPort detection at preboot ...................................................................... Patch Set 7: (1 comment) File src/mainboard/google/rex/Kconfig: https://review.coreboot.org/c/coreboot/+/67742/comment/cce691f9_9fb6056a PS7, Line 30: RUN_FSP_GOP > so we don't need the if, right? yes, no need in terms of functionality. It was simply aligned with brya's setting. Do you plan to update brya? -- To view, visit https://review.coreboot.org/c/coreboot/+/67742 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1a8a13e937c7132696aa39d85c3c6b6fb2dd13a5 Gerrit-Change-Number: 67742 Gerrit-PatchSet: 7 Gerrit-Owner: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-CC: John Zhao <john.zhao(a)intel.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: John Zhao <john.zhao(a)intel.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Fri, 18 Nov 2022 03:53:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: John Zhao <john.zhao(a)intel.corp-partner.google.com> Comment-In-Reply-To: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-MessageType: comment

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[S] Change in blobs[master]: soc/mediatek/mt8186: Update SSPM firmware from v1.0.0 to v2.0.0
by KuanHsun Cheng (Code Review) 18 Nov '22

18 Nov '22

KuanHsun Cheng has uploaded this change for review. ( https://review.coreboot.org/c/blobs/+/69780 ) Change subject: soc/mediatek/mt8186: Update SSPM firmware from v1.0.0 to v2.0.0 ...................................................................... soc/mediatek/mt8186: Update SSPM firmware from v1.0.0 to v2.0.0 Add PMIC MT6315 support for SSPM. BUG=b:249436110 TEST=test of suspend and resume pass. Signed-off-by: Allen-KH Cheng <allen-kh.cheng(a)mediatek.com> Change-Id: I5cf5c0a46ce0af056dca6af7442a9ddb5be4b490 --- M soc/mediatek/mt8186/sspm.bin M soc/mediatek/mt8186/sspm.bin.md5 M soc/mediatek/mt8186/sspm_release_notes.txt 3 files changed, 19 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/blobs refs/changes/80/69780/1 diff --git a/soc/mediatek/mt8186/sspm.bin b/soc/mediatek/mt8186/sspm.bin index cb71d57..5a02ff9 100644 --- a/soc/mediatek/mt8186/sspm.bin +++ b/soc/mediatek/mt8186/sspm.bin Binary files differ diff --git a/soc/mediatek/mt8186/sspm.bin.md5 b/soc/mediatek/mt8186/sspm.bin.md5 index 974a48b..db23fda 100644 --- a/soc/mediatek/mt8186/sspm.bin.md5 +++ b/soc/mediatek/mt8186/sspm.bin.md5 @@ -1 +1 @@ -1092f052c52ad94135fa1cdc3abbffe4 *sspm.bin +3f46481d101daa07420edbc39f55537f *sspm.bin diff --git a/soc/mediatek/mt8186/sspm_release_notes.txt b/soc/mediatek/mt8186/sspm_release_notes.txt index d5e5158..37a7704 100644 --- a/soc/mediatek/mt8186/sspm_release_notes.txt +++ b/soc/mediatek/mt8186/sspm_release_notes.txt @@ -1,4 +1,7 @@ ** Build from MediaTek Internal ** +# v2.0.0 +1. Add PMIC MT6315 support for SSPM. + # v1.0.0 1. Add sspm.bin v1.0.0. -- To view, visit https://review.coreboot.org/c/blobs/+/69780 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: blobs Gerrit-Branch: master Gerrit-Change-Id: I5cf5c0a46ce0af056dca6af7442a9ddb5be4b490 Gerrit-Change-Number: 69780 Gerrit-PatchSet: 1 Gerrit-Owner: KuanHsun Cheng <Allen-KH.Cheng(a)mediatek.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: mb/google/rex: Enable TCSS DisplayPort detection at preboot
by Eric Lai (Code Review) 18 Nov '22

18 Nov '22

Attention is currently required from: Tarun Tuli, John Zhao, Kapil Porwal. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67742 ) Change subject: mb/google/rex: Enable TCSS DisplayPort detection at preboot ...................................................................... Patch Set 7: (1 comment) File src/mainboard/google/rex/Kconfig: https://review.coreboot.org/c/coreboot/+/67742/comment/04aee505_4b5918aa PS7, Line 30: RUN_FSP_GOP > It seems not. so we don't need the if, right? -- To view, visit https://review.coreboot.org/c/coreboot/+/67742 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1a8a13e937c7132696aa39d85c3c6b6fb2dd13a5 Gerrit-Change-Number: 67742 Gerrit-PatchSet: 7 Gerrit-Owner: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-CC: John Zhao <john.zhao(a)intel.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: John Zhao <john.zhao(a)intel.corp-partner.google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: John Zhao <john.zhao(a)intel.com> Gerrit-Comment-Date: Fri, 18 Nov 2022 03:40:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: John Zhao <john.zhao(a)intel.corp-partner.google.com> Comment-In-Reply-To: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: mb/google/nissa: Modify FMD to redistribute buffer
by Eric Lai (Code Review) 18 Nov '22

18 Nov '22

Eric Lai has submitted this change. ( https://review.coreboot.org/c/coreboot/+/69683 ) Change subject: mb/google/nissa: Modify FMD to redistribute buffer ...................................................................... mb/google/nissa: Modify FMD to redistribute buffer Modify the chromeos FMD file for nissa variants to redistribute the buffer in SI_ME region obtained due to CSE size optimizations to SI_BIOS region. 1. Modify SI_ALL region size to 3712K. SI_DESC remains at 4K and SI_ME is 3708K. 2. Modify SI_BIOS region to 12672K. This results in an addition of 32K buffer each to FW_MAIN_A/B regions. BUG=b:228936671 BRANCH=firmware-nissa-15217.B TEST=Verify CSE FW update with new FMD and ME RW blobs on craask. Cq-Depend: chrome-internal:5094491 Change-Id: I5ead2f81850a2aa79e677c7f271db672e235750a Signed-off-by: Krishna P Bhat D <krishna.p.bhat.d(a)intel.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69683 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Reka Norman <rekanorman(a)chromium.org> Reviewed-by: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> --- M src/mainboard/google/brya/chromeos-nissa-16MiB-debugfsp.fmd M src/mainboard/google/brya/chromeos-nissa-16MiB.fmd M src/mainboard/google/brya/chromeos-nissa-32MiB.fmd 3 files changed, 42 insertions(+), 14 deletions(-) Approvals: build bot (Jenkins): Verified Reka Norman: Looks good to me, approved Eric Lai: Looks good to me, approved diff --git a/src/mainboard/google/brya/chromeos-nissa-16MiB-debugfsp.fmd b/src/mainboard/google/brya/chromeos-nissa-16MiB-debugfsp.fmd index a6da8d1..ee92f2a 100644 --- a/src/mainboard/google/brya/chromeos-nissa-16MiB-debugfsp.fmd +++ b/src/mainboard/google/brya/chromeos-nissa-16MiB-debugfsp.fmd @@ -1,10 +1,10 @@ FLASH 16M { - SI_ALL 3776K { + SI_ALL 3712K { SI_DESC 4K SI_ME } - SI_BIOS 12608K { - RW_SECTION_A 4180K { + SI_BIOS 12672K { + RW_SECTION_A 4212K { VBLOCK_A 8K FW_MAIN_A(CBFS) RW_FWID_A 64 @@ -22,7 +22,7 @@ RW_VPD(PRESERVE) 8K RW_NVRAM(PRESERVE) 8K } - RW_SECTION_B 4180K { + RW_SECTION_B 4212K { VBLOCK_B 8K FW_MAIN_B(CBFS) RW_FWID_B 64 diff --git a/src/mainboard/google/brya/chromeos-nissa-16MiB.fmd b/src/mainboard/google/brya/chromeos-nissa-16MiB.fmd index f4f9d31..af69207 100644 --- a/src/mainboard/google/brya/chromeos-nissa-16MiB.fmd +++ b/src/mainboard/google/brya/chromeos-nissa-16MiB.fmd @@ -1,10 +1,10 @@ FLASH 16M { - SI_ALL 3776K { + SI_ALL 3712K { SI_DESC 4K SI_ME } - SI_BIOS 12608K { - RW_SECTION_A 3668K { + SI_BIOS 12672K { + RW_SECTION_A 3700K { VBLOCK_A 8K FW_MAIN_A(CBFS) RW_FWID_A 64 @@ -23,7 +23,7 @@ RW_VPD(PRESERVE) 8K RW_NVRAM(PRESERVE) 8K } - RW_SECTION_B 3668K { + RW_SECTION_B 3700K { VBLOCK_B 8K FW_MAIN_B(CBFS) RW_FWID_B 64 diff --git a/src/mainboard/google/brya/chromeos-nissa-32MiB.fmd b/src/mainboard/google/brya/chromeos-nissa-32MiB.fmd index 48406b9..1662600 100644 --- a/src/mainboard/google/brya/chromeos-nissa-32MiB.fmd +++ b/src/mainboard/google/brya/chromeos-nissa-32MiB.fmd @@ -1,10 +1,10 @@ FLASH 32M { - SI_ALL 3776K { + SI_ALL 3712K { SI_DESC 4K SI_ME } - SI_BIOS 28992K { - RW_SECTION_A 4344K { + SI_BIOS 29056K { + RW_SECTION_A 4376K { VBLOCK_A 8K FW_MAIN_A(CBFS) RW_FWID_A 64 @@ -24,19 +24,19 @@ RW_NVRAM(PRESERVE) 8K } # RW UNUSED Region 1. - RW_UNUSED_1 7088K + RW_UNUSED_1 7120K # This section starts at the 16M boundary in SPI flash. # ADL does not support a region crossing this boundary, # because the SPI flash is memory-mapped into two non- # contiguous windows. - RW_SECTION_B 4344K { + RW_SECTION_B 4376K { VBLOCK_B 8K FW_MAIN_B(CBFS) RW_FWID_B 64 ME_RW_B(CBFS) 1434K } # RW UNUSED Region 2. - RW_UNUSED_2 7944K + RW_UNUSED_2 7912K # Make WP_RO region align with SPI vendor # memory protected range specification. WP_RO 4M { -- To view, visit https://review.coreboot.org/c/coreboot/+/69683 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5ead2f81850a2aa79e677c7f271db672e235750a Gerrit-Change-Number: 69683 Gerrit-PatchSet: 3 Gerrit-Owner: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: mb/google/rex: Enable TCSS DisplayPort detection at preboot
by John Zhao (Code Review) 18 Nov '22

18 Nov '22

Attention is currently required from: Tarun Tuli, Kapil Porwal, John Zhao, Eric Lai. John Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67742 ) Change subject: mb/google/rex: Enable TCSS DisplayPort detection at preboot ...................................................................... Patch Set 7: (1 comment) File src/mainboard/google/rex/Kconfig: https://review.coreboot.org/c/coreboot/+/67742/comment/be11710a_d54cdc1a PS7, Line 30: RUN_FSP_GOP > Any condition we don't have RUN_FSP_GOP on Rex? It seems not. -- To view, visit https://review.coreboot.org/c/coreboot/+/67742 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1a8a13e937c7132696aa39d85c3c6b6fb2dd13a5 Gerrit-Change-Number: 67742 Gerrit-PatchSet: 7 Gerrit-Owner: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-CC: John Zhao <john.zhao(a)intel.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: John Zhao <john.zhao(a)intel.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Fri, 18 Nov 2022 03:39:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: Revert "crossgcc: Upgrade IASL from 20211217 to 20220331"
by Elyes Haouas (Code Review) 18 Nov '22

18 Nov '22

Attention is currently required from: Martin L Roth, Arthur Heymans, Felix Held. Elyes Haouas has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/64103 ) Change subject: Revert "crossgcc: Upgrade IASL from 20211217 to 20220331" ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/64103 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5c1b30585fdfab046a40d1721276d0fa40457a10 Gerrit-Change-Number: 64103 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 18 Nov 2022 02:52:14 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: Revert "crossgcc: Upgrade IASL from 20211217 to 20220331"
by Elyes Haouas (Code Review) 18 Nov '22

18 Nov '22

Attention is currently required from: Martin L Roth, Arthur Heymans, Felix Held. Elyes Haouas has uploaded a new patch set (#2) to the change originally created by Arthur Heymans. ( https://review.coreboot.org/c/coreboot/+/64103 ) Change subject: Revert "crossgcc: Upgrade IASL from 20211217 to 20220331" ...................................................................... Revert "crossgcc: Upgrade IASL from 20211217 to 20220331" This reverts commit 9a8d0a03dbccf95554153cd06eee6270518174f6. Reason for revert: IASL now only throws errors on syntax errors. Change-Id: I5c1b30585fdfab046a40d1721276d0fa40457a10 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M Makefile.inc M util/crossgcc/buildgcc R util/crossgcc/patches/acpica-unix2-20211217_iasl.patch A util/crossgcc/sum/acpica-unix2-20211217.tar.gz.cksum D util/crossgcc/sum/acpica-unix2-20220331.tar.gz.cksum 5 files changed, 19 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/64103/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/64103 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5c1b30585fdfab046a40d1721276d0fa40457a10 Gerrit-Change-Number: 64103 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: vboot/vboot_logic: Fix hash digest size and padding
by Julius Werner (Code Review) 18 Nov '22

18 Nov '22

Attention is currently required from: Jakub Czapiga, Yu-Ping Wu. Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69762 ) Change subject: vboot/vboot_logic: Fix hash digest size and padding ...................................................................... Patch Set 1: (1 comment) File src/security/vboot/vboot_logic.c: https://review.coreboot.org/c/coreboot/+/69762/comment/13739a42_5b414817 PS1, Line 344: uint8_t hash_digest[VBOOT_MAX_HASH_SIZE]; Should we do this in vboot_save_hash()? Seems like a weird quirk of the backing store that doesn't really belong in the common business logic code. -- To view, visit https://review.coreboot.org/c/coreboot/+/69762 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If6d46e0b58dbca86af56221b7ff2606ab2d1799a Gerrit-Change-Number: 69762 Gerrit-PatchSet: 1 Gerrit-Owner: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Fri, 18 Nov 2022 02:45:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: Makefile.inc: Remove workaround ACPI warnings
by Elyes Haouas (Code Review) 18 Nov '22

18 Nov '22

Elyes Haouas has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69514 ) Change subject: Makefile.inc: Remove workaround ACPI warnings ...................................................................... Patch Set 6: (2 comments) Patchset: PS6: > would you review & submit https://review.coreboot. […] or this one https://review.coreboot.org/c/coreboot/+/64103?forceReload=true PS6: Thx -- To view, visit https://review.coreboot.org/c/coreboot/+/69514 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I787f6aa588175ba620a068918c42edc9d257c3ef Gerrit-Change-Number: 69514 Gerrit-PatchSet: 6 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 18 Nov 2022 02:40:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: Makefile.inc: Remove workaround ACPI warnings
by Elyes Haouas (Code Review) 18 Nov '22

18 Nov '22

Elyes Haouas has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69514 ) Change subject: Makefile.inc: Remove workaround ACPI warnings ...................................................................... Patch Set 6: (1 comment) Patchset: PS6: would you review & submit https://review.coreboot.org/c/coreboot/+/68929?forceReload=true asap? -- To view, visit https://review.coreboot.org/c/coreboot/+/69514 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I787f6aa588175ba620a068918c42edc9d257c3ef Gerrit-Change-Number: 69514 Gerrit-PatchSet: 6 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 18 Nov 2022 02:34:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit November 2022