coreboot-gerrit November 2022

coreboot-gerrit@coreboot.org

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[M] Change in coreboot[master]: mainboard: Add SPDX license headers to Makefiles
by Nico Huber (Code Review) 18 Nov '22

18 Nov '22

Attention is currently required from: Felix Singer, Jason Nien, Jeremy Soller, Michael Niewöhner, Martin Roth, Tim Crawford, Tarun Tuli, Martin L Roth, Damien Zammit, Subrata Banik, Maxim Polyakov, Kapil Porwal, Alexander Couzens, Werner Zeh, Evgeny Zinoviev. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68982 ) Change subject: mainboard: Add SPDX license headers to Makefiles ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: > I guess the reason for applying a license at all is the same as when licenses were added to empty files: some company/companies complained about missing license headers.......... (Can't find the change right now) If that's the case, why aren't employees of those companies writing the patches? Why don't they sign off? If everybody could give these files a license, it shouldn't matter, but if not, why should somebody else take the risk? > Your main point is about which license to apply, right? Any suggestion for an alternative? I'd say GPL is fine. It's more that I don't see how to imply the authors' intentions. -- To view, visit https://review.coreboot.org/c/coreboot/+/68982 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic451e68b1ad9ccdf34484dd98bd7fca7e177ef22 Gerrit-Change-Number: 68982 Gerrit-PatchSet: 2 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Damien Zammit Gerrit-Reviewer: Evgeny Zinoviev <me(a)ch1p.io> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Jeremy Soller <jeremy(a)system76.com> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Damien Zammit Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Evgeny Zinoviev <me(a)ch1p.io> Gerrit-Comment-Date: Fri, 18 Nov 2022 19:10:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-MessageType: comment

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[L] Change in coreboot[master]: [RFC] Pull ligfxinit in romstage
by Jérémy Compostella (Code Review) 18 Nov '22

18 Nov '22

Attention is currently required from: Nico Huber, Tarun Tuli, Martin L Roth, Angel Pons, Andrey Petrov. Jérémy Compostella has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69757 ) Change subject: [RFC] Pull ligfxinit in romstage ...................................................................... Patch Set 1: (1 comment) File src/arch/x86/car.ld: https://review.coreboot.org/c/coreboot/+/69757/comment/4cf49224_fce183ec PS1, Line 122: > Hmmm, don't we have some arcane magic for C code to put zero-initialized variables in a special sect […] My understanding is that global **initialized** variable are not permitted in cache-as-ram. I don't see why global variable as a whole would be forbidden (please correct me if I am wrong). I feel like this is because we do not perform any data loading operations to transfer from code (`.text`) to the cache region. When I compile without the `car.ld` hack, I get the exhaustive list of `.data` variables. Using objdump I collected their initial value (note that I did not exhaustively checked all the `[...]_E` ones but only a sample). | Address | Type | Name | Value | |----------+------+----------------------------------------------+-------------| | ffffff60 | d | hw__debug__register_write_delay_nanoseconds | 00 | | ffffff68 | d | hw__debug__start_of_line | 01 | | ffffff2c | d | hw__gfx__gma__registers__gtt_32__range_aXnnn | 00 20 00 00 | | ffffff28 | d | hw__gfx__gma__registers__gtt_64__range_aXnnn | 00 80 00 00 | | ffffff30 | d | hw__gfx__gma__registers__regs__range_aXnnn | 00 00 00 00 | | ffffff6e | D | gma_E | 00 ... | | ffffff70 | D | gma__gfx_init_E | 00 ... | | ffffff6a | D | hw__debug_E | 00 ... | | ffffff6c | D | hw__debug_sink_E | 00 ... | | ffffff02 | D | hw__gfx__dp_aux_ch_E | 00 ... | | ffffff04 | D | hw__gfx__dp_dual_mode_E | 00 ... | | ffffff06 | D | hw__gfx__dp_info_E | 00 ... | | ffffff08 | D | hw__gfx__dp_training_E | 00 ... | | ffffff0a | D | hw__gfx__edid_E | 00 ... | | ffffff0c | D | hw__gfx__framebuffer_filler_E | 00 ... | | ffffff3a | D | hw__gfx__gma_E | 00 ... | | ffffff3c | D | hw__gfx__gma__combo_phy_E | 00 ... | | ffffff00 | D | hw__gfx__gma__config_E | 00 ... | | ffffff0e | D | hw__gfx__gma__config_helpers_E | 00 ... | | ffffff10 | D | hw__gfx__gma__connector_info_E | 00 ... | | ffffff42 | D | hw__gfx__gma__connectors_E | 00 ... | | ffffff3e | D | hw__gfx__gma__connectors__combo_phy_E | 00 ... | | ffffff40 | D | hw__gfx__gma__connectors__tc_E | 00 ... | | ffffff12 | D | hw__gfx__gma__display_probing_E | 00 ... | | ffffff14 | D | hw__gfx__gma__dp_aux_request_E | 00 ... | | ffffff16 | D | hw__gfx__gma__i2c_E | 00 ... | | ffffff38 | D | hw__gfx__gma__initialized | 00 ... | | ffffff18 | D | hw__gfx__gma__panel_E | 00 ... | | ffffff1a | D | hw__gfx__gma__pch__fdi_E | 00 ... | | ffffff1c | D | hw__gfx__gma__pch__sideband_E | 00 ... | | ffffff1e | D | hw__gfx__gma__pch__transcoder_E | 00 ... | | ffffff20 | D | hw__gfx__gma__pch__vga_E | 00 ... | | ffffff22 | D | hw__gfx__gma__pcode_E | 00 ... | | ffffff24 | D | hw__gfx__gma__pipe_setup_E | 00 ... | | ffffff48 | D | hw__gfx__gma__plls_E | 00 ... | | ffffff44 | D | hw__gfx__gma__plls__combo_phy_E | 00 ... | | ffffff46 | D | hw__gfx__gma__plls__dkl_E | 00 ... | | ffffff4a | D | hw__gfx__gma__port_detect_E | 00 ... | | ffffff50 | D | hw__gfx__gma__power_and_clocks_E | 00 ... | | ffffff4c | D | hw__gfx__gma__power_and_clocks__tgl_E | 00 ... | | ffffff4e | D | hw__gfx__gma__power_and_clocks__xelpd_E | 00 ... | | ffffff34 | D | hw__gfx__gma__registers_E | 00 ... | | ffffff36 | D | hw__gfx__gma__transcoder_E | 00 ... | | ffffff52 | D | hw__mmio_range_E | 00 ... | | ffffff56 | D | hw__mmio_regs_E | 00 ... | | ffffff54 | D | hw__pci__dev_E | 00 ... | | ffffff58 | D | hw__pci__mmconf_E | 00 ... | | ffffff5a | D | hw__port_io_E | 00 ... | | ffffff5c | D | hw__time_E | 00 ... | | ffffff72 | D | hw__time__timer_E | 00 ... | The symbols ending with `_E` are empty and initialized by GNAT generated code (cf. `___elabs` functions) which is called using the `$stage_adainit()` function. Therefor, I think it is safe to places these into the `_bss` region of the `.car.data` section. It would help if we could make the ADA compiler put directly these directly into the `.bss` region of the object file as it would simplify the changes in the linker script. Any suggestion ? I could not find any GNAT compiler option for this but I am clearly not an ADA compiler expert :-) We are left with the following: - `hw__debug__register_write_delay_nanoseconds` is zero so installing it in the `_bss` region of the `.car.data` section should be fine. - `hw__debug__start_of_line`: Reverting the logic of this boolean should make it work - The following three are the challenging ones: - `hw__gfx__gma__registers__gtt_32__range_aXnnnx` - `hw__gfx__gma__registers__gtt_64__range_aXnnn` - `hw__gfx__gma__registers__regs__range_aXnnn` They seem to be entirely generated by the compiler and I don't know how to control them. Surprisingly, putting them in the `_bss` region of the `.car.data` section which I expected to be filled with zeros at runtime is apparently not causing any problem while their initial value should not be zeros. Any suggestion ? -- To view, visit https://review.coreboot.org/c/coreboot/+/69757 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If3357e746a7d94afe9d285c36ed6172c7bfd9718 Gerrit-Change-Number: 69757 Gerrit-PatchSet: 1 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Comment-Date: Fri, 18 Nov 2022 18:59:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: libpayload: Fix compiler warnings
by Thomas Heijligen (Code Review) 18 Nov '22

18 Nov '22

Attention is currently required from: Nico Huber. Thomas Heijligen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69764 ) Change subject: libpayload: Fix compiler warnings ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/69764/comment/6abbc1a7_120f4f07 PS1, Line 7: warning > warning*s* Done -- To view, visit https://review.coreboot.org/c/coreboot/+/69764 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id285c24cba790f181fa203f3117e5df35bed27c4 Gerrit-Change-Number: 69764 Gerrit-PatchSet: 2 Gerrit-Owner: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Comment-Date: Fri, 18 Nov 2022 18:54:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: libpayload: Fix compiler warnings
by Thomas Heijligen (Code Review) 18 Nov '22

18 Nov '22

Attention is currently required from: Thomas Heijligen. Hello build bot (Jenkins), Nico Huber, Eric Lai, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/69764 to look at the new patch set (#2). Change subject: libpayload: Fix compiler warnings ...................................................................... libpayload: Fix compiler warnings drivers/serial/8250.c:75: [-Werror=unused-variable] Move variable declaration inside the `#if !CONFIG(LP_PL011_SERIAL_CONSOLE)` block drivers/udc/dwc2.c:505: [-Werror=format=] use `%zd` to match type `size_t` Change-Id: Id285c24cba790f181fa203f3117e5df35bed27c4 Signed-off-by: Thomas Heijligen <src(a)posteo.de> --- M payloads/libpayload/drivers/serial/8250.c M payloads/libpayload/drivers/udc/dwc2.c 2 files changed, 19 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/69764/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/69764 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id285c24cba790f181fa203f3117e5df35bed27c4 Gerrit-Change-Number: 69764 Gerrit-PatchSet: 2 Gerrit-Owner: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: soc/amd/mendocino: Enhance DPTC_INPUT to support 13 DPTC thermal para...
by EricKY Cheng (Code Review) 18 Nov '22

18 Nov '22

Attention is currently required from: Jason Glenesk, Raul Rangel, Jason Nien, Matt DeVillier, Martin Roth, Tim Van Patten, Fred Reitberger, Felix Held. EricKY Cheng has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68649 ) Change subject: soc/amd/mendocino: Enhance DPTC_INPUT to support 13 DPTC thermal parameters ...................................................................... Patch Set 28: (2 comments) File src/soc/amd/mendocino/root_complex.c: https://review.coreboot.org/c/coreboot/+/68649/comment/9add3507_6db59177 PS24, Line 45: > nit: whitespace Done https://review.coreboot.org/c/coreboot/+/68649/comment/117524aa_d838664c PS24, Line 68: > nit: whitespace in these newly added parameters. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/68649 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6d6a00f0eca0b0941860b9bc75da41d7a10d60e8 Gerrit-Change-Number: 68649 Gerrit-PatchSet: 28 Gerrit-Owner: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Tim Van Patten <timvp(a)google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 18 Nov 2022 18:39:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Van Patten <timvp(a)google.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/skyrim/var/winterhold: Update DPTC setting for SMT
by EricKY Cheng (Code Review) 18 Nov '22

18 Nov '22

Attention is currently required from: Jason Nien, Isaac Lee, Martin Roth, Tim Van Patten, Eric Peers, Karthikeyan Ramasubramanian. Hello Jason Nien, Isaac Lee, Martin Roth, Tim Van Patten, Eric Peers, Karthikeyan Ramasubramanian, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/69830 to look at the new patch set (#3). Change subject: mb/google/skyrim/var/winterhold: Update DPTC setting for SMT ...................................................................... mb/google/skyrim/var/winterhold: Update DPTC setting for SMT All parameters of DPTC_INPUT() need to be configured on devicetree when SOC_AMD_COMMON_BLOCK_ACPI_DPTC is enable. The parameters without configurations on devicetree would be 0 when SOC_AMD_COMMON_BLOCK_ACPI_DPTC is enable. Follow AMD DevHub document #57316. Configure vrm_current_limit_mA, vrm_maximum_current_limit_mA and vrm_soc_current_limit_mA on devicetree with thermal table config E as default table for SMT. Since the dynamic thermal table switching mechanism is still under cooking, after discussing with thermal team, suggest adopting config E(limit Soc not reach to max power) as default thermal config to avoid any thermal-related issue during phase build. Once the dynamic thermal table switching mechanism is finished, will change the default value to config A. BUG=b:232946420, b:258572474 TEST=emerge-skyrim coreboot Signed-off-by: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Change-Id: Ic1e7a46cac4119c7237d96a7bd0d23c8db028680 --- M src/mainboard/google/skyrim/variants/winterhold/overridetree.cb 1 file changed, 25 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/69830/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/69830 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic1e7a46cac4119c7237d96a7bd0d23c8db028680 Gerrit-Change-Number: 69830 Gerrit-PatchSet: 3 Gerrit-Owner: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Peers <epeers(a)google.com> Gerrit-Reviewer: Isaac Lee <isaaclee(a)google.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-CC: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-CC: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-CC: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-CC: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-CC: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-CC: Nelson Ye <nelson_ye(a)compal.corp-partner.google.com> Gerrit-CC: Van Chen <van_chen(a)compal.corp-partner.google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Isaac Lee <isaaclee(a)google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Tim Van Patten <timvp(a)google.com> Gerrit-Attention: Eric Peers <epeers(a)google.com> Gerrit-Attention: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: mb/google/skyrim/var/winterhold: Update DPTC setting for SMT
by EricKY Cheng (Code Review) 18 Nov '22

18 Nov '22

Attention is currently required from: Jason Nien, Isaac Lee, Martin Roth, Tim Van Patten, Eric Peers, Karthikeyan Ramasubramanian. Hello Jason Nien, Isaac Lee, Martin Roth, Tim Van Patten, Eric Peers, Karthikeyan Ramasubramanian, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/69830 to look at the new patch set (#2). Change subject: mb/google/skyrim/var/winterhold: Update DPTC setting for SMT ...................................................................... mb/google/skyrim/var/winterhold: Update DPTC setting for SMT All parameters of DPTC_INPUT() need to be configured on devicetree when SOC_AMD_COMMON_BLOCK_ACPI_DPTC is enable. The parameters without configurations on devicetree would be 0 when SOC_AMD_COMMON_BLOCK_ACPI_DPTC is enable. Follow AMD DevHub document #57316. Configure vrm_current_limit_mA, vrm_maximum_current_limit_mA and vrm_soc_current_limit_mA on devicetree with thermal table config E as default table for SMT. Since the dynamic thermal table switching mechanism is still under cooking, after discussing with thermal team, suggest adopting config E(limit Soc not reach to max power) as default thermal config to avoid any thermal-related issue during phase build. Once the dynamic thermal table switching mechanism is finished, will change the default value to config A. BUG=b:232946420, b:258572474 TEST=emerge-skyrim coreboot Signed-off-by: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Change-Id: Ic1e7a46cac4119c7237d96a7bd0d23c8db028680 --- M src/mainboard/google/skyrim/variants/winterhold/overridetree.cb 1 file changed, 26 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/69830/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/69830 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic1e7a46cac4119c7237d96a7bd0d23c8db028680 Gerrit-Change-Number: 69830 Gerrit-PatchSet: 2 Gerrit-Owner: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Peers <epeers(a)google.com> Gerrit-Reviewer: Isaac Lee <isaaclee(a)google.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-CC: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-CC: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-CC: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-CC: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-CC: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-CC: Nelson Ye <nelson_ye(a)compal.corp-partner.google.com> Gerrit-CC: Van Chen <van_chen(a)compal.corp-partner.google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Isaac Lee <isaaclee(a)google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Tim Van Patten <timvp(a)google.com> Gerrit-Attention: Eric Peers <epeers(a)google.com> Gerrit-Attention: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: commonlib,console,nb,sb,security: Add SPDX licenses to Makefiles
by Matt DeVillier (Code Review) 18 Nov '22

18 Nov '22

Attention is currently required from: Martin L Roth, Christian Walter. Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68985 ) Change subject: commonlib,console,nb,sb,security: Add SPDX licenses to Makefiles ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/68985 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I02804a10d0b0355e41271a035613d9f3dfb122f8 Gerrit-Change-Number: 68985 Gerrit-PatchSet: 2 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Comment-Date: Fri, 18 Nov 2022 18:15:09 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: util: Add SPDX license headers to Makefiles
by Matt DeVillier (Code Review) 18 Nov '22

18 Nov '22

Attention is currently required from: Martin L Roth, Maxim Polyakov, Reka Norman, Julius Werner. Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68983 ) Change subject: util: Add SPDX license headers to Makefiles ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/68983 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7cf35132df0bc23f7b6f78014ddd72d58ea2ab8a Gerrit-Change-Number: 68983 Gerrit-PatchSet: 2 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Attention: Reka Norman <rekanorman(a)chromium.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Fri, 18 Nov 2022 18:15:03 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: mainboard: Add SPDX license headers to Makefiles
by Matt DeVillier (Code Review) 18 Nov '22

18 Nov '22

Attention is currently required from: Felix Singer, Jason Nien, Jeremy Soller, Martin Roth, Tim Crawford, Nico Huber, Tarun Tuli, Martin L Roth, Damien Zammit, Subrata Banik, Maxim Polyakov, Kapil Porwal, Alexander Couzens, Werner Zeh, Evgeny Zinoviev. Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68982 ) Change subject: mainboard: Add SPDX license headers to Makefiles ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/68982 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic451e68b1ad9ccdf34484dd98bd7fca7e177ef22 Gerrit-Change-Number: 68982 Gerrit-PatchSet: 2 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Damien Zammit Gerrit-Reviewer: Evgeny Zinoviev <me(a)ch1p.io> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Jeremy Soller <jeremy(a)system76.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Damien Zammit Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Evgeny Zinoviev <me(a)ch1p.io> Gerrit-Comment-Date: Fri, 18 Nov 2022 18:14:55 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit November 2022