coreboot-gerrit November 2022

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[master]: nb/intel/gm45: Hook up PCI domain and CPU bus ops to devicetree
by Angel Pons (Code Review) 26 Nov '22

26 Nov '22

Attention is currently required from: Stefan Ott, Arthur Heymans, Alexander Couzens. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69293 ) Change subject: nb/intel/gm45: Hook up PCI domain and CPU bus ops to devicetree ...................................................................... Patch Set 16: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/69293 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4a49f37e6fe0cb04c8112baf36fd8d01ab218045 Gerrit-Change-Number: 69293 Gerrit-PatchSet: 16 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Stefan Ott <coreboot(a)desire.ch> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Stefan Ott <coreboot(a)desire.ch> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Comment-Date: Sat, 26 Nov 2022 11:22:53 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: util/autoport: Update devicetree generation
by Angel Pons (Code Review) 26 Nov '22

26 Nov '22

Attention is currently required from: Arthur Heymans. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69501 ) Change subject: util/autoport: Update devicetree generation ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/69501 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic1f2d3d611aa3979b846706b6f743f79a3c4e54d Gerrit-Change-Number: 69501 Gerrit-PatchSet: 4 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Sat, 26 Nov 2022 11:22:26 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: nb/intel/sandybridge: Hook up CPU bus and PCI domain ops to devicetree
by Angel Pons (Code Review) 26 Nov '22

26 Nov '22

Attention is currently required from: Arthur Heymans, Alexander Couzens, Evgeny Zinoviev. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69291 ) Change subject: nb/intel/sandybridge: Hook up CPU bus and PCI domain ops to devicetree ...................................................................... Patch Set 12: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/69291 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I718d9dbc184c8bca38f452efea3202901018cb04 Gerrit-Change-Number: 69291 Gerrit-PatchSet: 12 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Evgeny Zinoviev <me(a)ch1p.io> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Attention: Evgeny Zinoviev <me(a)ch1p.io> Gerrit-Comment-Date: Sat, 26 Nov 2022 11:21:45 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[L] Change in coreboot[master]: nb/intel/sandybridge: Add a chipset devicetree
by Angel Pons (Code Review) 26 Nov '22

26 Nov '22

Attention is currently required from: Arthur Heymans, Evgeny Zinoviev, Alexander Couzens, Patrick Rudolph. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56912 ) Change subject: nb/intel/sandybridge: Add a chipset devicetree ...................................................................... Patch Set 5: (4 comments) File src/mainboard/kontron/ktqm77/devicetree.cb: https://review.coreboot.org/c/coreboot/+/56912/comment/5075e3eb_b8ded2c6 PS5, Line 11: register "acpi_c1" = "1" # ACPI(C1) = MWAIT(C1) Might be better to leave this one in place for consistency. Not a big deal, though. File src/northbridge/intel/sandybridge/Kconfig: https://review.coreboot.org/c/coreboot/+/56912/comment/34343bef_b3d64129 PS5, Line 21: string nit: Type not needed File src/northbridge/intel/sandybridge/chipset.cb: https://review.coreboot.org/c/coreboot/+/56912/comment/3c0ebd2e_1a09e26a PS5, Line 17: subsystemid 0x17aa 0x21db inherit What is this? https://review.coreboot.org/c/coreboot/+/56912/comment/2fd663ff_d0231486 PS5, Line 19: device pci 00.0 alias hb on end # host bridge : device pci 01.0 alias peg10 off end # PEG10 : device pci 01.1 alias peg11 off end # PEG11 : device pci 01.2 alias peg12 off end # PEG12 : device pci 02.0 alias igd off end # vga controller : device pci 04.0 alias dev4 off end # Device 4 : device pci 06.0 alias peg60 off end # PEG60 : : chip southbridge/intel/bd82x6x # Intel Series 6/7 PCH : device pci 14.0 alias xhci off end # USB 3.0 Controller (only on 7 series) : device pci 16.0 alias mei1 off end # Management Engine Interface 1 : device pci 16.1 alias mei2 off end # Management Engine Interface 2 : device pci 16.2 alias me_ide_r off end # Management Engine IDE-R : device pci 16.3 alias me_kt off end # Management Engine KT : device pci 19.0 alias gbe off end # Intel Gigabit Ethernet : device pci 1a.0 alias ehci2 off end # USB2 EHCI #2 : device pci 1b.0 alias hda off end # High Definition Audio : device pci 1c.0 alias rp1 off end # PCIe Port #1 : device pci 1c.1 alias rp2 off end # PCIe Port #2 : device pci 1c.2 alias rp3 off end # PCIe Port #3 : device pci 1c.3 alias rp4 off end # PCIe Port #4 : device pci 1c.4 alias rp5 off end # PCIe Port #5 : device pci 1c.5 alias rp6 off end # PCIe Port #6 : device pci 1c.6 alias rp7 off end # PCIe Port #7 : device pci 1c.7 alias rp8 off end # PCIe Port #8 : device pci 1d.0 alias ehci1 off end # USB2 EHCI #1 : device pci 1e.0 alias pci_b off end # PCI bridge : device pci 1f.0 alias lpc on end # LPC bridge : device pci 1f.2 alias sata1 off end # SATA Controller 1 : device pci 1f.3 alias smbus on end # SMBus : device pci 1f.5 alias sata2 off end # SATA Controller 2 : device pci 1f.6 alias thermal off end # Thermal : end Do you *need* to define the PCI devices in the chipset devicetree in this patch? It would seem that the aliases could break static.c overrides. -- To view, visit https://review.coreboot.org/c/coreboot/+/56912 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9c5b6f25b779e28b6719cf70455ff0f1a916ad87 Gerrit-Change-Number: 56912 Gerrit-PatchSet: 5 Gerrit-Owner: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Evgeny Zinoviev <me(a)ch1p.io> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Evgeny Zinoviev <me(a)ch1p.io> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Sat, 26 Nov 2022 11:16:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: util/crossgcc/buildgcc: Fix acpica filename
by Angel Pons (Code Review) 26 Nov '22

26 Nov '22

Attention is currently required from: Felix Singer, Elyes Haouas. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/70021 ) Change subject: util/crossgcc/buildgcc: Fix acpica filename ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/70021 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7b10dd1db4299aaef96bc29023bed874b660aba0 Gerrit-Change-Number: 70021 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Comment-Date: Sat, 26 Nov 2022 11:10:18 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: util/crossgcc/buildgcc: Fix acpica filename
by Felix Singer (Code Review) 26 Nov '22

26 Nov '22

Felix Singer has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/70021 ) Change subject: util/crossgcc/buildgcc: Fix acpica filename ...................................................................... util/crossgcc/buildgcc: Fix acpica filename Acpica changed the filename of their latest release. So we need to adjust our URL as well. Signed-off-by: Felix Singer <felixsinger(a)posteo.net> Change-Id: I7b10dd1db4299aaef96bc29023bed874b660aba0 --- M util/crossgcc/buildgcc R util/crossgcc/patches/acpica-unix-20221020_iasl.patch A util/crossgcc/sum/acpica-unix-20221020.tar_0.gz.cksum D util/crossgcc/sum/acpica-unix2-20221020.tar.gz.cksum 4 files changed, 16 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/70021/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/70021 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7b10dd1db4299aaef96bc29023bed874b660aba0 Gerrit-Change-Number: 70021 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: util/crossgcc/buildgcc: Fix acpica filename
by Felix Singer (Code Review) 26 Nov '22

26 Nov '22

Felix Singer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/70021 ) Change subject: util/crossgcc/buildgcc: Fix acpica filename ...................................................................... util/crossgcc/buildgcc: Fix acpica filename Acpica changed the filename of their latest release. So we need to adjust our URL as well. Signed-off-by: Felix Singer <felixsinger(a)posteo.net> Change-Id: I7b10dd1db4299aaef96bc29023bed874b660aba0 --- A util/crossgcc/sum/acpica-unix-20221020.tar_0.gz.cksum D util/crossgcc/sum/acpica-unix2-20221020.tar.gz.cksum 2 files changed, 14 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/70021/1 diff --git a/util/crossgcc/sum/acpica-unix-20221020.tar_0.gz.cksum b/util/crossgcc/sum/acpica-unix-20221020.tar_0.gz.cksum new file mode 100644 index 0000000..6342a20 --- /dev/null +++ b/util/crossgcc/sum/acpica-unix-20221020.tar_0.gz.cksum @@ -0,0 +1 @@ +e1789d1397ba2e05a6beb6a1a31310f8de09d7fd tarballs/acpica-unix-20221020.tar_0.gz diff --git a/util/crossgcc/sum/acpica-unix2-20221020.tar.gz.cksum b/util/crossgcc/sum/acpica-unix2-20221020.tar.gz.cksum deleted file mode 100644 index 1b2b580..0000000 --- a/util/crossgcc/sum/acpica-unix2-20221020.tar.gz.cksum +++ /dev/null @@ -1 +0,0 @@ -bb175ba614e68d43a7a863335e83d3f832d3b41c tarballs/acpica-unix2-20221020.tar.gz -- To view, visit https://review.coreboot.org/c/coreboot/+/70021 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7b10dd1db4299aaef96bc29023bed874b660aba0 Gerrit-Change-Number: 70021 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: mb/intel/mtlrvp: Create baseboard structure for mtlrvp
by Harsha B R (Code Review) 26 Nov '22

26 Nov '22

Attention is currently required from: Sridhar Siricilla, Krishna P Bhat D, Usha P. Harsha B R has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69971 ) Change subject: mb/intel/mtlrvp: Create baseboard structure for mtlrvp ...................................................................... Patch Set 7: -Code-Review -- To view, visit https://review.coreboot.org/c/coreboot/+/69971 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I82acb6879fecb242014258f2c358804d5abbbd48 Gerrit-Change-Number: 69971 Gerrit-PatchSet: 7 Gerrit-Owner: Harsha B R <harsha.b.r(a)intel.com> Gerrit-Reviewer: Harsha B R <harsha.b.r(a)intel.com> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Usha P <usha.p(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-CC: Haribalaraman Ramasubramanian <haribalaraman.r(a)intel.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Attention: Usha P <usha.p(a)intel.com> Gerrit-Comment-Date: Sat, 26 Nov 2022 10:57:03 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XL] Change in coreboot[master]: mb/intel/mtlrvp: Configure devicetree and GPIOs for MTL-RVP
by Harsha B R (Code Review) 26 Nov '22

26 Nov '22

Attention is currently required from: Haribalaraman Ramasubramanian, Krishna P Bhat D, Ronak Kanabar, Eric Lai. Hello build bot (Jenkins), Ashish Kumar Mishra, Haribalaraman Ramasubramanian, Rizwan Qureshi, Sridhar Siricilla, Balaji Manigandan, Krishna P Bhat D, Ronak Kanabar, Eric Lai, Usha P, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/69396 to look at the new patch set (#15). Change subject: mb/intel/mtlrvp: Configure devicetree and GPIOs for MTL-RVP ...................................................................... mb/intel/mtlrvp: Configure devicetree and GPIOs for MTL-RVP Add devicetree and GPIO configuration for MTL-RVP Changes include, 1. Modify existing devicetree.cb to support MTL-RVP board and variant 2. Add MTL-RVP-P GPIOs to gpio.c 3. Add corresponding configuration in Kconfig BRANCH=none BUG=b:224325352 TEST=FW_NAME=mtlrvp_p emerge-rex coreboot chromeos-bootimage Signed-off-by: Harsha B R <harsha.b.r(a)intel.com> Change-Id: I3173c3f32b36d24467431df3652badd70efeab93 --- M src/mainboard/intel/mtlrvp/Kconfig M src/mainboard/intel/mtlrvp/variants/mtlrvp_p/devicetree.cb M src/mainboard/intel/mtlrvp/variants/mtlrvp_p/gpio.c 3 files changed, 1,043 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/69396/15 -- To view, visit https://review.coreboot.org/c/coreboot/+/69396 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3173c3f32b36d24467431df3652badd70efeab93 Gerrit-Change-Number: 69396 Gerrit-PatchSet: 15 Gerrit-Owner: Harsha B R <harsha.b.r(a)intel.com> Gerrit-Reviewer: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Haribalaraman Ramasubramanian <haribalaraman.r(a)intel.com> Gerrit-Reviewer: Harsha B R <harsha.b.r(a)intel.com> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Usha P <usha.p(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Haribalaraman Ramasubramanian <haribalaraman.r(a)intel.com> Gerrit-Attention: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-MessageType: newpatchset

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[L] Change in coreboot[master]: mb/intel/mtlrvp: Enable EC and building ChromeOS
by Harsha B R (Code Review) 26 Nov '22

26 Nov '22

Attention is currently required from: Wonkyu Kim, Ravishankar Sarawadi, Rizwan Qureshi, Paul Menzel, Angel Pons, Krishna P Bhat D, Tim Wawrzynczak, Tarun Tuli, Jamie Ryu, Subrata Banik, Kapil Porwal, Nick Vaccaro, Ronak Kanabar, Usha P, Raj Astekar. Harsha B R has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/66101 ) Change subject: mb/intel/mtlrvp: Enable EC and building ChromeOS ...................................................................... Patch Set 10: (1 comment) File src/mainboard/intel/mtlrvp/Kconfig: https://review.coreboot.org/c/coreboot/+/66101/comment/a2ee3419_0de698c9 PS4, Line 45: default MTL_EC_DETECT > I tried the override from config file, the config override works as intended and choose the EC confi […] Current patch defaults the On-board EC to MTL_CHROME_EC (though having the option to config to MTL_INTEL_EC through Kconfig). Created CL (CB:70020) to resolve the on-board EC selection. -- To view, visit https://review.coreboot.org/c/coreboot/+/66101 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I662d7f79050d35e152d97dc5c2118a4af56223bc Gerrit-Change-Number: 66101 Gerrit-PatchSet: 10 Gerrit-Owner: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Harsha B R <harsha.b.r(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: Usha P <usha.p(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-CC: Haribalaraman Ramasubramanian <haribalaraman.r(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Usha P <usha.p(a)intel.com> Gerrit-Attention: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Comment-Date: Sat, 26 Nov 2022 09:38:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Jamie Ryu <jamie.m.ryu(a)intel.com> Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Wonkyu Kim <wonkyu.kim(a)intel.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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coreboot-gerrit November 2022