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Hello Sean Rhodes,
I'd like you to reexamine a change. Please visit
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Change subject: soc/intel: Adopt new common/pmbase
......................................................................
soc/intel: Adopt new common/pmbase
Change-Id: I473ebefcf8e0c929f6cbf6b5c0d7e8f5af72856d
Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
---
M src/mainboard/acer/aspire_vn7_572g/mainboard.c
M src/soc/intel/apollolake/pmutil.c
M src/soc/intel/common/block/pmc/pmclib.c
M src/soc/intel/common/block/smm/smihandler.c
M src/soc/intel/common/block/smm/smitraphandler.c
M src/soc/intel/denverton_ns/include/soc/iomap.h
M src/soc/intel/denverton_ns/include/soc/pm.h
M src/soc/intel/denverton_ns/soc_util.c
M src/soc/intel/skylake/pmc.c
9 files changed, 43 insertions(+), 57 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/70050/4
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Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/70044 )
Change subject: sb,soc/intel: Address TCO SECOND_TO_STS name collision
......................................................................
Patch Set 1: Code-Review+1
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Change subject: sb,soc/intel: Apply transitional flag TCO_SPACE_NOT_YET_SPLIT
......................................................................
Patch Set 1: Code-Review+2
(1 comment)
File src/soc/intel/broadwell/Kconfig:
https://review.coreboot.org/c/coreboot/+/70043/comment/753a6102_4e4132a5
PS1, Line 15: select TCO_SPACE_NOT_YET_SPLIT
This is redundant because it's also selected in `soc/intel/broadwell/pch/Kconfig` but it's most likely because you used some automatic script. But as this is a temporary Kconfig option, we don't care.
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Change subject: arch/x86: Add bitwise operations for IO space
......................................................................
Patch Set 1: Code-Review+2
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/70041/comment/deb0f8b7_68151e71
PS1, Line 8:
You could mention that:
> One of the reasons to prefer `io_writeX()` over `outX()` is that the parameter ordering of the former is consistent with other write functions, e.g. MMIO.
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Change subject: aopen/dxplplusu: Support SMM_ASEG and SMM_TSEG
......................................................................
Patch Set 7: Code-Review+2
(5 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/61517/comment/ada0dab8_116866dc
PS7, Line 13:
> 'occuring' may be misspelled - perhaps 'occurring'?
Please fix, it's line 11.
File src/northbridge/intel/e7505/Kconfig:
https://review.coreboot.org/c/coreboot/+/61517/comment/6570ae9f_5254c2b1
PS7, Line 13: #select SMM_ASEG
Should this be selectable?
File src/northbridge/intel/e7505/memmap.c:
https://review.coreboot.org/c/coreboot/+/61517/comment/993a9802_c39e26f8
PS7, Line 42: return 512 *KiB;
> need consistent spacing around '*' (ctx:WxV)
Please fix.
https://review.coreboot.org/c/coreboot/+/61517/comment/53060947_bbf29f58
PS7, Line 54: tolm -= northbridge_get_tseg_size();
Since most other places also use TSEG size, would it be a good idea to have a function that returns both values? Or make the `northbridge_get_tseg_base()` function take the size as parameter.
File src/northbridge/intel/e7505/raminit.c:
https://review.coreboot.org/c/coreboot/+/61517/comment/7b9cdbbb_0d1e42ad
PS7, Line 1690: #define HOST_BRIDGE PCI_DEV(0, 0, 0)
Other Intel northbridges have this define in a common header to avoid redundancy. Hmmm, maybe we should look into making SCONFIG generate these macros from devicetree aliases.
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Hello build bot (Jenkins), Angel Pons, Elyes Haouas,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/70021
to look at the new patch set (#7).
Change subject: util/crossgcc/buildgcc: Use GitHub for downloading IASL
......................................................................
util/crossgcc/buildgcc: Use GitHub for downloading IASL
The download links from acpica.org [1] are not stable, and for some
reason they named the release tarballs with .tar_0.gz. Thus, use the
tarballs from their GitHub repository generated out of the release
tags [2].
Tested locally and also IASL patch applies.
[1] https://www.acpica.org/downloads
[2] https://github.com/acpica/acpica/tags
Signed-off-by: Felix Singer <felixsinger(a)posteo.net>
Change-Id: I7b10dd1db4299aaef96bc29023bed874b660aba0
---
M util/crossgcc/buildgcc
R util/crossgcc/patches/acpica-R10_20_22_iasl.patch
A util/crossgcc/sum/R10_20_22.tar.gz.cksum
D util/crossgcc/sum/acpica-unix2-20221020.tar.gz.cksum
4 files changed, 24 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/70021/7
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Hello build bot (Jenkins), Angel Pons, Elyes Haouas,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/70021
to look at the new patch set (#6).
Change subject: util/crossgcc/buildgcc: Use GitHub for downloading IASL
......................................................................
util/crossgcc/buildgcc: Use GitHub for downloading IASL
The download links from acpica.org [1] are not stable, and for some
reason they named the release tarballs with .tar_0.gz. Thus, use the
tarballs from their GitHub repository generated out of the release
tags [2].
Tested locally and also IASL patch applies.
[1] https://www.acpica.org/downloads
[2] https://github.com/acpica/acpica/tags
Signed-off-by: Felix Singer <felixsinger(a)posteo.net>
Change-Id: I7b10dd1db4299aaef96bc29023bed874b660aba0
---
M util/crossgcc/buildgcc
R util/crossgcc/patches/acpica-R10_20_22_iasl.patch
A util/crossgcc/sum/R10_20_22.tar.gz.cksum
D util/crossgcc/sum/acpica-unix2-20221020.tar.gz.cksum
4 files changed, 23 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/70021/6
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Hello build bot (Jenkins), Angel Pons, Elyes Haouas,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/70021
to look at the new patch set (#5).
Change subject: util/crossgcc/buildgcc: Use GitHub for downloading IASL
......................................................................
util/crossgcc/buildgcc: Use GitHub for downloading IASL
The download links from acpica.org [1] are not stable, and for some
reason they named the release tarballs with .tar_0.gz. Thus, use the
tarballs from their GitHub repository generated out of the release tags.
Tested locally and also IASL patch applies.
[1] https://www.acpica.org/downloads
Signed-off-by: Felix Singer <felixsinger(a)posteo.net>
Change-Id: I7b10dd1db4299aaef96bc29023bed874b660aba0
---
M util/crossgcc/buildgcc
R util/crossgcc/patches/acpica-R10_20_22_iasl.patch
A util/crossgcc/sum/R10_20_22.tar.gz.cksum
D util/crossgcc/sum/acpica-unix2-20221020.tar.gz.cksum
4 files changed, 21 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/70021/5
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