coreboot-gerrit November 2022

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[S] Change in coreboot[master]: [WIP] soc/amd/mendocino: Add support for 64bit builds
by Felix Held (Code Review) 29 Nov '22

29 Nov '22

Attention is currently required from: Jason Glenesk, Raul Rangel, Matt DeVillier, Fred Reitberger. Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/70136 ) Change subject: [WIP] soc/amd/mendocino: Add support for 64bit builds ...................................................................... [WIP] soc/amd/mendocino: Add support for 64bit builds Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I59a02879696fe457a797c742e42fa4a4d332043d --- M src/soc/amd/mendocino/Kconfig 1 file changed, 11 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/70136/1 diff --git a/src/soc/amd/mendocino/Kconfig b/src/soc/amd/mendocino/Kconfig index 5dd2164..d1d30df 100644 --- a/src/soc/amd/mendocino/Kconfig +++ b/src/soc/amd/mendocino/Kconfig @@ -34,6 +34,7 @@ select HAVE_ACPI_TABLES select HAVE_CF9_RESET select HAVE_EM100_SUPPORT + select HAVE_EXP_X86_64_SUPPORT select HAVE_FSP_GOP select HAVE_SMI_HANDLER select IDT_IN_EVERY_STAGE -- To view, visit https://review.coreboot.org/c/coreboot/+/70136 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I59a02879696fe457a797c742e42fa4a4d332043d Gerrit-Change-Number: 70136 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: [WIP] vc/amd/fsp/mendocino/FspmUpd: don't use pointers for usb_phy co...
by Felix Held (Code Review) 29 Nov '22

29 Nov '22

Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/70135 ) Change subject: [WIP] vc/amd/fsp/mendocino/FspmUpd: don't use pointers for usb_phy config ...................................................................... [WIP] vc/amd/fsp/mendocino/FspmUpd: don't use pointers for usb_phy config The size of a pointer changes between a 32 and 64 bit coreboot build. In order to be able to use a 32 bit FSP in a 64 bit coreboot build, change the pointer in the UPDs to a uint32_t to always have a 32 bit field in the UPD for this. TEST=None Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I419fef73d2881e323487bc7fe641b2ac4041cb17 --- M src/soc/amd/mendocino/fsp_m_params.c M src/vendorcode/amd/fsp/mendocino/FspmUpd.h 2 files changed, 28 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/70135/1 diff --git a/src/soc/amd/mendocino/fsp_m_params.c b/src/soc/amd/mendocino/fsp_m_params.c index 8cbea5d..d6eae9a 100644 --- a/src/soc/amd/mendocino/fsp_m_params.c +++ b/src/soc/amd/mendocino/fsp_m_params.c @@ -6,6 +6,7 @@ #include <amdblocks/ioapic.h> #include <amdblocks/memmap.h> #include <assert.h> +#include <console/console.h> #include <console/uart.h> #include <device/device.h> #include <fsp/api.h> @@ -157,9 +158,15 @@ lcl_usb_phy.Version_Major = FSP_USB_STRUCT_MAJOR_VERSION; lcl_usb_phy.Version_Minor = FSP_USB_STRUCT_MINOR_VERSION; lcl_usb_phy.TableLength = sizeof(struct usb_phy_config); - mcfg->usb_phy = &lcl_usb_phy; + if ((uintptr_t)&lcl_usb_phy <= UINT32_MAX) { + mcfg->usb_phy_ptr = (uint32_t)(uintptr_t)&lcl_usb_phy; + } else { + printk(BIOS_ERR, "USB PHY config struct above 4GB; can't pass USB PHY " + "configuration to 32 bit FSP.\n"); + mcfg->usb_phy_ptr = 0; + } } else { - mcfg->usb_phy = NULL; + mcfg->usb_phy_ptr = 0; } fsp_fill_pcie_ddi_descriptors(mcfg); diff --git a/src/vendorcode/amd/fsp/mendocino/FspmUpd.h b/src/vendorcode/amd/fsp/mendocino/FspmUpd.h index f42ed43..7639ab1 100644 --- a/src/vendorcode/amd/fsp/mendocino/FspmUpd.h +++ b/src/vendorcode/amd/fsp/mendocino/FspmUpd.h @@ -94,7 +94,8 @@ /** Offset 0x04CF**/ uint32_t telemetry_vddcrsocfull_scale_current; /** Offset 0x04D3**/ uint32_t telemetry_vddcrsocOffset; /** Offset 0x04D7**/ uint8_t UnusedUpdSpace1; - /** Offset 0x04D8**/ struct usb_phy_config *usb_phy; + /* usb_phy_ptr is actually struct usb_phy_config *, but that won't work for 64bit coreboot */ + /** Offset 0x04D8**/ uint32_t usb_phy_ptr; /** Offset 0x04DC**/ uint8_t UnusedUpdSpace2[292]; /** Offset 0x0600**/ uint16_t UpdTerminator; } FSP_M_CONFIG; -- To view, visit https://review.coreboot.org/c/coreboot/+/70135 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I419fef73d2881e323487bc7fe641b2ac4041cb17 Gerrit-Change-Number: 70135 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newchange

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[M] Change in coreboot[master]: soc/intel/meteorlake: Refactor `pmc_lockdown_cfg` function
by Kapil Porwal (Code Review) 29 Nov '22

29 Nov '22

Attention is currently required from: Tarun Tuli, Subrata Banik. Kapil Porwal has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/70132 ) Change subject: soc/intel/meteorlake: Refactor `pmc_lockdown_cfg` function ...................................................................... Patch Set 3: (1 comment) This change is ready for review. File src/soc/intel/meteorlake/lockdown.c: https://review.coreboot.org/c/coreboot/+/70132/comment/63e8269b_83134dd6 PS1, Line 25: setbits32(pmcbase + GEN_PMCON_B, SMI_LOCK); > need to add the same from ADL […] Ack. Thanks for the clarification. -- To view, visit https://review.coreboot.org/c/coreboot/+/70132 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3622748d8fecef69c60bb3fe9bfe68fc126764b7 Gerrit-Change-Number: 70132 Gerrit-PatchSet: 3 Gerrit-Owner: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Comment-Date: Tue, 29 Nov 2022 17:03:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/skyrim/var/winterhold: Enable Dynamic DPTC config
by Raul Rangel (Code Review) 29 Nov '22

29 Nov '22

Attention is currently required from: Jason Nien, EricKY Cheng, Jon Murphy, Martin Roth, Tim Van Patten, Moises Garcia, Eric Peers, Karthikeyan Ramasubramanian. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69024 ) Change subject: mb/google/skyrim/var/winterhold: Enable Dynamic DPTC config ...................................................................... Patch Set 10: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/69024 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I957511c44278a7cffb7cb5d7e099eb13232b6a1a Gerrit-Change-Number: 69024 Gerrit-PatchSet: 10 Gerrit-Owner: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Peers <epeers(a)google.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Moises Garcia <moisesgarcia(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nelson Ye <nelson_ye(a)compal.corp-partner.google.com> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Attention: Jon Murphy <jpmurphy(a)google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Tim Van Patten <timvp(a)google.com> Gerrit-Attention: Moises Garcia <moisesgarcia(a)google.com> Gerrit-Attention: Eric Peers <epeers(a)google.com> Gerrit-Attention: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Comment-Date: Tue, 29 Nov 2022 16:59:11 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: [WIP]cpu/mp_init: Detect the number of CPUs are runtime
by build bot (Jenkins) (Code Review) 29 Nov '22

29 Nov '22

Attention is currently required from: Arthur Heymans, Kyösti Mälkki. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68893 ) Change subject: [WIP]cpu/mp_init: Detect the number of CPUs are runtime ...................................................................... Patch Set 19: Verified+1 (2 comments) Commit Message: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-164811): https://review.coreboot.org/c/coreboot/+/68893/comment/4bba2ecc_e0224f8a PS19, Line 8: Possible repeated word: 'are' File src/cpu/x86/mp_init.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-164811): https://review.coreboot.org/c/coreboot/+/68893/comment/ab631b0a_9e58df51 PS19, Line 499: if (!cpu->enabled) { braces {} are not necessary for any arm of this statement -- To view, visit https://review.coreboot.org/c/coreboot/+/68893 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iafe9d3d4838dad46cd0c7b6d30b905cbd258f17f Gerrit-Change-Number: 68893 Gerrit-PatchSet: 19 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Tue, 29 Nov 2022 16:59:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: mb/google/skyrim/var/winterhold: update thermal config
by Raul Rangel (Code Review) 29 Nov '22

29 Nov '22

Attention is currently required from: Dtrain Hsu, Jason Nien, EricKY Cheng, Chris Wang, Martin Roth, Eric Peers, Karthikeyan Ramasubramanian. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68472 ) Change subject: mb/google/skyrim/var/winterhold: update thermal config ...................................................................... Patch Set 31: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/68472 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie0740cb5bb16cd53c2ee6937e32a974346012823 Gerrit-Change-Number: 68472 Gerrit-PatchSet: 31 Gerrit-Owner: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Peers <epeers(a)google.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nelson Ye <nelson_ye(a)compal.corp-partner.google.com> Gerrit-Attention: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Attention: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Eric Peers <epeers(a)google.com> Gerrit-Attention: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Comment-Date: Tue, 29 Nov 2022 16:58:59 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: ec/google/chromec: Add DPTC support for host event 1/2/9
by Raul Rangel (Code Review) 29 Nov '22

29 Nov '22

Attention is currently required from: Jason Nien, EricKY Cheng, Caveh Jalali, Isaac Lee, Tim Wawrzynczak, Jon Murphy, Martin Roth, Eric Peers, Moises Garcia, Karthik Ramasubramanian. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67793 ) Change subject: ec/google/chromec: Add DPTC support for host event 1/2/9 ...................................................................... Patch Set 30: Code-Review+2 (1 comment) File src/ec/google/chromeec/acpi/ec.asl: https://review.coreboot.org/c/coreboot/+/67793/comment/e6a66e2b_191a1b4e PS30, Line 234: DPTC Part of me is tempted to just call `\PNOT()` instead. But we can save that refactor for later. -- To view, visit https://review.coreboot.org/c/coreboot/+/67793 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I156a9d138ccac7f75cc0dd0d827f7a721fcbc782 Gerrit-Change-Number: 67793 Gerrit-PatchSet: 30 Gerrit-Owner: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Boris Mittelberg <bmbm(a)google.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Peers <epeers(a)google.com> Gerrit-Reviewer: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Isaac Lee <isaaclee(a)google.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Moises Garcia <moisesgarcia(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Attention: Caveh Jalali <caveh(a)chromium.org> Gerrit-Attention: Isaac Lee <isaaclee(a)google.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Jon Murphy <jpmurphy(a)google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Eric Peers <epeers(a)google.com> Gerrit-Attention: Moises Garcia <moisesgarcia(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Tue, 29 Nov 2022 16:57:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/brya: Enable Fast VMode for brya0, skolas and skolas4es
by Jérémy Compostella (Code Review) 29 Nov '22

29 Nov '22

Attention is currently required from: Bora Guvendik, Zhixing Ma, Anil Kumar K, Tarun Tuli, Jeremy Compostella. Jérémy Compostella has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69579 ) Change subject: mb/google/brya: Enable Fast VMode for brya0, skolas and skolas4es ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/69579 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7e318534f1429af8ec06048430966344ddd346a1 Gerrit-Change-Number: 69579 Gerrit-PatchSet: 2 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Jeremy Compostella <jeremy.compostella(a)gmail.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Zhixing Ma <zhixing.ma(a)intel.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Zhixing Ma <zhixing.ma(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Jeremy Compostella <jeremy.compostella(a)gmail.com> Gerrit-Comment-Date: Tue, 29 Nov 2022 16:54:50 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: soc/amd/common/acpi: Implement DTTS Proposal
by Raul Rangel (Code Review) 29 Nov '22

29 Nov '22

Attention is currently required from: Jason Nien, EricKY Cheng, Matt DeVillier, Paul Menzel, Eric Lai, Martin Roth, Eric Peers, LeilaCY Lin, Jason Glenesk, Caveh Jalali, Tim Wawrzynczak, Fred Reitberger, Karthikeyan Ramasubramanian, Boris Mittelberg, Felix Held. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68471 ) Change subject: soc/amd/common/acpi: Implement DTTS Proposal ...................................................................... Patch Set 71: Code-Review+1 (4 comments) File src/soc/amd/common/acpi/dptc.asl: https://review.coreboot.org/c/coreboot/+/68471/comment/048ad018_0059d2c0 PS71, Line 7: #if CONFIG(FEATURE_DYNAMIC_DPTC) : #include <soc/amd/common/acpi/dtts.asl> See my comment below. Move this `#if` into the skyrim `dtts.asl` https://review.coreboot.org/c/coreboot/+/68471/comment/6d7e4e64_69d93b62 PS71, Line 10: External(\_SB.DTTB, MethodObj) : External(\_SB.DTTC, MethodObj) : External(\_SB.DTTD, MethodObj) : External(\_SB.DTTE, MethodObj) : External(\_SB.DTTF, MethodObj) These externals should go into `dtts.asl` since that's what calls them. File src/soc/amd/common/acpi/dtts.asl: https://review.coreboot.org/c/coreboot/+/68471/comment/95c714ca_ddcf9a13 PS71, Line 13: // Set table A as default table after power on device : If (\_SB.PRTN == 7) : { : \_SB.DDEF() : Store (0, \_SB.PRTN) : Return (Zero) : } Jut an FYI: The values from the "default" table will be passed into FSP and FSP will perform the initial configuration. This DTTS method will get called once the OS initialized the ACPI subsystem. Since the FSP doesn't support all the new values we will be in an inconsistent state until the OS boots and calls this ACPI method :/ https://review.coreboot.org/c/coreboot/+/68471/comment/cd85c2b3_8e3c9f66 PS71, Line 28: TIN4 >= 123 :/ so this is still board specific config. I realize adding the extra knobs to device tree, writing new ASL values is a pain. I also ack that converting all this code to acpigen is going to be a nightmare to read and maintain. I also realize that we would like this to be common code. Weighing all these options I think we just move this file into the winterhold directory. If someone else (unlikely) wants to enable this feature we can then look at doing the refactors, or just copy/paste the file and change the new values. In the [skyrim/dsdt.asl](https://review.coreboot.org/plugins/gitiles/coreboot/+/ref… add the following block: ``` #if CONFIG(FEATURE_DYNAMIC_DPTC) #include <variant/acpi/dtts.asl> #endif ``` Then move this file into `src/mainboard/google/skyrim/variants/winterhold/include/variant/acpi/dtts.asl`. This copies the pattern we had setup for `zork`'s temperature sensors: https://review.coreboot.org/plugins/gitiles/coreboot/+/refs/heads/master/sr… -- To view, visit https://review.coreboot.org/c/coreboot/+/68471 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I866e5e497e2936984e713029b5f0b6d54cbc9622 Gerrit-Change-Number: 68471 Gerrit-PatchSet: 71 Gerrit-Owner: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Boris Mittelberg <bmbm(a)google.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Peers <epeers(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-CC: LeilaCY Lin <leilacy_lin(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Eric Peers <epeers(a)google.com> Gerrit-Attention: LeilaCY Lin <leilacy_lin(a)compal.corp-partner.google.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Caveh Jalali <caveh(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Attention: Boris Mittelberg <bmbm(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 29 Nov 2022 16:54:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/meteorlake: Update PMC register definition
by Subrata Banik (Code Review) 29 Nov '22

29 Nov '22

Attention is currently required from: Tarun Tuli, Kapil Porwal. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/70134 ) Change subject: soc/intel/meteorlake: Update PMC register definition ...................................................................... Patch Set 1: (1 comment) File src/soc/intel/meteorlake/include/soc/pmc.h: https://review.coreboot.org/c/coreboot/+/70134/comment/8e95f496_b5beb6ca PS1, Line 100: 0x18D4 0x18d4 -- To view, visit https://review.coreboot.org/c/coreboot/+/70134 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9508ecb8fd89fc6519317cf006f177b54d8e6b26 Gerrit-Change-Number: 70134 Gerrit-PatchSet: 1 Gerrit-Owner: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Comment-Date: Tue, 29 Nov 2022 16:54:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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