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Change subject: Documentation: Add wake source info to device tree documentation
......................................................................
Patch Set 4:
(1 comment)
File Documentation/getting_started/devicetree.md:
https://review.coreboot.org/c/coreboot/+/67385/comment/c3a7fb5d_454c4292
PS2, Line 262:
> Line 257+ shows how to enable this for AMD, just thought to add Intel there too.
Done
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Change subject: Documentation: document the new smbus console feature
......................................................................
Patch Set 12: Code-Review+2
(2 comments)
File Documentation/technotes/console.md:
https://review.coreboot.org/c/coreboot/+/67386/comment/ed00f80a_1372b92b
PS10, Line 9: SMBus is a two-wire interface which is based on the principles of operation
> How to wrap the links to multiple lines?
Done
https://review.coreboot.org/c/coreboot/+/67386/comment/641f0694_3dce1fa9
PS10, Line 52: https://forum.beagleboard.org/t/beaglebone-black-and-arduino-uno-i2c-commun…
> Should I archive the medium article links as well? Archiving that didn't work. […]
Done
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Change subject: drivers/smbus: initialize SC16IS7XX I2C to UART converter chip
......................................................................
Patch Set 14: Code-Review+2
(1 comment)
Patchset:
PS14:
> Is this patch ready to be merged?
Ack
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Change subject: mb/google/skyrim: Enable amdfw separation
......................................................................
Patch Set 15: Code-Review+2
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Hello build bot (Jenkins), YH Lin, Tarun Tuli, Subrata Banik, Tim Wawrzynczak,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/68025
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Change subject: mb/google/brya/var/brya0: add new THERMAL FW_CONFIG field
......................................................................
mb/google/brya/var/brya0: add new THERMAL FW_CONFIG field
Add a new THERMAL FW_CONFIG bitfield for describing power consumption
category of SoC.
BUG=b:250089101
TEST="emerge-brya coreboot chromeos-bootimage", flash and boot brya0
and skolas to kernel.
Change-Id: Iba3bd87abd4c112ceff4bbe51a7cf9eae3a694f2
Signed-off-by: Nick Vaccaro <nvaccaro(a)google.com>
---
M src/mainboard/google/brya/variants/brya0/overridetree.cb
M src/mainboard/google/brya/variants/skolas/overridetree.cb
2 files changed, 25 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/68025/2
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Change subject: mb/google/skyrim/var/winterhold: Enable DPTC support for Winterhold
......................................................................
Patch Set 1:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/68076/comment/4c0fb96d_0cffb754
PS1, Line 8: for Winterhold
nit: Unless someone else objects, this can be removed since the file name prefix already indicates this is for winterhold.
https://review.coreboot.org/c/coreboot/+/68076/comment/4e1be831_1f841364
PS1, Line 13: TEST=emerge-skyrim coreboot
Are you booting these devices with these changes also, to ensure the CLs don't break anything?
File src/mainboard/google/skyrim/Kconfig:
https://review.coreboot.org/c/coreboot/+/68076/comment/7810fbc5_e4df2d7c
PS1, Line 39: select SOC_AMD_COMMON_BLOCK_ACPI_DPTC if !BOARD_GOOGLE_MORTHAL
As Karthik pointed out in another CL, this can be moved to `Kconfig.name` and enabled for skyrim and winterhold there.
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Change subject: mb/protectli/vault_cml: Add Comet Lake 6 port board support
......................................................................
Patch Set 7:
(3 comments)
File src/mainboard/protectli/vault_cml/devicetree.cb:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159604):
https://review.coreboot.org/c/coreboot/+/67940/comment/93b95b0f_866f78e0
PS7, Line 58: # Enable SERIRQ continous
'continous' may be misspelled - perhaps 'continuous'?
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159604):
https://review.coreboot.org/c/coreboot/+/67940/comment/da83ed13_1dbbfcad
PS7, Line 269: device pnp 2e.4 on # Enviroment Controller
'Enviroment' may be misspelled - perhaps 'Environment'?
File src/mainboard/protectli/vault_cml/mainboard.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159604):
https://review.coreboot.org/c/coreboot/+/67940/comment/716b7438_9209ada6
PS7, Line 64: for (i = 0; i < 10000; i++) inb(0x61);
trailing statements should be on next line
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I'd like you to reexamine a change. Please visit
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Change subject: mb/protectli/vault_cml: Add Comet Lake 6 port board support
......................................................................
mb/protectli/vault_cml: Add Comet Lake 6 port board support
Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com>
Change-Id: If1b4f9c8245a082ff875ae9c6102a1c45e677d0b
---
M Documentation/mainboard/index.md
A Documentation/mainboard/protectli/vp46xx.md
A Documentation/mainboard/protectli/vp46xx_back.jpg
A Documentation/mainboard/protectli/vp46xx_flash.jpg
A Documentation/mainboard/protectli/vp46xx_front.jpg
A src/mainboard/protectli/vault_cml/Kconfig
A src/mainboard/protectli/vault_cml/Kconfig.name
A src/mainboard/protectli/vault_cml/Makefile.inc
A src/mainboard/protectli/vault_cml/acpi/ec.asl
A src/mainboard/protectli/vault_cml/acpi/superio.asl
A src/mainboard/protectli/vault_cml/board.fmd
A src/mainboard/protectli/vault_cml/board_info.txt
A src/mainboard/protectli/vault_cml/bootblock.c
A src/mainboard/protectli/vault_cml/cmos.default
A src/mainboard/protectli/vault_cml/cmos.layout
A src/mainboard/protectli/vault_cml/data.vbt
A src/mainboard/protectli/vault_cml/devicetree.cb
A src/mainboard/protectli/vault_cml/dsdt.asl
A src/mainboard/protectli/vault_cml/gma-mainboard.ads
A src/mainboard/protectli/vault_cml/gpio.c
A src/mainboard/protectli/vault_cml/gpio.h
A src/mainboard/protectli/vault_cml/hda_verb.c
A src/mainboard/protectli/vault_cml/mainboard.c
A src/mainboard/protectli/vault_cml/romstage.c
A src/mainboard/protectli/vault_cml/vboot-rwa.fmd
25 files changed, 1,329 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/67940/7
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