coreboot-gerrit October 2022

coreboot-gerrit@coreboot.org

1 participants
5881 discussions

[M] Change in coreboot[master]: soc/amd/*: Hook up device_operations in chipset.cb
by Arthur Heymans (Code Review) 04 Oct '22

04 Oct '22

Attention is currently required from: Jason Glenesk, Raul Rangel, Matt DeVillier, Fred Reitberger, Felix Held. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67738 ) Change subject: soc/amd/*: Hook up device_operations in chipset.cb ...................................................................... Patch Set 3: (3 comments) File src/soc/amd/cezanne/chip.c: https://review.coreboot.org/c/coreboot/+/67738/comment/50def1c5_1f810f11 PS1, Line 63: if (!dev->enabled) > sounds good to me Done https://review.coreboot.org/c/coreboot/+/67738/comment/4eb86718_4fdc213b PS1, Line 37: static > i think that this static needs to be removed Right. As it's a global variable it should also be renamed. File src/soc/amd/cezanne/chipset.cb: https://review.coreboot.org/c/coreboot/+/67738/comment/38aef6d4_d6f12149 PS1, Line 3: ops > Ohh I like it. When did this get added? https://review.coreboot.org/c/coreboot/+/66483/5 recently :-) -- To view, visit https://review.coreboot.org/c/coreboot/+/67738 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2afc1855407910f1faa9bdd4e9416dd46474658e Gerrit-Change-Number: 67738 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 04 Oct 2022 15:09:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Comment-In-Reply-To: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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[S] Change in gerrit-avatars[master]: Add avatar for userid: 1004528 (Fabio Aiuto)
by Fabio Aiuto (Code Review) 04 Oct '22

04 Oct '22

Fabio Aiuto has uploaded this change for review. ( https://review.coreboot.org/c/gerrit-avatars/+/68114 ) Change subject: Add avatar for userid: 1004528 (Fabio Aiuto) ...................................................................... Add avatar for userid: 1004528 (Fabio Aiuto) Signed-off-by: Fabio Aiuto <fabioaiuto83(a)gmail.com> Change-Id: I4a1f6463e4fdd44d4267451054f123461825f307 --- A 1004528.jpg 1 file changed, 10 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/gerrit-avatars refs/changes/14/68114/1 diff --git a/1004528.jpg b/1004528.jpg new file mode 100644 index 0000000..2887013 --- /dev/null +++ b/1004528.jpg Binary files differ -- To view, visit https://review.coreboot.org/c/gerrit-avatars/+/68114 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: gerrit-avatars Gerrit-Branch: master Gerrit-Change-Id: I4a1f6463e4fdd44d4267451054f123461825f307 Gerrit-Change-Number: 68114 Gerrit-PatchSet: 1 Gerrit-Owner: Fabio Aiuto <fabioaiuto83(a)gmail.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: soc/intel/cmn/gfx: Add missing CML-U IGD device IDs
by Angel Pons (Code Review) 04 Oct '22

04 Oct '22

Attention is currently required from: Michał Żygowski. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67975 ) Change subject: soc/intel/cmn/gfx: Add missing CML-U IGD device IDs ...................................................................... Patch Set 6: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/67975 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iee720a272367aead31c8c8fa712bade1b6e53948 Gerrit-Change-Number: 67975 Gerrit-PatchSet: 6 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Comment-Date: Tue, 04 Oct 2022 14:50:06 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XL] Change in coreboot[master]: mb/protectli/vault_cml: Add Comet Lake 6 port board support
by Angel Pons (Code Review) 04 Oct '22

04 Oct '22

Attention is currently required from: Michał Żygowski, Piotr Król. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67940 ) Change subject: mb/protectli/vault_cml: Add Comet Lake 6 port board support ...................................................................... Patch Set 15: Code-Review+1 (12 comments) File Documentation/mainboard/protectli/vp46xx.md: https://review.coreboot.org/c/coreboot/+/67940/comment/b14f17f5_e82acfe5 PS7, Line 68: - Super I/O serial port 0 via front microUSB connector > Added info about the adapter in this bulletpoint Thanks! https://review.coreboot.org/c/coreboot/+/67940/comment/0ee4a1dd_c1943f29 PS7, Line 90: ITE IT8786E/IT8784E > Added a note on the beginning of this section. Interesting. The HP 280 G2 mainboard has either an IT8625E or an IT8656E depending on BOM (the former for the full featured config, the latter for the legacy-free config). File src/mainboard/protectli/vault_cml/devicetree.cb: https://review.coreboot.org/c/coreboot/+/67940/comment/644a6f6f_c1f46826 PS7, Line 287: device pci 1f.1 on end # P2SB : device pci 1f.2 on end # Power Management Controller > Marked them both as hidden. Is that fine for you? If it works properly, sure. This may be related to the issues with PMC and global reset request. File src/mainboard/protectli/vault_cml/devicetree.cb: https://review.coreboot.org/c/coreboot/+/67940/comment/f68e5dd3_ccb1d1f4 PS13, Line 55: register "SataMode" = "0" This should be dropped too. SATA mode should be a Kconfig option instead, anyway. https://review.coreboot.org/c/coreboot/+/67940/comment/9e8a4b91_7876615a PS13, Line 67: register "PcieRpEnable[13]" = "1" : register "PcieRpEnable[14]" = "1" : register "PcieRpEnable[15]" = "1" As root port 13 (array index 12) is x4, these three root ports do not have any lanes associated to them, so their PCI devices should not be enabled. TL;DR drop these settings https://review.coreboot.org/c/coreboot/+/67940/comment/f02d59ad_85d8c3af PS13, Line 80: register "PcieRpAdvancedErrorReporting[13]" = "1" : register "PcieRpAdvancedErrorReporting[14]" = "1" : register "PcieRpAdvancedErrorReporting[15]" = "1" Same as above https://review.coreboot.org/c/coreboot/+/67940/comment/05e59a32_3d5f7047 PS13, Line 93: register "PcieRpLtrEnable[13]" = "1" : register "PcieRpLtrEnable[14]" = "1" : register "PcieRpLtrEnable[15]" = "1" Same as above https://review.coreboot.org/c/coreboot/+/67940/comment/8aa34552_e065ed80 PS13, Line 97: register "PcieClkSrcUsage[0]" = "PCIE_CLK_FREE" : register "PcieClkSrcUsage[1]" = "PCIE_CLK_FREE" : register "PcieClkSrcUsage[2]" = "PCIE_CLK_FREE" : register "PcieClkSrcUsage[3]" = "PCIE_CLK_FREE" : register "PcieClkSrcUsage[4]" = "PCIE_CLK_FREE" : register "PcieClkSrcUsage[5]" = "PCIE_CLK_FREE" You could map the clocks to the corresponding root ports (using the array index values), if you have schematics. Clock request should be mapped as well if you want to support ASPM L1 https://review.coreboot.org/c/coreboot/+/67940/comment/0a500957_1e73c5fc PS13, Line 202: device pci 1d.5 on end # PCI Express Port 14 : device pci 1d.6 on end # PCI Express Port 15 : device pci 1d.7 on end # PCI Express Port 16 Same as the FSP settings. These root ports have no lanes associated to them (`device pci 1d.4` is configured to use 4 lanes), so these should be off. File src/mainboard/protectli/vault_cml/die.c: https://review.coreboot.org/c/coreboot/+/67940/comment/c3f173ac_84d53dd8 PS13, Line 12: static uint8_t beep_count = 0;; > Statements terminations use 1 semicolon Please fix. File src/mainboard/protectli/vault_cml/mainboard.c: https://review.coreboot.org/c/coreboot/+/67940/comment/03686991_4b5d1e69 PS7, Line 72: beep(1500); > Made it optional with Kconfig. […] Nice, thank you! FWIW, we added the "blink SATA LED on death" to the Librem Mini because it would be hard to tell whether coreboot died or FSP was still doing the thing. It proved to be very useful if RAM isn't installed properly, as coreboot will die pretty quickly. https://review.coreboot.org/c/coreboot/+/67940/comment/42fd45c4_b35f0e51 PS7, Line 78: * when the screen goes blank/inactive/idle in the OS */ > Apparently the issue is not present anymore, so I removed the workaround. Ah, good to know. -- To view, visit https://review.coreboot.org/c/coreboot/+/67940 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If1b4f9c8245a082ff875ae9c6102a1c45e677d0b Gerrit-Change-Number: 67940 Gerrit-PatchSet: 15 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Comment-Date: Tue, 04 Oct 2022 14:44:56 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Michał Żygowski <michal.zygowski(a)3mdeb.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/cannonlake: Report missing CML-U IGD devices
by Michał Żygowski (Code Review) 04 Oct '22

04 Oct '22

Michał Żygowski has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/68019 ) Change subject: soc/intel/cannonlake: Report missing CML-U IGD devices ...................................................................... Abandoned Squashed with previous change -- To view, visit https://review.coreboot.org/c/coreboot/+/68019 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5357a14103cc823c03e434e01e6873e538ffa280 Gerrit-Change-Number: 68019 Gerrit-PatchSet: 3 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

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[XL] Change in coreboot[master]: mb/protectli/vault_cml: Add Comet Lake 6 port board support
by build bot (Jenkins) (Code Review) 04 Oct '22

04 Oct '22

Attention is currently required from: Angel Pons, Piotr Król. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67940 ) Change subject: mb/protectli/vault_cml: Add Comet Lake 6 port board support ...................................................................... Patch Set 15: Verified+1 (1 comment) File src/mainboard/protectli/vault_cml/die.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159657): https://review.coreboot.org/c/coreboot/+/67940/comment/1839a12e_ba83c32e PS15, Line 12: static uint8_t beep_count = 0;; Statements terminations use 1 semicolon -- To view, visit https://review.coreboot.org/c/coreboot/+/67940 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If1b4f9c8245a082ff875ae9c6102a1c45e677d0b Gerrit-Change-Number: 67940 Gerrit-PatchSet: 15 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Comment-Date: Tue, 04 Oct 2022 14:44:05 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/cannonlake: Report missing CML-U IGD devices
by Michał Żygowski (Code Review) 04 Oct '22

04 Oct '22

Attention is currently required from: Angel Pons, Krystian Hebel. Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68019 ) Change subject: soc/intel/cannonlake: Report missing CML-U IGD devices ...................................................................... Patch Set 3: (1 comment) Patchset: PS2: > I'd prefer to squash this with the parent commit. Squashed, abandoning... -- To view, visit https://review.coreboot.org/c/coreboot/+/68019 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5357a14103cc823c03e434e01e6873e538ffa280 Gerrit-Change-Number: 68019 Gerrit-PatchSet: 3 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Comment-Date: Tue, 04 Oct 2022 14:44:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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[XL] Change in coreboot[master]: mb/protectli/vault_cml: Add Comet Lake 6 port board support
by Michał Żygowski (Code Review) 04 Oct '22

04 Oct '22

Attention is currently required from: Angel Pons, Piotr Król. Hello build bot (Jenkins), Angel Pons, Piotr Król, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/67940 to look at the new patch set (#15). Change subject: mb/protectli/vault_cml: Add Comet Lake 6 port board support ...................................................................... mb/protectli/vault_cml: Add Comet Lake 6 port board support Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com> Change-Id: If1b4f9c8245a082ff875ae9c6102a1c45e677d0b --- M Documentation/mainboard/index.md A Documentation/mainboard/protectli/vp46xx.md A Documentation/mainboard/protectli/vp46xx_back.jpg A Documentation/mainboard/protectli/vp46xx_flash.jpg A Documentation/mainboard/protectli/vp46xx_front.jpg A src/mainboard/protectli/vault_cml/Kconfig A src/mainboard/protectli/vault_cml/Kconfig.name A src/mainboard/protectli/vault_cml/Makefile.inc A src/mainboard/protectli/vault_cml/acpi/ec.asl A src/mainboard/protectli/vault_cml/acpi/superio.asl A src/mainboard/protectli/vault_cml/board.fmd A src/mainboard/protectli/vault_cml/board_info.txt A src/mainboard/protectli/vault_cml/bootblock.c A src/mainboard/protectli/vault_cml/cmos.default A src/mainboard/protectli/vault_cml/cmos.layout A src/mainboard/protectli/vault_cml/data.vbt A src/mainboard/protectli/vault_cml/devicetree.cb A src/mainboard/protectli/vault_cml/die.c A src/mainboard/protectli/vault_cml/dsdt.asl A src/mainboard/protectli/vault_cml/gma-mainboard.ads A src/mainboard/protectli/vault_cml/gpio.c A src/mainboard/protectli/vault_cml/gpio.h A src/mainboard/protectli/vault_cml/hda_verb.c A src/mainboard/protectli/vault_cml/mainboard.c A src/mainboard/protectli/vault_cml/romstage.c A src/mainboard/protectli/vault_cml/vboot-rwa.fmd 26 files changed, 1,306 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/67940/15 -- To view, visit https://review.coreboot.org/c/coreboot/+/67940 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If1b4f9c8245a082ff875ae9c6102a1c45e677d0b Gerrit-Change-Number: 67940 Gerrit-PatchSet: 15 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: pc80/i8254: Add speaker beep function
by Michał Żygowski (Code Review) 04 Oct '22

04 Oct '22

Attention is currently required from: Angel Pons. Hello build bot (Jenkins), Angel Pons, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/68100 to look at the new patch set (#3). Change subject: pc80/i8254: Add speaker beep function ...................................................................... pc80/i8254: Add speaker beep function Some platforms have an onboard speaker which could be used as an indicator of successful boot or critical error, e.g. in die_notify function. The function assumes that SPKR GPIO is properly configured by the platform code. Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com> Change-Id: I8189b3462bb5140af352fa786db3a6a2a45076f2 --- M src/drivers/pc80/pc/i8254.c M src/include/pc80/i8254.h 2 files changed, 38 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/68100/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/68100 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8189b3462bb5140af352fa786db3a6a2a45076f2 Gerrit-Change-Number: 68100 Gerrit-PatchSet: 3 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: soc/intel/cmn/gfx: Add missing CML-U IGD device IDs
by Michał Żygowski (Code Review) 04 Oct '22

04 Oct '22

Hello build bot (Jenkins), Angel Pons, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/67975 to look at the new patch set (#6). Change subject: soc/intel/cmn/gfx: Add missing CML-U IGD device IDs ...................................................................... soc/intel/cmn/gfx: Add missing CML-U IGD device IDs Intel Core i5-10210U can have the following IGD Device IDs 0x9B21/0x9B41/0x9BAC/0x9BCA/0x9BCC according to Intel ARK. Some of these IDs were not present in coreboot source nor hooked to the common graphics driver. Add the missing IDs so that the graphics driver will probe on the mentioned processor and detect the framebuffer. TEST=Boot Protectli VP4650 with i5-10210U and see framebuffer is detected when using FSP GOP and libgfxinit. Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com> Change-Id: Iee720a272367aead31c8c8fa712bade1b6e53948 --- M src/include/device/pci_ids.h M src/soc/intel/cannonlake/bootblock/report_platform.c M src/soc/intel/common/block/graphics/graphics.c 3 files changed, 26 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/67975/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/67975 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iee720a272367aead31c8c8fa712bade1b6e53948 Gerrit-Change-Number: 67975 Gerrit-PatchSet: 6 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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coreboot-gerrit October 2022