coreboot-gerrit October 2022

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[master]: treewide: use helpers to check for enabled pci devices
by Angel Pons (Code Review) 04 Oct '22

04 Oct '22

Attention is currently required from: Jeff Daly, Fabio Aiuto, Mariusz Szafrański, Suresh Bellampalli, Stefan Reinauer, Vanessa Eusebio. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68102 ) Change subject: treewide: use helpers to check for enabled pci devices ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/68102 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idb992904112db611119b2d33c8b1dd912b2c8539 Gerrit-Change-Number: 68102 Gerrit-PatchSet: 2 Gerrit-Owner: Fabio Aiuto <fabioaiuto83(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Reviewer: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Attention: Fabio Aiuto <fabioaiuto83(a)gmail.com> Gerrit-Attention: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Attention: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Comment-Date: Tue, 04 Oct 2022 16:20:52 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/skyrim: Enable amdfw separation
by 9elements QA (Code Review) 04 Oct '22

04 Oct '22

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67261 ) Change subject: mb/google/skyrim: Enable amdfw separation ...................................................................... Patch Set 16: Automatic boot test returned (PASS/FAIL/TOTAL): 11 / 1 / 12 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES_ and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/125791 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/125790 PASS: x86_32 "ThinkPad T500" , build config LENOVO_T500 and payload SeaBIOS : https://lava.9esec.io/r/125789 PASS: x86_32 "HP Z220 SFF Workstation" , build config HP_Z220_SFF_WORKSTATION and payload LinuxBoot_BB_kexec : https://lava.9esec.io/r/125788 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload TianoCore : https://lava.9esec.io/r/125787 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload SeaBIOS : https://lava.9esec.io/r/125786 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload TianoCore : https://lava.9esec.io/r/125785 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload SeaBIOS : https://lava.9esec.io/r/125784 PASS: x86_64 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_X86_64 and payload SeaBIOS : https://lava.9esec.io/r/125783 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ASAN and payload SeaBIOS : https://lava.9esec.io/r/125782 FAIL: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ and payload SeaBIOS : https://lava.9esec.io/r/125781 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX and payload SeaBIOS : https://lava.9esec.io/r/125780 Please note: This test is under development and might not be accurate at all! -- To view, visit https://review.coreboot.org/c/coreboot/+/67261 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I78ec6d28b4c5fc40bdade47489d58180a54dee4d Gerrit-Change-Number: 67261 Gerrit-PatchSet: 16 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Robert Zieba <robertzieba(a)google.com> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-Comment-Date: Tue, 04 Oct 2022 16:05:01 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: include/device/device_util.c: add helpers to check pci device enabled
by Angel Pons (Code Review) 04 Oct '22

04 Oct '22

Attention is currently required from: Fabio Aiuto, Paul Menzel, Tim Wawrzynczak, Felix Held. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68101 ) Change subject: include/device/device_util.c: add helpers to check pci device enabled ...................................................................... Patch Set 1: Code-Review+1 (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/68101/comment/9b0b41d2_c0595a63 PS1, Line 7: add helpers to check pci device enabled Hmmm, this is a bit confusing, how about: Add predicates for PCI devices Where "predicate" is a function that returns true or false (the equivalent of a "yes/no question" in human communication languages). File src/device/device_util.c: https://review.coreboot.org/c/coreboot/+/68101/comment/17dac690_85b2a122 PS1, Line 969: pci These names are somewhat inaccurate, as this could be a non-PCI device. Would be nice to rename them to `dev`, although the `cpu` names above should also be changed. This can be done in a follow-up. -- To view, visit https://review.coreboot.org/c/coreboot/+/68101 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3257c8404017372f6cdd9f6cf9453502447343a0 Gerrit-Change-Number: 68101 Gerrit-PatchSet: 1 Gerrit-Owner: Fabio Aiuto <fabioaiuto83(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Fabio Aiuto <fabioaiuto83(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 04 Oct 2022 15:58:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: 3rdparty/amd_blobs:Advance submodule pointer
by Jason Glenesk (Code Review) 04 Oct '22

04 Oct '22

Attention is currently required from: Jon Murphy, Karthik Ramasubramanian. Jason Glenesk has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68115 ) Change subject: 3rdparty/amd_blobs:Advance submodule pointer ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: Please help to review this change. -- To view, visit https://review.coreboot.org/c/coreboot/+/68115 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia28bba399ed527863f18ecd790c7096254873298 Gerrit-Change-Number: 68115 Gerrit-PatchSet: 1 Gerrit-Owner: Jason Glenesk <jason.glenesk(a)amd.corp-partner.google.com> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Jon Murphy <jpmurphy(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Tue, 04 Oct 2022 15:49:32 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: 3rdparty/amd_blobs:Advance submodule pointer
by Jason Glenesk (Code Review) 04 Oct '22

04 Oct '22

Jason Glenesk has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/68115 ) Change subject: 3rdparty/amd_blobs:Advance submodule pointer ...................................................................... 3rdparty/amd_blobs:Advance submodule pointer This picks up the following changes: 84928ce2 mendocino: Upgrade SMU to 90.35.0 12ca1df1 mendocino: Add all blobs from PI 1.0.0.2 Change-Id: Ia28bba399ed527863f18ecd790c7096254873298 Signed-off-by: Jason Glenesk <jason.glenesk(a)amd.com> --- M 3rdparty/amd_blobs 1 file changed, 15 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/68115/1 diff --git a/3rdparty/amd_blobs b/3rdparty/amd_blobs index 83c44ad..84928ce 160000 --- a/3rdparty/amd_blobs +++ b/3rdparty/amd_blobs @@ -1 +1 @@ -Subproject commit 83c44ad892094cad5da7b9562660fdbf4a9dd64c +Subproject commit 84928ce27f2b843eb1341966a18cf49ce9038253 -- To view, visit https://review.coreboot.org/c/coreboot/+/68115 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia28bba399ed527863f18ecd790c7096254873298 Gerrit-Change-Number: 68115 Gerrit-PatchSet: 1 Gerrit-Owner: Jason Glenesk <jason.glenesk(a)amd.corp-partner.google.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: include/device/device_util.c: add helpers to check pci device enabled
by Stefan Reinauer (Code Review) 04 Oct '22

04 Oct '22

Attention is currently required from: Fabio Aiuto, Paul Menzel, Tim Wawrzynczak, Felix Held. Stefan Reinauer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68101 ) Change subject: include/device/device_util.c: add helpers to check pci device enabled ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/68101 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3257c8404017372f6cdd9f6cf9453502447343a0 Gerrit-Change-Number: 68101 Gerrit-PatchSet: 1 Gerrit-Owner: Fabio Aiuto <fabioaiuto83(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Fabio Aiuto <fabioaiuto83(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 04 Oct 2022 15:47:52 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/skyrim: Enable amdfw separation
by Karthik Ramasubramanian (Code Review) 04 Oct '22

04 Oct '22

Karthik Ramasubramanian has submitted this change. ( https://review.coreboot.org/c/coreboot/+/67261 ) Change subject: mb/google/skyrim: Enable amdfw separation ...................................................................... mb/google/skyrim: Enable amdfw separation Select the config to separate the AMDFW binary from the verified boot section. BUG=b:203597980 TEST=Build Skyrim BIOS image and boot to OS with PSP verstage passing the hash table and PSP verifying the binaries against the hash table. Observe boot time improvement of ~120 ms while operating SPI bus at 66 MHz with PSP verstage enabled. Before this patch series: 508:finished loading body 1,978,053,432 (201,518) After this patch series: 508:finished loading body 7,948,797,849 (83,460) Change-Id: I78ec6d28b4c5fc40bdade47489d58180a54dee4d Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/67261 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Jon Murphy <jpmurphy(a)google.com> Reviewed-by: Tim Van Patten <timvp(a)google.com> --- M src/mainboard/google/skyrim/Kconfig M src/mainboard/google/skyrim/chromeos.fmd 2 files changed, 30 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Jon Murphy: Looks good to me, approved Tim Van Patten: Looks good to me, but someone else must approve diff --git a/src/mainboard/google/skyrim/Kconfig b/src/mainboard/google/skyrim/Kconfig index 72079e8..87cf6e4 100644 --- a/src/mainboard/google/skyrim/Kconfig +++ b/src/mainboard/google/skyrim/Kconfig @@ -97,6 +97,7 @@ config VBOOT_STARTS_BEFORE_BOOTBLOCK bool "Enable PSP_verstage" default y if VBOOT + select SEPARATE_SIGNED_PSPFW config VBOOT_STARTS_IN_BOOTBLOCK bool diff --git a/src/mainboard/google/skyrim/chromeos.fmd b/src/mainboard/google/skyrim/chromeos.fmd index 3be90a4..670ac16 100644 --- a/src/mainboard/google/skyrim/chromeos.fmd +++ b/src/mainboard/google/skyrim/chromeos.fmd @@ -4,11 +4,13 @@ RW_SECTION_A 3M { VBLOCK_A 8K FW_MAIN_A(CBFS) + SIGNED_AMDFW_A 1536K RW_FWID_A 256 } RW_SECTION_B 3M { VBLOCK_B 8K FW_MAIN_B(CBFS) + SIGNED_AMDFW_B 1536K RW_FWID_B 256 } RW_ELOG(PRESERVE) 4K -- To view, visit https://review.coreboot.org/c/coreboot/+/67261 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I78ec6d28b4c5fc40bdade47489d58180a54dee4d Gerrit-Change-Number: 67261 Gerrit-PatchSet: 16 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Robert Zieba <robertzieba(a)google.com> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[M] Change in coreboot[master]: xcompile: Add Zen compiler flag for AMD family 17h
by Martin Roth (Code Review) 04 Oct '22

04 Oct '22

Attention is currently required from: Bao Zheng, Jason Glenesk, Raul Rangel, Martin L Roth, Marshall Dawson, Matt DeVillier, Paul Menzel, Julius Werner, Zheng Bao, Arthur Heymans, Fred Reitberger, Felix Held. Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/65224 ) Change subject: xcompile: Add Zen compiler flag for AMD family 17h ...................................................................... Patch Set 15: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/65224/comment/13e4aaa8_97337fe2 PS14, Line 18: Time Stamp flag=i686 znver1(1st time)znver1(2nd time) : --------------------------------------------------------------------- : 1st timestamp 2156447 2156855 2156640 : start of bootblock 2156567(120) 2156974(119) 2156757(117) : end of bootblock 2157239(672) 2157645(671) 2157424(667) : starting to load rom 2157239(0) 2157645(0) 2157424(0) : finished loading rom 2177833(20594) 2178303(20658) 2178050(20626) : start of romstage 2177886(53) 2178355(52) 2178102(52) : loading FSP-M 2177946(60) 2178415(60) 2178168(66) : starting LZMA decomp 2177956(10) 2178425(10) 2178178(10) : finished LZMA decomp 2240419(62463) 2240972(62547) 2240726(62548) : before RAM initializ 2241001(582) 2241557(585) 2241314(588) : calling FspMemoryIni 2245520(4519) 2246083(4526) 2245830(4516) : returning from FspMe 2477918(232398) 2478800(232717) 2477950(232120) : after RAM initializa 2477989(71) 2478871(71) 2478021(71) : end of romstage 2477994(5) 2478876(5) 2478025(4) : starting to load ram 2477994(0) 2478876(0) 2478026(1) : starting LZMA decomp 2477999(5) 2478881(5) 2478031(5) : finished LZMA decomp 2498285(20286) 2499310(20429) 2498506(20475) : finished loading ram 2498799(514) 2499830(520) 2499024(518) : start of ramstage 2498864(65) 2499894(64) 2499088(64) : device enumeration 2498889(25) 2499920(26) 2499114(26) : loading FSP-S 2498889(0) 2499920(0) 2499114(0) : starting LZ4 decompr 2498898(9) 2499929(9) 2499123(9) : finished LZ4 decompr 2508072(9174) 2509163(9234) 2508378(9255) : calling FspSiliconIn 2508414(342) 2509506(343) 2508721(343) : returning from FspSi 2667199(158785) 2669022(159516) 2667146(158425) : device configuration 2667651(452) 2669465(443) 2667599(453) : calling FspNotify(Af 2668162(511) 2669976(511) 2668111(512) : returning from FspNo)2668397(235) 2670216(240) 2668350(239) : device enable 2668865(468) 2670685(469) 2668819(469) : device initializatio 2668931(66) 2670751(66) 2668886(67) : started reading uCod 2669869(938) 2671687(936) 2669775(889) : finished reading uCo 2669876(7) 2671694(7) 2669782(7) : Option ROM initializ 2698518(28642) 2699082(27388) 2696620(26838) : device setup done 2698643(125) 2699207(125) 2696746(126) : starting APOB read 2698646(3) 2699210(3) 2696750(4) : starting APOB erase 2698678(32) 2699247(37) 2696786(36) : starting APOB write 3169709(471031) 3150216(450969) 3155995(459209) : finished APOB 3378156(208447) 3358271(208055) 3364198(208203) : cbmem post 3378164(8) 3358278(7) 3364206(8) : write tables 3378198(34) 3358313(35) 3364240(34) : finalize chips 3379737(1539) 3359873(1560) 3365803(1563) : starting to load pay 3379744(7) 3359880(7) 3365809(6) : starting LZMA decomp 3379771(27) 3359906(26) 3365835(26) : finished LZMA decomp 3389693(9922) 3369872(9966) 3375807(9972) : calling FspNotify(Re 3389699(6) 3369884(12) 3375819(12) : returning from FspNo 3389956(257) 3370144(260) 3376079(260) : calling FspNotify(En 3389967(11) 3370154(10) 3376088(9) : returning from FspNo 3389982(15) 3370174(20) 3376104(16) : selfboot jump 3390558(576) 3370761(587) 3376679(575) > comparison of duration of line […] So what's the summary here? Can we close the bug as unsuccessful or is it worth continuing? -- To view, visit https://review.coreboot.org/c/coreboot/+/65224 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idc308c65d5239fe66062ec651e975c6c0fc9fb9b Gerrit-Change-Number: 65224 Gerrit-PatchSet: 15 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Zheng Bao Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 04 Oct 2022 15:18:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Bao Zheng <fishbaozi(a)gmail.com> Comment-In-Reply-To: Martin L Roth <gaumless(a)gmail.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: soc/intel/alderlake: Fix UFS OCP fabric timeout
by Nick Vaccaro (Code Review) 04 Oct '22

04 Oct '22

Attention is currently required from: V Sowmya, Haribalaraman Ramasubramanian, Rizwan Qureshi, Tim Wawrzynczak, Meera Ravindranath. Nick Vaccaro has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67770 ) Change subject: soc/intel/alderlake: Fix UFS OCP fabric timeout ...................................................................... Patch Set 3: Code-Review+2 (1 comment) File src/soc/intel/alderlake/acpi/ufs.asl: https://review.coreboot.org/c/coreboot/+/67770/comment/feee31f1_8b0750a2 PS2, Line 79: OCPD () > The PCI_Config, SystemIO and SystemMemory regions are excluded from the _REG rule. […] Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/67770 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I949a4538ea5c5c378a4e8ff7bb88546db1412df2 Gerrit-Change-Number: 67770 Gerrit-PatchSet: 3 Gerrit-Owner: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Divagar Mohandass <divagar.mohandass(a)intel.com> Gerrit-Reviewer: Haribalaraman Ramasubramanian <haribalaraman.r(a)intel.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Daniil Lunev <dlunev(a)chromium.org> Gerrit-CC: Reka Norman <rekanorman(a)chromium.org> Gerrit-Attention: V Sowmya <v.sowmya(a)intel.com> Gerrit-Attention: Haribalaraman Ramasubramanian <haribalaraman.r(a)intel.com> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Comment-Date: Tue, 04 Oct 2022 15:17:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Comment-In-Reply-To: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/skyrim: Update Kconfig to point to SPL
by Karthik Ramasubramanian (Code Review) 04 Oct '22

04 Oct '22

Karthik Ramasubramanian has submitted this change. ( https://review.coreboot.org/c/coreboot/+/67928 ) ( 8 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: mb/google/skyrim: Update Kconfig to point to SPL ...................................................................... mb/google/skyrim: Update Kconfig to point to SPL ChromeOS requires a custom SPL table. Update Kconfig to point to the ChromeOS version of the SPL resident in the blobs directory. Bug=b:245727030 Test=Boots Signed-off-by: Jon Murphy <jpmurphy(a)google.com> Change-Id: I70dcb19983c970283ee887b78a18c0668e83d4b0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/67928 Reviewed-by: Raul Rangel <rrangel(a)chromium.org> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/google/skyrim/Kconfig 1 file changed, 28 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Raul Rangel: Looks good to me, approved diff --git a/src/mainboard/google/skyrim/Kconfig b/src/mainboard/google/skyrim/Kconfig index cf2e136..72079e8 100644 --- a/src/mainboard/google/skyrim/Kconfig +++ b/src/mainboard/google/skyrim/Kconfig @@ -55,6 +55,15 @@ hex default 0x50 +config HAVE_SPL_FILE + bool + default y + +config SPL_TABLE_FILE + string + depends on HAVE_SPL_FILE + default "3rdparty/blobs/mainboard/google/skyrim/TypeId0x55_SplTableBl_MDN_CHROME.sbin" + config FMDFILE default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/chromeos.fmd" -- To view, visit https://review.coreboot.org/c/coreboot/+/67928 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I70dcb19983c970283ee887b78a18c0668e83d4b0 Gerrit-Change-Number: 67928 Gerrit-PatchSet: 12 Gerrit-Owner: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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coreboot-gerrit October 2022