coreboot-gerrit October 2022

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[master]: mb/google/nissa/var/xivu: Change TPM I2C freqeuncy to 1 MHz
by John Su (Code Review) 06 Oct '22

06 Oct '22

Attention is currently required from: Ian Feng, Kangheui Won, Tim Wawrzynczak, Reka Norman, Shou-Chieh Hsu. John Su has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68071 ) Change subject: mb/google/nissa/var/xivu: Change TPM I2C freqeuncy to 1 MHz ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/68071 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I33f712c14978b95f3a4da82d6f1f5fbae1283b17 Gerrit-Change-Number: 68071 Gerrit-PatchSet: 2 Gerrit-Owner: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Reviewer: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-CC: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-CC: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-CC: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-CC: Van Chen <van_chen(a)compal.corp-partner.google.com> Gerrit-Attention: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Attention: Kangheui Won <khwon(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Reka Norman <rekanorman(a)chromium.org> Gerrit-Attention: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Comment-Date: Thu, 06 Oct 2022 07:33:52 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: spd/lp5: Add new memory configuration of H9JCNNNFA5MLYR-N6E
by Frank Wu (Code Review) 06 Oct '22

06 Oct '22

Frank Wu has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/68154 ) Change subject: spd/lp5: Add new memory configuration of H9JCNNNFA5MLYR-N6E ...................................................................... spd/lp5: Add new memory configuration of H9JCNNNFA5MLYR-N6E Add Hynix H9JCNNNFA5MLYR-N6E in the memory_parts.json and re-generate the SPD. BUG=b:250470704 BRANCH=None TEST=util/spd_tools/bin/spd_gen spd/lp5/memory_parts.json lp5 Signed-off-by: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Change-Id: I9926a5859cf060e0bfa903f47d8a98c8d6115579 --- M spd/lp5/memory_parts.json M spd/lp5/set-0/parts_spd_manifest.generated.txt M spd/lp5/set-1/parts_spd_manifest.generated.txt 3 files changed, 29 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/68154/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/68154 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9926a5859cf060e0bfa903f47d8a98c8d6115579 Gerrit-Change-Number: 68154 Gerrit-PatchSet: 2 Gerrit-Owner: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: spd/lp5: Add new memory configuration of
by build bot (Jenkins) (Code Review) 06 Oct '22

06 Oct '22

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68154 ) Change subject: spd/lp5: Add new memory configuration of ...................................................................... Patch Set 1: (1 comment) Commit Message: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159794): https://review.coreboot.org/c/coreboot/+/68154/comment/52014955_288d5440 PS1, Line 8: Possible unwrapped commit description (prefer a maximum 72 chars per line) -- To view, visit https://review.coreboot.org/c/coreboot/+/68154 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9926a5859cf060e0bfa903f47d8a98c8d6115579 Gerrit-Change-Number: 68154 Gerrit-PatchSet: 1 Gerrit-Owner: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 06 Oct 2022 06:43:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: spd/lp5: Add new memory configuration of
by Frank Wu (Code Review) 06 Oct '22

06 Oct '22

Frank Wu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/68154 ) Change subject: spd/lp5: Add new memory configuration of ...................................................................... spd/lp5: Add new memory configuration of Add Hynix H9JCNNNFA5MLYR-N6E in the memory_parts.json and re-generate the SPD. BUG=b:250470704 BRANCH=None TEST=util/spd_tools/bin/spd_gen spd/lp5/memory_parts.json lp5 Signed-off-by: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Change-Id: I9926a5859cf060e0bfa903f47d8a98c8d6115579 --- M spd/lp5/memory_parts.json M spd/lp5/set-0/parts_spd_manifest.generated.txt M spd/lp5/set-1/parts_spd_manifest.generated.txt 3 files changed, 28 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/68154/1 diff --git a/spd/lp5/memory_parts.json b/spd/lp5/memory_parts.json index 9f527c3..1850fce 100644 --- a/spd/lp5/memory_parts.json +++ b/spd/lp5/memory_parts.json @@ -153,6 +153,16 @@ "speedMbps": 7500, "lp5x": true } + }, + { + "name": "H9JCNNNFA5MLYR-N6E", + "attribs": { + "densityPerDieGb": 8, + "diesPerPackage": 8, + "bitWidthPerChannel": 16, + "ranksPerChannel": 2, + "speedMbps": 6400 + } } ] } diff --git a/spd/lp5/set-0/parts_spd_manifest.generated.txt b/spd/lp5/set-0/parts_spd_manifest.generated.txt index 8ddb733..16d706b 100644 --- a/spd/lp5/set-0/parts_spd_manifest.generated.txt +++ b/spd/lp5/set-0/parts_spd_manifest.generated.txt @@ -16,3 +16,4 @@ MT62F2G32D4DS-026 WT:B,spd-8.hex K3KL8L80CM-MGCT,spd-7.hex K3KL9L90CM-MGCT,spd-8.hex +H9JCNNNFA5MLYR-N6E,spd-9.hex diff --git a/spd/lp5/set-1/parts_spd_manifest.generated.txt b/spd/lp5/set-1/parts_spd_manifest.generated.txt index 8ddb733..16d706b 100644 --- a/spd/lp5/set-1/parts_spd_manifest.generated.txt +++ b/spd/lp5/set-1/parts_spd_manifest.generated.txt @@ -16,3 +16,4 @@ MT62F2G32D4DS-026 WT:B,spd-8.hex K3KL8L80CM-MGCT,spd-7.hex K3KL9L90CM-MGCT,spd-8.hex +H9JCNNNFA5MLYR-N6E,spd-9.hex -- To view, visit https://review.coreboot.org/c/coreboot/+/68154 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9926a5859cf060e0bfa903f47d8a98c8d6115579 Gerrit-Change-Number: 68154 Gerrit-PatchSet: 1 Gerrit-Owner: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-MessageType: newchange

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[M] Change in coreboot[master]: soc/mediatek/mt8195: replace SPDX identifiers to GPL-2.0-only OR MIT
by Elyes Haouas (Code Review) 06 Oct '22

06 Oct '22

Attention is currently required from: Chen-Tsung Hsieh, Martin L Roth, Rex-BC Chen, Macpaul Lin, Julius Werner, Kyösti Mälkki, Yu-Ping Wu. Elyes Haouas has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/66625 ) Change subject: soc/mediatek/mt8195: replace SPDX identifiers to GPL-2.0-only OR MIT ...................................................................... Patch Set 7: (1 comment) Patchset: PS7: I'm fine with relicensing -- To view, visit https://review.coreboot.org/c/coreboot/+/66625 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I79a585c2a611dbfd294c1c94f998d972118b5c52 Gerrit-Change-Number: 66625 Gerrit-PatchSet: 7 Gerrit-Owner: Macpaul Lin <macpaul.lin(a)mediatek.com> Gerrit-Reviewer: Chen-Tsung Hsieh <chentsung(a)chromium.org> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Chen-Tsung Hsieh <chentsung(a)chromium.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Macpaul Lin <macpaul.lin(a)mediatek.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Thu, 06 Oct 2022 04:51:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/qualcomm: Update the wait time for checking PCIe link up
by Veerabhadrarao Badiganti (Code Review) 06 Oct '22

06 Oct '22

Attention is currently required from: Shelley Chen, Tim Wawrzynczak, Julius Werner. Veerabhadrarao Badiganti has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67884 ) Change subject: soc/qualcomm: Update the wait time for checking PCIe link up ...................................................................... Patch Set 4: (1 comment) Patchset: PS4: > I did a firmware_ConsecutiveBoot test and it seemed to work ok, but I'll try to look into moving the […] To answer Tim's query, yes Qualcomm IP has a status register to confirm the link is established or not. So we really don't need to wait for 100ms. This change looks good to me. -- To view, visit https://review.coreboot.org/c/coreboot/+/67884 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic67e7207c1e9f589b34705dc24f5d1ea423e2d56 Gerrit-Change-Number: 67884 Gerrit-PatchSet: 4 Gerrit-Owner: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Sudheer Amrabadi <samrabad(a)codeaurora.org> Gerrit-CC: Veerabhadrarao Badiganti <vbadigan(a)qualcomm.corp-partner.google.com> Gerrit-CC: Venkat Thogaru <thogaru(a)qualcomm.corp-partner.google.com> Gerrit-CC: mturney mturney <mturney(a)codeaurora.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Thu, 06 Oct 2022 04:15:28 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Shelley Chen <shchen(a)google.com> Comment-In-Reply-To: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/nissa/var/xivu: Change TPM I2C freqeuncy to 1 MHz
by Ian Feng (Code Review) 06 Oct '22

06 Oct '22

Attention is currently required from: Kangheui Won, Tim Wawrzynczak, Reka Norman, Shou-Chieh Hsu. Ian Feng has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68071 ) Change subject: mb/google/nissa/var/xivu: Change TPM I2C freqeuncy to 1 MHz ...................................................................... Patch Set 2: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/68071 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I33f712c14978b95f3a4da82d6f1f5fbae1283b17 Gerrit-Change-Number: 68071 Gerrit-PatchSet: 2 Gerrit-Owner: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-CC: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-CC: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-CC: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-CC: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-CC: Van Chen <van_chen(a)compal.corp-partner.google.com> Gerrit-Attention: Kangheui Won <khwon(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Reka Norman <rekanorman(a)chromium.org> Gerrit-Attention: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Comment-Date: Thu, 06 Oct 2022 04:03:13 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: soc/mediatek/mt8195: replace SPDX identifiers to GPL-2.0-only OR MIT
by Yidi Lin (Code Review) 06 Oct '22

06 Oct '22

Attention is currently required from: Chen-Tsung Hsieh, Martin L Roth, Rex-BC Chen, Macpaul Lin, Julius Werner, Kyösti Mälkki, Yu-Ping Wu, Elyes Haouas. Yidi Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/66625 ) Change subject: soc/mediatek/mt8195: replace SPDX identifiers to GPL-2.0-only OR MIT ...................................................................... Patch Set 7: (1 comment) Patchset: PS6: > Dear @Kyösti, @Chen-Tsung, @Yidi, @Elyes, Please help to vote about the relicensing of these MT8195 […] I'm fine with relicensing. -- To view, visit https://review.coreboot.org/c/coreboot/+/66625 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I79a585c2a611dbfd294c1c94f998d972118b5c52 Gerrit-Change-Number: 66625 Gerrit-PatchSet: 7 Gerrit-Owner: Macpaul Lin <macpaul.lin(a)mediatek.com> Gerrit-Reviewer: Chen-Tsung Hsieh <chentsung(a)chromium.org> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Chen-Tsung Hsieh <chentsung(a)chromium.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Macpaul Lin <macpaul.lin(a)mediatek.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Comment-Date: Thu, 06 Oct 2022 03:16:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Chen-Tsung Hsieh <chentsung(a)chromium.org> Comment-In-Reply-To: Martin L Roth <gaumless(a)gmail.com> Comment-In-Reply-To: Macpaul Lin <macpaul.lin(a)mediatek.com> Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: soc/mediatek/mt8195: replace SPDX identifiers to GPL-2.0-only OR MIT
by Macpaul Lin (Code Review) 06 Oct '22

06 Oct '22

Attention is currently required from: Chen-Tsung Hsieh, Martin L Roth, Rex-BC Chen, Julius Werner, Kyösti Mälkki, Yidi Lin, Yu-Ping Wu, Elyes Haouas. Hello Hung-Te Lin, build bot (Jenkins), Chen-Tsung Hsieh, Martin L Roth, Rex-BC Chen, Julius Werner, Kyösti Mälkki, Yu-Ping Wu, Yidi Lin, Elyes Haouas, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/66625 to look at the new patch set (#7). Change subject: soc/mediatek/mt8195: replace SPDX identifiers to GPL-2.0-only OR MIT ...................................................................... soc/mediatek/mt8195: replace SPDX identifiers to GPL-2.0-only OR MIT This replaces 'SPDX-License-Identifier' tags in all the files under soc/mediatek/mt8195 for better code re-use in other open source software stack. These files were originally from MediaTek and follow coreboot's main license: "GPL-2.0-only". Now MediaTek replaces these files to "GPL-2.0-only OR MIT" license. Signed-off-by: Macpaul Lin <macpaul.lin(a)mediatek.com> Change-Id: I79a585c2a611dbfd294c1c94f998d972118b5c52 --- M src/soc/mediatek/mt8195/apusys.c M src/soc/mediatek/mt8195/apusys_devapc.c M src/soc/mediatek/mt8195/bootblock.c M src/soc/mediatek/mt8195/chip.h M src/soc/mediatek/mt8195/ddp.c M src/soc/mediatek/mt8195/devapc.c M src/soc/mediatek/mt8195/dp_intf.c M src/soc/mediatek/mt8195/dptx.c M src/soc/mediatek/mt8195/dptx_hal.c M src/soc/mediatek/mt8195/emi.c M src/soc/mediatek/mt8195/gpio.c M src/soc/mediatek/mt8195/hdmi.c M src/soc/mediatek/mt8195/i2c.c M src/soc/mediatek/mt8195/include/soc/addressmap.h M src/soc/mediatek/mt8195/include/soc/apusys.h M src/soc/mediatek/mt8195/include/soc/apusys_devapc.h M src/soc/mediatek/mt8195/include/soc/auxadc.h M src/soc/mediatek/mt8195/include/soc/ddp.h M src/soc/mediatek/mt8195/include/soc/devapc.h M src/soc/mediatek/mt8195/include/soc/dp_intf.h M src/soc/mediatek/mt8195/include/soc/dptx.h M src/soc/mediatek/mt8195/include/soc/dptx_hal.h M src/soc/mediatek/mt8195/include/soc/dptx_reg.h M src/soc/mediatek/mt8195/include/soc/dramc_param.h M src/soc/mediatek/mt8195/include/soc/dramc_soc.h M src/soc/mediatek/mt8195/include/soc/efuse.h M src/soc/mediatek/mt8195/include/soc/gpio.h M src/soc/mediatek/mt8195/include/soc/gpio_base.h M src/soc/mediatek/mt8195/include/soc/hdmi.h M src/soc/mediatek/mt8195/include/soc/i2c.h M src/soc/mediatek/mt8195/include/soc/infracfg.h M src/soc/mediatek/mt8195/include/soc/iocfg.h M src/soc/mediatek/mt8195/include/soc/mcucfg.h M src/soc/mediatek/mt8195/include/soc/memlayout.ld M src/soc/mediatek/mt8195/include/soc/mt6360.h M src/soc/mediatek/mt8195/include/soc/mt6691.h M src/soc/mediatek/mt8195/include/soc/pcie.h M src/soc/mediatek/mt8195/include/soc/pll.h M src/soc/mediatek/mt8195/include/soc/pmif.h M src/soc/mediatek/mt8195/include/soc/rtc.h M src/soc/mediatek/mt8195/include/soc/scp.h M src/soc/mediatek/mt8195/include/soc/soc_chip.h M src/soc/mediatek/mt8195/include/soc/spi.h M src/soc/mediatek/mt8195/include/soc/spm.h M src/soc/mediatek/mt8195/include/soc/symbols.h M src/soc/mediatek/mt8195/include/soc/timer.h M src/soc/mediatek/mt8195/include/soc/tracker.h M src/soc/mediatek/mt8195/include/soc/usb.h M src/soc/mediatek/mt8195/include/soc/wdt.h M src/soc/mediatek/mt8195/msdc.c M src/soc/mediatek/mt8195/mt6315.c M src/soc/mediatek/mt8195/mt6359p.c M src/soc/mediatek/mt8195/mt6360.c M src/soc/mediatek/mt8195/mt6691.c M src/soc/mediatek/mt8195/mtcmos.c M src/soc/mediatek/mt8195/pcie.c M src/soc/mediatek/mt8195/pll.c M src/soc/mediatek/mt8195/pmif_clk.c M src/soc/mediatek/mt8195/pmif_spi.c M src/soc/mediatek/mt8195/pmif_spmi.c M src/soc/mediatek/mt8195/scp.c M src/soc/mediatek/mt8195/soc.c M src/soc/mediatek/mt8195/spi.c M src/soc/mediatek/mt8195/spm.c M src/soc/mediatek/mt8195/usb.c M src/soc/mediatek/mt8195/wdt.c 66 files changed, 84 insertions(+), 66 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/66625/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/66625 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I79a585c2a611dbfd294c1c94f998d972118b5c52 Gerrit-Change-Number: 66625 Gerrit-PatchSet: 7 Gerrit-Owner: Macpaul Lin <macpaul.lin(a)mediatek.com> Gerrit-Reviewer: Chen-Tsung Hsieh <chentsung(a)chromium.org> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Chen-Tsung Hsieh <chentsung(a)chromium.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: soc/mediatek/mt8195: replace SPDX identifiers to GPL-2.0-only OR MIT
by Macpaul Lin (Code Review) 06 Oct '22

06 Oct '22

Attention is currently required from: Chen-Tsung Hsieh, Martin L Roth, Rex-BC Chen, Julius Werner, Kyösti Mälkki, Yidi Lin, Yu-Ping Wu, Elyes Haouas. Macpaul Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/66625 ) Change subject: soc/mediatek/mt8195: replace SPDX identifiers to GPL-2.0-only OR MIT ...................................................................... Patch Set 6: (1 comment) Patchset: PS6: > I'm fine with relicensing. Dear @Kyösti, @Chen-Tsung, @Yidi, @Elyes, Please help to vote about the relicensing of these MT8195 related files. I'll remove those affected files in the change list if someone has contributed but not agree the license change. Thanks :) -- To view, visit https://review.coreboot.org/c/coreboot/+/66625 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I79a585c2a611dbfd294c1c94f998d972118b5c52 Gerrit-Change-Number: 66625 Gerrit-PatchSet: 6 Gerrit-Owner: Macpaul Lin <macpaul.lin(a)mediatek.com> Gerrit-Reviewer: Chen-Tsung Hsieh <chentsung(a)chromium.org> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Chen-Tsung Hsieh <chentsung(a)chromium.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Comment-Date: Thu, 06 Oct 2022 02:52:14 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Chen-Tsung Hsieh <chentsung(a)chromium.org> Comment-In-Reply-To: Martin L Roth <gaumless(a)gmail.com> Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: comment

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coreboot-gerrit October 2022