coreboot-gerrit October 2022

coreboot-gerrit@coreboot.org

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[M] Change in coreboot[master]: mb/starlabs/starbook/tgl: Use chipset.cb aliases
by Nico Huber (Code Review) 06 Oct '22

06 Oct '22

Attention is currently required from: Sean Rhodes. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67027 ) Change subject: mb/starlabs/starbook/tgl: Use chipset.cb aliases ...................................................................... Patch Set 6: (2 comments) File src/mainboard/starlabs/starbook/variants/tgl/devicetree.cb: https://review.coreboot.org/c/coreboot/+/67027/comment/5b7a74c3_61216fa1 PS5, Line 88: device ref north_xhci on > Shouldn't this be the PCH one? Done https://review.coreboot.org/c/coreboot/+/67027/comment/0a40c5e6_3cd015cc PS5, Line 110: device ref north_xdci on end > Why turn it on? Done -- To view, visit https://review.coreboot.org/c/coreboot/+/67027 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie9655406c7afe7a22f131d35633a697c5bbde4e3 Gerrit-Change-Number: 67027 Gerrit-PatchSet: 6 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Ben McMillen <ben(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Comment-Date: Thu, 06 Oct 2022 12:52:36 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: comment

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[L] Change in coreboot[master]: [WIP] mb/prodrive/atlas: Populate smbios table with VPD from ECs EMI
by Christian Walter (Code Review) 06 Oct '22

06 Oct '22

Attention is currently required from: Lean Sheng Tan, David.Milosevic(a)9elements.com. Christian Walter has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68137 ) Change subject: [WIP] mb/prodrive/atlas: Populate smbios table with VPD from ECs EMI ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: Please use your real name in Gerrit. -- To view, visit https://review.coreboot.org/c/coreboot/+/68137 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I47bb4883c43ff344a9bda92c3106dd025533b391 Gerrit-Change-Number: 68137 Gerrit-PatchSet: 2 Gerrit-Owner: David.Milosevic(a)9elements.com Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: David.Milosevic(a)9elements.com Gerrit-Comment-Date: Thu, 06 Oct 2022 12:46:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[XL] Change in coreboot[master]: payloads/cbui: Add new payload CBUI
by build bot (Jenkins) (Code Review) 06 Oct '22

06 Oct '22

Attention is currently required from: Iman Bingi, Martin L Roth, Julius Werner, Patrick Rudolph. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/23586 ) Change subject: payloads/cbui: Add new payload CBUI ...................................................................... Patch Set 49: (32 comments) File payloads/cbui/NuklearUI/NuklearDatePicker.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159841): https://review.coreboot.org/c/coreboot/+/23586/comment/aed581c1_588857fd PS49, Line 36: case 6: /* fallthrough */ Prefer 'fallthrough;' over fallthrough comment Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159841): https://review.coreboot.org/c/coreboot/+/23586/comment/5d6bb8f5_cc327ae9 PS49, Line 37: case 9: /* fallthrough */ Prefer 'fallthrough;' over fallthrough comment File payloads/cbui/NuklearUI/NuklearRW.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159841): https://review.coreboot.org/c/coreboot/+/23586/comment/ce32e8d4_db064a1f PS49, Line 289: static const char *titles[] = { "Hex-View", "Header", "Index/Data" }; static const char * array should probably be static const char * const Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159841): https://review.coreboot.org/c/coreboot/+/23586/comment/fd21455d_9c074b68 PS49, Line 323: static const char *entries[] = { "NVRAM" }; static const char * array should probably be static const char * const File payloads/cbui/arch/x86/int32.h: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159841): https://review.coreboot.org/c/coreboot/+/23586/comment/c72c9676_42506769 PS49, Line 20: typedef struct __attribute__ ((packed)) { Prefer __packed over __attribute__((packed)) File payloads/cbui/arch/x86/int32.nasm: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159841): https://review.coreboot.org/c/coreboot/+/23586/comment/5a2db9ba_29b30262 PS49, Line 38: struc regs16_t 'struc' may be misspelled - perhaps 'struct'? File payloads/cbui/gfx/vbe.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159841): https://review.coreboot.org/c/coreboot/+/23586/comment/230d3835_0c0492f0 PS49, Line 24: static u8 low_mem[0x1000] __attribute__ ((section(".lowmem"))); Prefer __section(".lowmem") over __attribute__((section(".lowmem"))) File payloads/cbui/lang/de.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159841): https://review.coreboot.org/c/coreboot/+/23586/comment/ea3eeacb_f5cd2f05 PS49, Line 39: "Kein Framebuffer gefunden. CBUI funktioniert nicht" \ Avoid unnecessary line continuations Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159841): https://review.coreboot.org/c/coreboot/+/23586/comment/7c8c503f_c267a23e PS49, Line 44: "Der coreboot framebuffer hat keine physikalische " \ Avoid unnecessary line continuations Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159841): https://review.coreboot.org/c/coreboot/+/23586/comment/76eefc9a_66fab5aa PS49, Line 47: "Kein Platz auf dem Heap.\nBitte vergroBere den" \ Avoid unnecessary line continuations Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159841): https://review.coreboot.org/c/coreboot/+/23586/comment/bb345721_d871bf62 PS49, Line 50: "Konnte die nuklear Bibliothek nicht intitialisieren.\nBitte" \ Avoid unnecessary line continuations Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159841): https://review.coreboot.org/c/coreboot/+/23586/comment/5aecdb0e_2cb87f59 PS49, Line 52: "stelle sicher, das der Framebuffer entweder das RGBX8 oder " \ Avoid unnecessary line continuations Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159841): https://review.coreboot.org/c/coreboot/+/23586/comment/aad2f205_f5769b8f PS49, Line 65: "Fehler: Keine CMOS Eintrage gefunden. Bitte schalte die " \ Avoid unnecessary line continuations Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159841): https://review.coreboot.org/c/coreboot/+/23586/comment/1a1830db_043efce6 PS49, Line 86: "Fehler: Keine Zeitstempel gefunden. Bitte schalte die " \ Avoid unnecessary line continuations Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159841): https://review.coreboot.org/c/coreboot/+/23586/comment/c7b6d173_9cce5369 PS49, Line 89: "Fehler: Bootlog nicht gefunden. Bitte schalte die Kconfig " \ Avoid unnecessary line continuations File payloads/cbui/lang/en.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159841): https://review.coreboot.org/c/coreboot/+/23586/comment/d8375284_a2bb73f9 PS49, Line 38: "No framebuffer found. CBUI doesn't work in text mode.\n" \ Avoid unnecessary line continuations Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159841): https://review.coreboot.org/c/coreboot/+/23586/comment/761b2fd0_9e1712d1 PS49, Line 46: "Failed to init nuklear library.\nMake sure you have enough " \ Avoid unnecessary line continuations Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159841): https://review.coreboot.org/c/coreboot/+/23586/comment/51d52db6_85d73515 PS49, Line 60: "ERROR: No CMOS options found. Please make sure to enable " \ Avoid unnecessary line continuations Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159841): https://review.coreboot.org/c/coreboot/+/23586/comment/c7bc0fd5_db865d24 PS49, Line 81: "ERROR: No timestamps found. Please make sure to enable " \ Avoid unnecessary line continuations Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159841): https://review.coreboot.org/c/coreboot/+/23586/comment/979da98e_5153f5d6 PS49, Line 84: "ERROR: Bootlog not found. Please make sure to enable " \ Avoid unnecessary line continuations File payloads/cbui/modules/bootlog_module.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159841): https://review.coreboot.org/c/coreboot/+/23586/comment/bb0f63c6_b37b7e73 PS49, Line 28: } __attribute__ ((__packed__)); Prefer __packed over __attribute__((__packed__)) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159841): https://review.coreboot.org/c/coreboot/+/23586/comment/fa0a52df_74dd3f43 PS49, Line 82: } void function return statements are not generally useful File payloads/cbui/modules/cbfs_module.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159841): https://review.coreboot.org/c/coreboot/+/23586/comment/d28bb932_b48d9ebc PS49, Line 50: } __attribute__ ((packed)); Prefer __packed over __attribute__((packed)) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159841): https://review.coreboot.org/c/coreboot/+/23586/comment/e51566ee_b8379ffe PS49, Line 59: } __attribute__ ((packed)); Prefer __packed over __attribute__((packed)) File payloads/cbui/modules/cpuinfo_module.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159841): https://review.coreboot.org/c/coreboot/+/23586/comment/eeb720f5_29880817 PS49, Line 35: static const char *intel_cap_edx_flags[] = { static const char * array should probably be static const char * const Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159841): https://review.coreboot.org/c/coreboot/+/23586/comment/084cc850_7daf6688 PS49, Line 43: static const char *amd_cap_edx_flags[] = { static const char * array should probably be static const char * const Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159841): https://review.coreboot.org/c/coreboot/+/23586/comment/9bccb53d_0f4cb30b PS49, Line 51: static const char *intel_cap_ecx_flags[] = { static const char * array should probably be static const char * const Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159841): https://review.coreboot.org/c/coreboot/+/23586/comment/7c0a97be_4f1a6822 PS49, Line 59: static const char *amd_cap_ecx_flags[] = { static const char * array should probably be static const char * const Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159841): https://review.coreboot.org/c/coreboot/+/23586/comment/74da22ee_b8570161 PS49, Line 67: static const char *intel_cap_extended_edx_flags[] = { static const char * array should probably be static const char * const Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159841): https://review.coreboot.org/c/coreboot/+/23586/comment/dd72cdfe_8747d9de PS49, Line 75: static const char *intel_cap_extended_ecx_flags[] = { static const char * array should probably be static const char * const Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159841): https://review.coreboot.org/c/coreboot/+/23586/comment/8a69ec0c_90e76faa PS49, Line 83: static const char *amd_cap_extended_edx_flags[] = { static const char * array should probably be static const char * const Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159841): https://review.coreboot.org/c/coreboot/+/23586/comment/9b50c73d_ef97aab9 PS49, Line 92: static const char *amd_cap_extended_ecx_flags[] = { static const char * array should probably be static const char * const -- To view, visit https://review.coreboot.org/c/coreboot/+/23586 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib9a1a07c1065880aa675380625021750d5cab7d1 Gerrit-Change-Number: 23586 Gerrit-PatchSet: 49 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Iman Bingi <imanbingy(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Iman Bingi <imanbingy(a)gmail.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Thu, 06 Oct 2022 12:43:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: [HACK]soc/apl: Get 64 bit mode working
by Arthur Heymans (Code Review) 06 Oct '22

06 Oct '22

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/68170 ) Change subject: [HACK]soc/apl: Get 64 bit mode working ...................................................................... [HACK]soc/apl: Get 64 bit mode working This also needs UPD headers fixed (simply 's/VOID */UINT32/') TESTED on up/squared. Change-Id: Ib827df1213fab8c85c38f3029c860dc4d36165fd Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/cpu/x86/mp_init.c M src/soc/intel/apollolake/Kconfig M src/soc/intel/apollolake/Makefile.inc M src/soc/intel/apollolake/romstage.c M src/soc/intel/common/block/xhci/xhci.c 5 files changed, 21 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/68170/1 diff --git a/src/cpu/x86/mp_init.c b/src/cpu/x86/mp_init.c index df74d24..16654bc 100644 --- a/src/cpu/x86/mp_init.c +++ b/src/cpu/x86/mp_init.c @@ -496,7 +496,7 @@ * resources such as UART, so scale the time out up by increments of * 100ms if needed. */ - const int timeout_us = MAX(1000000, 100000 * mp_params->num_cpus); + const int timeout_us = 10000000; const int step_us = 100; int num_aps = mp_params->num_cpus - 1; struct stopwatch sw; diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig index b2c2246..f849087 100644 --- a/src/soc/intel/apollolake/Kconfig +++ b/src/soc/intel/apollolake/Kconfig @@ -25,6 +25,7 @@ select ACPI_INTEL_HARDWARE_SLEEP_VALUES select ACPI_NO_PCAT_8259 select ARCH_X86 + select HAVE_EXP_X86_64_SUPPORT select BOOT_DEVICE_SUPPORTS_WRITES # CPU specific options select CPU_INTEL_COMMON diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc index 8f36d4b..0df2cd7 100644 --- a/src/soc/intel/apollolake/Makefile.inc +++ b/src/soc/intel/apollolake/Makefile.inc @@ -203,4 +203,6 @@ cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-5c-*) endif +CBFSTOOL_ADD_CMD_OPTIONS+= --mmap 0x1000:$(call int-subtract, 0x100000000 0xefe000):0xefe000 + endif # if CONFIG_SOC_INTEL_APOLLOLAKE diff --git a/src/soc/intel/apollolake/romstage.c b/src/soc/intel/apollolake/romstage.c index 757bad3..4d7f893 100644 --- a/src/soc/intel/apollolake/romstage.c +++ b/src/soc/intel/apollolake/romstage.c @@ -27,6 +27,7 @@ #include <soc/romstage.h> #include <soc/systemagent.h> #include <spi_flash.h> +#include <stdint.h> #include <timer.h> #include "chip.h" @@ -317,7 +318,7 @@ */ mupd->FspmConfig.VariableNvsBufferPtr = - mrc_cache_current_mmap_leak(MRC_VARIABLE_DATA, version, + (uint32_t)(uintptr_t)mrc_cache_current_mmap_leak(MRC_VARIABLE_DATA, version, NULL); assert(CONFIG(BOOT_DEVICE_MEMORY_MAPPED)); diff --git a/src/soc/intel/common/block/xhci/xhci.c b/src/soc/intel/common/block/xhci/xhci.c index 4a40834..07dc7d3 100644 --- a/src/soc/intel/common/block/xhci/xhci.c +++ b/src/soc/intel/common/block/xhci/xhci.c @@ -21,7 +21,7 @@ static uint8_t *xhci_mem_base(void) { - uint32_t mem_base = pci_read_config32(PCH_DEV_XHCI, PCI_BASE_ADDRESS_0); + uintptr_t mem_base = pci_read_config32(PCH_DEV_XHCI, PCI_BASE_ADDRESS_0); /* Check if the controller is disabled or not present */ if (mem_base == 0 || mem_base == 0xffffffff) -- To view, visit https://review.coreboot.org/c/coreboot/+/68170 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib827df1213fab8c85c38f3029c860dc4d36165fd Gerrit-Change-Number: 68170 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

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[XL] Change in coreboot[master]: payloads/cbui: Add new payload CBUI
by Iman Bingi (Code Review) 06 Oct '22

06 Oct '22

Attention is currently required from: Iman Bingi, Martin L Roth, Julius Werner, Patrick Rudolph. Iman Bingi has uploaded a new patch set (#49) to the change originally created by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/23586 ) Change subject: payloads/cbui: Add new payload CBUI ...................................................................... payloads/cbui: Add new payload CBUI Depends on libpayload and nuklear. Features: * Graphical menus with scrolling. * Text rendering engine (atm only bitmap font) * Support for keyboard and mouse * Support for USB and PS/2 devices * Ported coreinfo and nvramcui * Allows to modify NVRAM and RTC * Works as ELF payload * Works as Seabios secondary payload * Basic support for multiple languages * Hacky support for BIOS calls (depends on NASM) * Runs in qemu and on real hardware * Use linker script to allocate low memory Shortcomings: * Doesn't work in VGA text mode * Untested on UEFI * int32 relocates itself to low memory Licenses: * GPLv2 (CBUI + libpayload) * BSD (libpayload) * MIT (nuklear) TODO: * Test on as much platforms as possible * Link int32 into low memory This is Patrick Rudolph's original patch, updated by Ben Adu-Boahen to: * Add Read/Write module * This module allows read/write to any hardware component that is readable/writeable Note: This is work in progress Change-Id: Ib9a1a07c1065880aa675380625021750d5cab7d1 Signed-off-by: Patrick Rudolph <siro(a)das-labor.org> Signed-off-by: Ben Adu-Boahen <imanbingy(a)gmail.com> --- M payloads/Kconfig M payloads/Makefile.inc A payloads/cbui/.gitignore A payloads/cbui/Kconfig A payloads/cbui/Makefile A payloads/cbui/NuklearUI/NuklearCombo.c A payloads/cbui/NuklearUI/NuklearCombo.h A payloads/cbui/NuklearUI/NuklearCommon.h A payloads/cbui/NuklearUI/NuklearDataGrid.c A payloads/cbui/NuklearUI/NuklearDataGrid.h A payloads/cbui/NuklearUI/NuklearDatePicker.c A payloads/cbui/NuklearUI/NuklearDatePicker.h A payloads/cbui/NuklearUI/NuklearFieldFile.c A payloads/cbui/NuklearUI/NuklearFieldFile.h A payloads/cbui/NuklearUI/NuklearFieldHex.c A payloads/cbui/NuklearUI/NuklearFieldHex.h A payloads/cbui/NuklearUI/NuklearFileChooser.c A payloads/cbui/NuklearUI/NuklearFileChooser.h A payloads/cbui/NuklearUI/NuklearGroup.c A payloads/cbui/NuklearUI/NuklearGroup.h A payloads/cbui/NuklearUI/NuklearHex.c A payloads/cbui/NuklearUI/NuklearHex.h A payloads/cbui/NuklearUI/NuklearIntegerRange.c A payloads/cbui/NuklearUI/NuklearIntegerRange.h A payloads/cbui/NuklearUI/NuklearLabel.c A payloads/cbui/NuklearUI/NuklearLabel.h A payloads/cbui/NuklearUI/NuklearObject.c A payloads/cbui/NuklearUI/NuklearObject.h A payloads/cbui/NuklearUI/NuklearPciHeader.c A payloads/cbui/NuklearUI/NuklearPciHeader.h A payloads/cbui/NuklearUI/NuklearRW.c A payloads/cbui/NuklearUI/NuklearRW.h A payloads/cbui/NuklearUI/NuklearRoot.c A payloads/cbui/NuklearUI/NuklearStyle.c A payloads/cbui/NuklearUI/NuklearStyle.h A payloads/cbui/NuklearUI/NuklearTabView.c A payloads/cbui/NuklearUI/NuklearTextView.c A payloads/cbui/NuklearUI/NuklearTextView.h A payloads/cbui/NuklearUI/NuklearTextfield.c A payloads/cbui/NuklearUI/NuklearTextfield.h A payloads/cbui/NuklearUI/NuklearTimePicker.c A payloads/cbui/NuklearUI/NuklearTimePicker.h A payloads/cbui/NuklearUI/NuklearUI.h A payloads/cbui/NuklearUI/NuklearVector.c A payloads/cbui/NuklearUI/NuklearVector.h A payloads/cbui/arch/x86/cpuid.c A payloads/cbui/arch/x86/cpuid.h A payloads/cbui/arch/x86/int32.h A payloads/cbui/arch/x86/int32.ld A payloads/cbui/arch/x86/int32.nasm A payloads/cbui/arch/x86/memcpy.c A payloads/cbui/arch/x86/memcpy.h A payloads/cbui/arch/x86/vga.c A payloads/cbui/arch/x86/vga.h A payloads/cbui/cbui.c A payloads/cbui/cbui.h A payloads/cbui/fsys/usbstorage.c A payloads/cbui/fsys/usbstorage.h A payloads/cbui/gfx/coreboot.c A payloads/cbui/gfx/coreboot.h A payloads/cbui/gfx/gfx.c A payloads/cbui/gfx/gfx.h A payloads/cbui/gfx/splash.c A payloads/cbui/gfx/splash.h A payloads/cbui/gfx/vbe.c A payloads/cbui/gfx/vbe.h A payloads/cbui/lang/de.c A payloads/cbui/lang/en.c A payloads/cbui/lang/lang.c A payloads/cbui/lang/lang.h A payloads/cbui/logo/cbui.png A payloads/cbui/lp.config A payloads/cbui/modules/bootlog_module.c A payloads/cbui/modules/cbfs_module.c A payloads/cbui/modules/cmos_module.c A payloads/cbui/modules/coreboot_module.c A payloads/cbui/modules/cpuinfo_module.c A payloads/cbui/modules/license_module.c A payloads/cbui/modules/modules.c A payloads/cbui/modules/modules.h A payloads/cbui/modules/nvram_module.c A payloads/cbui/modules/pci_module.c A payloads/cbui/modules/reboot_module.c A payloads/cbui/modules/rtc_module.c A payloads/cbui/modules/rw_module.c A payloads/cbui/modules/timestamps_module.c A payloads/cbui/modules/usb_module.c A payloads/libpayload/configs/defconfig-cbui 88 files changed, 12,395 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/23586/49 -- To view, visit https://review.coreboot.org/c/coreboot/+/23586 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib9a1a07c1065880aa675380625021750d5cab7d1 Gerrit-Change-Number: 23586 Gerrit-PatchSet: 49 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Iman Bingi <imanbingy(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Iman Bingi <imanbingy(a)gmail.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: mb/starlabs/starbook/tgl: Use chipset.cb aliases
by Nico Huber (Code Review) 06 Oct '22

06 Oct '22

Attention is currently required from: Sean Rhodes. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67027 ) Change subject: mb/starlabs/starbook/tgl: Use chipset.cb aliases ...................................................................... Patch Set 5: (3 comments) Patchset: PS5: Shouldn't this keep things the same? You could compare the `build/mainboard/*/*/static.c`. File src/mainboard/starlabs/starbook/variants/tgl/devicetree.cb: https://review.coreboot.org/c/coreboot/+/67027/comment/2d994f38_48b2d1ea PS5, Line 88: device ref north_xhci on Shouldn't this be the PCH one? https://review.coreboot.org/c/coreboot/+/67027/comment/4c580ebc_417025ec PS5, Line 110: device ref north_xdci on end Why turn it on? -- To view, visit https://review.coreboot.org/c/coreboot/+/67027 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie9655406c7afe7a22f131d35633a697c5bbde4e3 Gerrit-Change-Number: 67027 Gerrit-PatchSet: 5 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Ben McMillen <ben(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Comment-Date: Thu, 06 Oct 2022 12:38:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[L] Change in coreboot[master]: [WIP] mb/prodrive/atlas: Populate smbios table with VPD from ECs EMI
by build bot (Jenkins) (Code Review) 06 Oct '22

06 Oct '22

Attention is currently required from: Christian Walter, Lean Sheng Tan, David.Milosevic(a)9elements.com. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68137 ) Change subject: [WIP] mb/prodrive/atlas: Populate smbios table with VPD from ECs EMI ...................................................................... Patch Set 2: (44 comments) File src/mainboard/prodrive/atlas/emi.h: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159840): https://review.coreboot.org/c/coreboot/+/68137/comment/1301fcca_1a08f0e3 PS2, Line 75: const EMI_ACCESS access, code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159840): https://review.coreboot.org/c/coreboot/+/68137/comment/f819c713_4a54239a PS2, Line 75: const EMI_ACCESS access, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159840): https://review.coreboot.org/c/coreboot/+/68137/comment/dd23df36_7bb8ac06 PS2, Line 76: const u16 addr, code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159840): https://review.coreboot.org/c/coreboot/+/68137/comment/52120e97_7231e651 PS2, Line 76: const u16 addr, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159840): https://review.coreboot.org/c/coreboot/+/68137/comment/554ce961_a5bc0885 PS2, Line 77: u8 *buff); code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159840): https://review.coreboot.org/c/coreboot/+/68137/comment/47b265db_c65c00d9 PS2, Line 77: u8 *buff); please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159840): https://review.coreboot.org/c/coreboot/+/68137/comment/1a9e8d1e_371c9c99 PS2, Line 89: const EMI_ACCESS access, code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159840): https://review.coreboot.org/c/coreboot/+/68137/comment/8aaa9801_7433cf0c PS2, Line 89: const EMI_ACCESS access, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159840): https://review.coreboot.org/c/coreboot/+/68137/comment/8c1317f0_339db71e PS2, Line 90: const u16 addr, code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159840): https://review.coreboot.org/c/coreboot/+/68137/comment/d06bc0e8_541d4a87 PS2, Line 90: const u16 addr, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159840): https://review.coreboot.org/c/coreboot/+/68137/comment/99de8802_5f82d2dc PS2, Line 91: u8 *bytes); code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159840): https://review.coreboot.org/c/coreboot/+/68137/comment/c107cc6d_45fac682 PS2, Line 91: u8 *bytes); please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159840): https://review.coreboot.org/c/coreboot/+/68137/comment/eb07dc64_3666efb5 PS2, Line 102: const u16 addr, code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159840): https://review.coreboot.org/c/coreboot/+/68137/comment/592a3e93_23dd2fca PS2, Line 102: const u16 addr, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159840): https://review.coreboot.org/c/coreboot/+/68137/comment/153ad8b5_fe831341 PS2, Line 103: const u16 n, code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159840): https://review.coreboot.org/c/coreboot/+/68137/comment/fd2ce52f_51326931 PS2, Line 103: const u16 n, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159840): https://review.coreboot.org/c/coreboot/+/68137/comment/5cacd0d4_8c932e29 PS2, Line 104: u8 *buff); code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159840): https://review.coreboot.org/c/coreboot/+/68137/comment/d55f6fc7_77265139 PS2, Line 104: u8 *buff); please, no spaces at the start of a line File src/mainboard/prodrive/atlas/emi.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159840): https://review.coreboot.org/c/coreboot/+/68137/comment/0489033a_e55ef781 PS2, Line 42: const EMI_ACCESS access, code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159840): https://review.coreboot.org/c/coreboot/+/68137/comment/d788f4ea_b3b591f6 PS2, Line 42: const EMI_ACCESS access, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159840): https://review.coreboot.org/c/coreboot/+/68137/comment/f625b213_3c003ebb PS2, Line 43: const u16 addr, code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159840): https://review.coreboot.org/c/coreboot/+/68137/comment/f62fba75_7f04704e PS2, Line 43: const u16 addr, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159840): https://review.coreboot.org/c/coreboot/+/68137/comment/7b09b88a_a6d21993 PS2, Line 44: u8 *buff) code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159840): https://review.coreboot.org/c/coreboot/+/68137/comment/fea303c3_f7207b79 PS2, Line 44: u8 *buff) please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159840): https://review.coreboot.org/c/coreboot/+/68137/comment/14c0702c_382e7144 PS2, Line 51: switch (access) { switch and case should be at the same indent Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159840): https://review.coreboot.org/c/coreboot/+/68137/comment/5f78492e_5cd1d21c PS2, Line 80: const EMI_ACCESS access, code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159840): https://review.coreboot.org/c/coreboot/+/68137/comment/9c3093b6_4da31e07 PS2, Line 80: const EMI_ACCESS access, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159840): https://review.coreboot.org/c/coreboot/+/68137/comment/29e2fdd0_a377c55c PS2, Line 81: const u16 addr, code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159840): https://review.coreboot.org/c/coreboot/+/68137/comment/55f73071_e62d2b86 PS2, Line 81: const u16 addr, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159840): https://review.coreboot.org/c/coreboot/+/68137/comment/c8165fff_768505b4 PS2, Line 82: u8 *bytes) code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159840): https://review.coreboot.org/c/coreboot/+/68137/comment/ec5e31dc_f09a8f36 PS2, Line 82: u8 *bytes) please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159840): https://review.coreboot.org/c/coreboot/+/68137/comment/7a316a4c_b91a436d PS2, Line 89: switch(access) { switch and case should be at the same indent Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159840): https://review.coreboot.org/c/coreboot/+/68137/comment/c6acd78d_3f54f85f PS2, Line 89: switch(access) { space required before the open parenthesis '(' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159840): https://review.coreboot.org/c/coreboot/+/68137/comment/d19f5fb0_5bbbeeb6 PS2, Line 118: const u16 addr, code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159840): https://review.coreboot.org/c/coreboot/+/68137/comment/53a4fc3b_7b9f7937 PS2, Line 118: const u16 addr, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159840): https://review.coreboot.org/c/coreboot/+/68137/comment/06f156c2_2c3c2b16 PS2, Line 119: const u16 n, code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159840): https://review.coreboot.org/c/coreboot/+/68137/comment/9c71008a_5b632110 PS2, Line 119: const u16 n, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159840): https://review.coreboot.org/c/coreboot/+/68137/comment/1aefb117_3f40daf7 PS2, Line 120: u8 *buff) code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159840): https://review.coreboot.org/c/coreboot/+/68137/comment/d9e1075f_fd34b0b0 PS2, Line 120: u8 *buff) please, no spaces at the start of a line File src/mainboard/prodrive/atlas/mainboard.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159840): https://review.coreboot.org/c/coreboot/+/68137/comment/c7c01c36_bf999157 PS2, Line 14: static const char* get_smbios_part_number(void); "foo* bar" should be "foo *bar" Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159840): https://review.coreboot.org/c/coreboot/+/68137/comment/04e3cedf_fcb66dff PS2, Line 41: static const char* get_smbios_part_number(void) "foo* bar" should be "foo *bar" File src/mainboard/prodrive/atlas/smbios.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159840): https://review.coreboot.org/c/coreboot/+/68137/comment/5cfff868_1a1a98ab PS2, Line 8: const char* smbios_mainboard_serial_number(void) "foo* bar" should be "foo *bar" File src/mainboard/prodrive/atlas/vpd.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159840): https://review.coreboot.org/c/coreboot/+/68137/comment/493f724b_b8227b67 PS2, Line 34: switch(vpd) { switch and case should be at the same indent Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159840): https://review.coreboot.org/c/coreboot/+/68137/comment/2ebb6233_fdb967e8 PS2, Line 34: switch(vpd) { space required before the open parenthesis '(' -- To view, visit https://review.coreboot.org/c/coreboot/+/68137 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I47bb4883c43ff344a9bda92c3106dd025533b391 Gerrit-Change-Number: 68137 Gerrit-PatchSet: 2 Gerrit-Owner: David.Milosevic(a)9elements.com Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: David.Milosevic(a)9elements.com Gerrit-Comment-Date: Thu, 06 Oct 2022 12:37:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[L] Change in coreboot[master]: [WIP] mb/prodrive/atlas: Populate smbios table with VPD from ECs EMI
by Name of user not set (Code Review) 06 Oct '22

06 Oct '22

Attention is currently required from: Christian Walter, Lean Sheng Tan, David.Milosevic(a)9elements.com. Hello build bot (Jenkins), Christian Walter, Angel Pons, Lean Sheng Tan, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/68137 to look at the new patch set (#2). Change subject: [WIP] mb/prodrive/atlas: Populate smbios table with VPD from ECs EMI ...................................................................... [WIP] mb/prodrive/atlas: Populate smbios table with VPD from ECs EMI The embedded controller stores serial-number and part-number within an EEPROM which is unreachable to the Host CPU. Therefore, on the EC side, we set up a shared memory region with the help of EMI and copy the VPDs to it. On the coreboot side, we can read those back and populate the SMBios table type 1 with the serial-number and type 11 with the part-number. emi.*: small interface to access the EMI regions vpd.*: uses the emi interface in order to read the VPDs smbios.c: populates smbios type 1 with the serial-number by using vpd.h mainboard.c: uses vpd.h to add a string to smbios type 11 ld_config.*: offers functionality to configure logical devices devicetree.cb: enables address range 0xc00-0xcff for the EMI runtime registers Makefile.inc: adds emi.c, vpd.c, smbios.c, ld_config.c to the ramstage compilation TODO: ld_config.* is redundant. We can replace this with pnp_device.h or pnp_ops.h Signed-off-by: Milo-D <David.Milosevic(a)9elements.com> Change-Id: I47bb4883c43ff344a9bda92c3106dd025533b391 --- M src/mainboard/prodrive/atlas/Makefile.inc M src/mainboard/prodrive/atlas/devicetree.cb A src/mainboard/prodrive/atlas/emi.c A src/mainboard/prodrive/atlas/emi.h A src/mainboard/prodrive/atlas/ld_config.c A src/mainboard/prodrive/atlas/ld_config.h M src/mainboard/prodrive/atlas/mainboard.c A src/mainboard/prodrive/atlas/smbios.c A src/mainboard/prodrive/atlas/vpd.c A src/mainboard/prodrive/atlas/vpd.h 10 files changed, 528 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/68137/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/68137 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I47bb4883c43ff344a9bda92c3106dd025533b391 Gerrit-Change-Number: 68137 Gerrit-PatchSet: 2 Gerrit-Owner: David.Milosevic(a)9elements.com Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: David.Milosevic(a)9elements.com Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: mb/starlabs/starbook/tgl: Use chipset.cb aliases
by Angel Pons (Code Review) 06 Oct '22

06 Oct '22

Attention is currently required from: Sean Rhodes. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67027 ) Change subject: mb/starlabs/starbook/tgl: Use chipset.cb aliases ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/67027 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie9655406c7afe7a22f131d35633a697c5bbde4e3 Gerrit-Change-Number: 67027 Gerrit-PatchSet: 5 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Ben McMillen <ben(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Comment-Date: Thu, 06 Oct 2022 12:36:43 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: mb/starlabs/starbook/kbl: Use chipset.cb aliases
by Angel Pons (Code Review) 06 Oct '22

06 Oct '22

Attention is currently required from: Sean Rhodes. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67421 ) Change subject: mb/starlabs/starbook/kbl: Use chipset.cb aliases ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/67421 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2da15db3d7fba4396c74800e531476c108cafe17 Gerrit-Change-Number: 67421 Gerrit-PatchSet: 2 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Comment-Date: Thu, 06 Oct 2022 12:36:21 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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