Martin Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68040 )
Change subject: cpu/intel/car/romstage.c: Clean up includes and add <types.h>
......................................................................
cpu/intel/car/romstage.c: Clean up includes and add <types.h>
Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr>
Change-Id: I84639389ac1066468b82bb13d684e5423b909fcb
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68040
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Martin L Roth <gaumless(a)gmail.com>
---
M src/cpu/intel/car/romstage.c
1 file changed, 16 insertions(+), 3 deletions(-)
Approvals:
build bot (Jenkins): Verified
Martin L Roth: Looks good to me, approved
diff --git a/src/cpu/intel/car/romstage.c b/src/cpu/intel/car/romstage.c
index 7a7d077..4c68ded 100644
--- a/src/cpu/intel/car/romstage.c
+++ b/src/cpu/intel/car/romstage.c
@@ -1,14 +1,14 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-#include <arch/cpu.h>
#include <arch/romstage.h>
-#include <console/console.h>
-#include <cpu/x86/smm.h>
#include <arch/symbols.h>
#include <commonlib/helpers.h>
+#include <console/console.h>
+#include <cpu/x86/smm.h>
#include <program_loading.h>
#include <romstage_common.h>
#include <security/vboot/vboot_common.h>
+#include <types.h>
/* If we do not have a constrained _car_stack region size, use the
following as a guideline for acceptable stack usage. */
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I84639389ac1066468b82bb13d684e5423b909fcb
Gerrit-Change-Number: 68040
Gerrit-PatchSet: 2
Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr>
Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com>
Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-MessageType: merged
Martin Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68036 )
Change subject: console/die.c: Add <stdarg.h>
......................................................................
console/die.c: Add <stdarg.h>
Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr>
Change-Id: I2ee8ef017d8a3409cbf47f1ed252a512dead224e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68036
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Martin L Roth <gaumless(a)gmail.com>
---
M src/console/die.c
1 file changed, 14 insertions(+), 0 deletions(-)
Approvals:
build bot (Jenkins): Verified
Martin L Roth: Looks good to me, approved
diff --git a/src/console/die.c b/src/console/die.c
index 3fc88a3..d9e1dee 100644
--- a/src/console/die.c
+++ b/src/console/die.c
@@ -2,6 +2,7 @@
#include <console/console.h>
#include <halt.h>
+#include <stdarg.h>
/*
* The method should be overwritten in mainboard directory to signal that a
--
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Gerrit-Change-Id: I2ee8ef017d8a3409cbf47f1ed252a512dead224e
Gerrit-Change-Number: 68036
Gerrit-PatchSet: 2
Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr>
Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com>
Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com>
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Gerrit-MessageType: merged
Attention is currently required from: Patrick Rudolph, Christian Walter.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/66616 )
Change subject: mb/prodrive/hermes: Prevent SGPIO cross-powering 5V rail
......................................................................
Patch Set 5:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/66616/comment/d03095e6_3427dad4
PS2, Line 9: TODO: Write a commit message. This was tested and seems to work.
> I am too tired to write a nice commit message today, I'll do it when I have time and/or get inspired […]
Done
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Gerrit-Change-Id: Ic872903d5fcdd1c17e02b4c06d5ba29889fbc27d
Gerrit-Change-Number: 66616
Gerrit-PatchSet: 5
Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com>
Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com>
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Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-MessageType: comment
Attention is currently required from: Patrick Rudolph, Christian Walter.
Hello build bot (Jenkins), Patrick Rudolph, Christian Walter,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/66616
to look at the new patch set (#5).
Change subject: mb/prodrive/hermes: Prevent SGPIO cross-powering 5V rail
......................................................................
mb/prodrive/hermes: Prevent SGPIO cross-powering 5V rail
The PCH's SGPIO pads are connected to a buffer chip that is powered from
the always-on +3V3_AUX rail. For some cursed reason, when the SGPIO pads
stay configured as SGPIO when a Poseidon system shuts down, voltage from
the +3V3_AUX-powered buffer chip will leak into the +5V rail through the
SATA backplane. Just pulling the SGPIO pads low before the system powers
off stops the +5V rail from being cross-powered.
This issue has only been observed in S5, but it's very likely other
sleep states are affected as well. Thus, always pull the SGPIO pins
low before entering ACPI S3 or deeper because the power supply will
turn off in these states as well.
TEST=Obtain a Poseidon system, verify that the +5V rail is cross-powered
after going to S5. We measured 0.17V on our system, but voltages as
high as 0.6V were measured on other systems. Verify that unplugging
the SGPIO cable going to the SATA backplane results in the +5V rail
voltage dropping to 0V, which indicates that the voltage leakage is
exclusively coming from the SGPIO and SATA backplane. Finally, make
sure that the +5V rail voltage drops to 0V after going into ACPI S5
with this patch applied and the SGPIO cable connected.
Change-Id: Ic872903d5fcdd1c17e02b4c06d5ba29889fbc27d
Signed-off-by: Angel Pons <th3fanbus(a)gmail.com>
---
A src/mainboard/prodrive/hermes/smihandler.c
1 file changed, 55 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/66616/5
--
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Gerrit-Change-Number: 66616
Gerrit-PatchSet: 5
Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com>
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Gerrit-MessageType: newpatchset
Martin Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68033 )
Change subject: arch/x86/mmap_boot.c: Clean up includes
......................................................................
arch/x86/mmap_boot.c: Clean up includes
Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr>
Change-Id: I85e60c189c1ec1da5cf0e5b864447ef6f7b3f548
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68033
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Martin L Roth <gaumless(a)gmail.com>
---
M src/arch/x86/mmap_boot.c
1 file changed, 14 insertions(+), 1 deletion(-)
Approvals:
build bot (Jenkins): Verified
Martin L Roth: Looks good to me, approved
diff --git a/src/arch/x86/mmap_boot.c b/src/arch/x86/mmap_boot.c
index f0ccc86..0e9812f 100644
--- a/src/arch/x86/mmap_boot.c
+++ b/src/arch/x86/mmap_boot.c
@@ -1,8 +1,8 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <boot_device.h>
-#include <endian.h>
#include <spi_flash.h>
+#include <stdint.h>
/* The ROM is memory mapped just below 4GiB. Form a pointer for the base. */
#define rom_base ((void *)(uintptr_t)(0x100000000ULL-CONFIG_ROM_SIZE))
--
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Gerrit-Change-Id: I85e60c189c1ec1da5cf0e5b864447ef6f7b3f548
Gerrit-Change-Number: 68033
Gerrit-PatchSet: 4
Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr>
Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com>
Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-MessageType: merged