coreboot-gerrit October 2022

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[S] Change in coreboot[master]: mb/google/skyrim: Fix SMMSTORE size, alignment
by Martin Roth (Code Review) 06 Oct '22

06 Oct '22

Martin Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68124 ) Change subject: mb/google/skyrim: Fix SMMSTORE size, alignment ...................................................................... mb/google/skyrim: Fix SMMSTORE size, alignment SMMSTOREv2 requires 64k min size, 64k alignment. TEST=build skyrim with SMMSTOREv2 enabled Change-Id: I3501b6036df9ee1049a92e26a7b72e53b4604f60 Signed-off-by: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68124 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/mainboard/google/skyrim/chromeos.fmd 1 file changed, 18 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Arthur Heymans: Looks good to me, approved diff --git a/src/mainboard/google/skyrim/chromeos.fmd b/src/mainboard/google/skyrim/chromeos.fmd index 670ac16..d9a4f8f 100644 --- a/src/mainboard/google/skyrim/chromeos.fmd +++ b/src/mainboard/google/skyrim/chromeos.fmd @@ -20,7 +20,7 @@ } RW_VPD(PRESERVE) 8K RW_NVRAM(PRESERVE) 20K - SMMSTORE(PRESERVE) 4K + SMMSTORE(PRESERVE)@0x630000 64K RW_LEGACY(CBFS) WP_RO@8M 8M { RO_VPD(PRESERVE) 16K -- To view, visit https://review.coreboot.org/c/coreboot/+/68124 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3501b6036df9ee1049a92e26a7b72e53b4604f60 Gerrit-Change-Number: 68124 Gerrit-PatchSet: 2 Gerrit-Owner: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: mb/google/guybrush: Fix SMMSTORE size, alignment
by Martin Roth (Code Review) 06 Oct '22

06 Oct '22

Martin Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68123 ) Change subject: mb/google/guybrush: Fix SMMSTORE size, alignment ...................................................................... mb/google/guybrush: Fix SMMSTORE size, alignment SMMSTOREv2 requires 64k min size, 64k alignment. TEST=build guybrush with SMMSTOREv2 enabled Change-Id: I78cb873a5634c659067367260cc7063fbd60d77a Signed-off-by: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68123 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/mainboard/google/guybrush/chromeos.fmd 1 file changed, 18 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Arthur Heymans: Looks good to me, approved diff --git a/src/mainboard/google/guybrush/chromeos.fmd b/src/mainboard/google/guybrush/chromeos.fmd index 8b5b11a..225fe2a 100644 --- a/src/mainboard/google/guybrush/chromeos.fmd +++ b/src/mainboard/google/guybrush/chromeos.fmd @@ -18,7 +18,7 @@ } RW_VPD(PRESERVE) 8K RW_NVRAM(PRESERVE) 20K - SMMSTORE(PRESERVE) 4K + SMMSTORE(PRESERVE)@0x620000 64K RW_LEGACY(CBFS) WP_RO@8M 8M { RO_VPD(PRESERVE) 16K -- To view, visit https://review.coreboot.org/c/coreboot/+/68123 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I78cb873a5634c659067367260cc7063fbd60d77a Gerrit-Change-Number: 68123 Gerrit-PatchSet: 2 Gerrit-Owner: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: mb/prodrive/hermes: Add part numbers to SMBIOS
by Lean Sheng Tan (Code Review) 06 Oct '22

06 Oct '22

Attention is currently required from: Justin van Son, Patrick Rudolph, Christian Walter, Angel Pons. Lean Sheng Tan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67759 ) Change subject: mb/prodrive/hermes: Add part numbers to SMBIOS ...................................................................... Patch Set 1: Code-Review+1 (1 comment) Patchset: PS1: should be fine is the recommended change is done? -- To view, visit https://review.coreboot.org/c/coreboot/+/67759 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I26c17ab37859c3306fe72c3f0cdc1d3787b48157 Gerrit-Change-Number: 67759 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Justin van Son <justin.van.son(a)prodrive-technologies.com> Gerrit-Attention: Justin van Son <justin.van.son(a)prodrive-technologies.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Thu, 06 Oct 2022 18:19:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/meteorlake: Make use of is_devfn_enabled() function
by Martin Roth (Code Review) 06 Oct '22

06 Oct '22

Martin Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/67831 ) Change subject: soc/intel/meteorlake: Make use of is_devfn_enabled() function ...................................................................... soc/intel/meteorlake: Make use of is_devfn_enabled() function The patch uses is_devfn_enabled() function to enable the TBT PCIe ports through FSP-M and FSP-S UPDs. Also, removes unused tbt_pcie_port_disable array member from soc_intel_meteorlake_config struct. TEST=Build coreboot for Google/Rex Signed-off-by: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Change-Id: Ie55e196bd8f682864b8f74dbe253f345d7184753 Reviewed-on: https://review.coreboot.org/c/coreboot/+/67831 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Kapil Porwal <kapilporwal(a)google.com> --- M src/soc/intel/meteorlake/chip.h M src/soc/intel/meteorlake/fsp_params.c M src/soc/intel/meteorlake/romstage/fsp_params.c 3 files changed, 25 insertions(+), 12 deletions(-) Approvals: build bot (Jenkins): Verified Kapil Porwal: Looks good to me, approved diff --git a/src/soc/intel/meteorlake/chip.h b/src/soc/intel/meteorlake/chip.h index 04b8299..1d335c5 100644 --- a/src/soc/intel/meteorlake/chip.h +++ b/src/soc/intel/meteorlake/chip.h @@ -125,7 +125,6 @@ uint16_t usb3_wake_enable_bitmap; /* Program OC pins for TCSS */ struct tcss_port_config tcss_ports[MAX_TYPE_C_PORTS]; - uint8_t tbt_pcie_port_disable[4]; /* Validate TBT firmware authenticated and loaded into IMR */ bool tbt_authentication; diff --git a/src/soc/intel/meteorlake/fsp_params.c b/src/soc/intel/meteorlake/fsp_params.c index e3c8560..c727fb3 100644 --- a/src/soc/intel/meteorlake/fsp_params.c +++ b/src/soc/intel/meteorlake/fsp_params.c @@ -337,11 +337,8 @@ static void fill_fsps_tbt_params(FSP_S_CONFIG *s_cfg, const struct soc_intel_meteorlake_config *config) { - int max_port = get_max_tbt_pcie_port(); - - memset(s_cfg->ITbtPcieRootPortEn, 0, sizeof(s_cfg->ITbtPcieRootPortEn)); - for (int i = 0; i < max_port; i++) - s_cfg->ITbtPcieRootPortEn[i] = !(config->tbt_pcie_port_disable[i]); + for (int i = 0; i < ARRAY_SIZE(s_cfg->ITbtPcieRootPortEn); i++) + s_cfg->ITbtPcieRootPortEn[i] = is_devfn_enabled(PCI_DEVFN_TBT(i)); } static void fill_fsps_8254_params(FSP_S_CONFIG *s_cfg, diff --git a/src/soc/intel/meteorlake/romstage/fsp_params.c b/src/soc/intel/meteorlake/romstage/fsp_params.c index 74ea88d..60324e9 100644 --- a/src/soc/intel/meteorlake/romstage/fsp_params.c +++ b/src/soc/intel/meteorlake/romstage/fsp_params.c @@ -226,12 +226,10 @@ static void fill_fspm_usb4_params(FSP_M_CONFIG *m_cfg, const struct soc_intel_meteorlake_config *config) { - memset(&m_cfg->TcssItbtPcie0En, 0, sizeof(m_cfg->TcssItbtPcie0En)*4); - - m_cfg->TcssItbtPcie0En = !(config->tbt_pcie_port_disable[0]); - m_cfg->TcssItbtPcie1En = !(config->tbt_pcie_port_disable[1]); - m_cfg->TcssItbtPcie2En = !(config->tbt_pcie_port_disable[2]); - m_cfg->TcssItbtPcie3En = !(config->tbt_pcie_port_disable[3]); + m_cfg->TcssItbtPcie0En = is_devfn_enabled(PCI_DEVFN_TBT0); + m_cfg->TcssItbtPcie1En = is_devfn_enabled(PCI_DEVFN_TBT1); + m_cfg->TcssItbtPcie2En = is_devfn_enabled(PCI_DEVFN_TBT2); + m_cfg->TcssItbtPcie3En = is_devfn_enabled(PCI_DEVFN_TBT3); } static void fill_fspm_vtd_params(FSP_M_CONFIG *m_cfg, -- To view, visit https://review.coreboot.org/c/coreboot/+/67831 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie55e196bd8f682864b8f74dbe253f345d7184753 Gerrit-Change-Number: 67831 Gerrit-PatchSet: 4 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: mb/prodrive/hermes: Factor out serial reading logic
by Lean Sheng Tan (Code Review) 06 Oct '22

06 Oct '22

Attention is currently required from: Patrick Rudolph, Christian Walter, Angel Pons, Maximilian Brune. Lean Sheng Tan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67275 ) Change subject: mb/prodrive/hermes: Factor out serial reading logic ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/67275 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5c9781e4e599043be756514cfd6dd86dedcf580c Gerrit-Change-Number: 67275 Gerrit-PatchSet: 4 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Comment-Date: Thu, 06 Oct 2022 18:17:50 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/starlabs/lite/glkr: Enable configuring Fast Charging on the Lite M...
by Martin Roth (Code Review) 06 Oct '22

06 Oct '22

Martin Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/66319 ) Change subject: mb/starlabs/lite/glkr: Enable configuring Fast Charging on the Lite Mk IV ...................................................................... mb/starlabs/lite/glkr: Enable configuring Fast Charging on the Lite Mk IV Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Change-Id: I714867d455c4e0d01d6cb1cb9dc64669fb41100c Reviewed-on: https://review.coreboot.org/c/coreboot/+/66319 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/mainboard/starlabs/lite/Kconfig M src/mainboard/starlabs/lite/variants/glkr/cmos.default M src/mainboard/starlabs/lite/variants/glkr/cmos.layout 3 files changed, 19 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved diff --git a/src/mainboard/starlabs/lite/Kconfig b/src/mainboard/starlabs/lite/Kconfig index fd177d8e..df7e38c 100644 --- a/src/mainboard/starlabs/lite/Kconfig +++ b/src/mainboard/starlabs/lite/Kconfig @@ -24,6 +24,7 @@ config BOARD_STARLABS_LITE_GLKR select BOARD_STARLABS_LITE_SERIES + select EC_STARLABS_FAST_CHARGE select EC_STARLABS_NUVOTON select EC_STARLABS_KBL_LEVELS select SOC_INTEL_GEMINILAKE diff --git a/src/mainboard/starlabs/lite/variants/glkr/cmos.default b/src/mainboard/starlabs/lite/variants/glkr/cmos.default index 2455e2b..dedd7f7 100644 --- a/src/mainboard/starlabs/lite/variants/glkr/cmos.default +++ b/src/mainboard/starlabs/lite/variants/glkr/cmos.default @@ -12,6 +12,7 @@ # EC kbl_timeout=30 seconds fn_ctrl_swap=Disable +fast_charge=Normal # southbridge power_on_after_fail=Disable # Functions diff --git a/src/mainboard/starlabs/lite/variants/glkr/cmos.layout b/src/mainboard/starlabs/lite/variants/glkr/cmos.layout index e6b3be2..3dfc8de 100644 --- a/src/mainboard/starlabs/lite/variants/glkr/cmos.layout +++ b/src/mainboard/starlabs/lite/variants/glkr/cmos.layout @@ -28,6 +28,7 @@ # coreboot config options: EC 600 3 e 4 kbl_timeout 608 1 e 1 fn_ctrl_swap +616 1 e 11 fast_charge # coreboot config options: southbridge 800 2 e 6 power_on_after_fail @@ -93,6 +94,9 @@ 10 2 High 10 3 On +11 0 Normal +11 1 Fast + # ----------------------------------------------------------------- checksums -- To view, visit https://review.coreboot.org/c/coreboot/+/66319 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I714867d455c4e0d01d6cb1cb9dc64669fb41100c Gerrit-Change-Number: 66319 Gerrit-PatchSet: 9 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[XL] Change in coreboot[master]: payloads/cbui: Add new payload CBUI
by build bot (Jenkins) (Code Review) 06 Oct '22

06 Oct '22

Attention is currently required from: Iman Bingi, Martin L Roth, Julius Werner, Patrick Rudolph. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/23586 ) Change subject: payloads/cbui: Add new payload CBUI ...................................................................... Patch Set 58: (49 comments) File payloads/cbui/NuklearUI/NuklearDatePicker.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159868): https://review.coreboot.org/c/coreboot/+/23586/comment/ce594e11_7c5a9948 PS58, Line 36: case 6: /* fallthrough */ Prefer 'fallthrough;' over fallthrough comment Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159868): https://review.coreboot.org/c/coreboot/+/23586/comment/41aa8a93_549af72a PS58, Line 37: case 9: /* fallthrough */ Prefer 'fallthrough;' over fallthrough comment File payloads/cbui/NuklearUI/NuklearRW.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159868): https://review.coreboot.org/c/coreboot/+/23586/comment/72564759_4394b7e8 PS58, Line 289: static const char *titles[] = { "Hex-View", "Header", "Index/Data" }; static const char * array should probably be static const char * const Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159868): https://review.coreboot.org/c/coreboot/+/23586/comment/9d21afa4_078dfa49 PS58, Line 323: static const char *entries[] = { "NVRAM" }; static const char * array should probably be static const char * const File payloads/cbui/NuklearUI/NuklearRwAcpi.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159868): https://review.coreboot.org/c/coreboot/+/23586/comment/44908346_5b370f3d PS58, Line 40: static const char *tools[] = { lang_translate(LANG_SAVE, 0), lang_translate( static const char * array should probably be static const char * const Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159868): https://review.coreboot.org/c/coreboot/+/23586/comment/02ca87c9_1535d106 PS58, Line 43: static const char *tabs[] = { "RSDP", "XSDT", "RSDT", "FACP", "HPET", "APIC", "MCFG", static const char * array should probably be static const char * const File payloads/cbui/NuklearUI/NuklearRwAtaAtapi.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159868): https://review.coreboot.org/c/coreboot/+/23586/comment/5b42acef_ab0d9047 PS58, Line 23: static const char *tools[] = { lang_translate(LANG_SAVE, 0), lang_translate( static const char * array should probably be static const char * const Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159868): https://review.coreboot.org/c/coreboot/+/23586/comment/daf88808_4f3239d1 PS58, Line 26: static const char *tabs[] = { "Hex-View", "Info", "Summary" }; static const char * array should probably be static const char * const File payloads/cbui/NuklearUI/NuklearRwClock.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159868): https://review.coreboot.org/c/coreboot/+/23586/comment/622e30d5_961dc1a9 PS58, Line 53: static const char *tools[] = { lang_translate(LANG_SAVE, 0), "Save bin", "Load", static const char * array should probably be static const char * const Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159868): https://review.coreboot.org/c/coreboot/+/23586/comment/61845c3e_5f1c2b18 PS58, Line 56: static const char *tabs[] = { "Hex-View", "Info", "Text" }; static const char * array should probably be static const char * const File payloads/cbui/NuklearUI/NuklearRwCpuMsr.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159868): https://review.coreboot.org/c/coreboot/+/23586/comment/2e1c18b1_7f70b303 PS58, Line 20: static const char *tools[] = { lang_translate(LANG_SAVE, 0) }; static const char * array should probably be static const char * const Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159868): https://review.coreboot.org/c/coreboot/+/23586/comment/5716609f_e1083bf8 PS58, Line 22: static const char *tabs[] = { "MTRR", "User", "Summary" }; static const char * array should probably be static const char * const File payloads/cbui/NuklearUI/NuklearRwDimmSpd.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159868): https://review.coreboot.org/c/coreboot/+/23586/comment/e96d0c5e_66ffe8e0 PS58, Line 61: static const char *tools[] = { lang_translate(LANG_SAVE, 0), "Save all", "Save bin", static const char * array should probably be static const char * const Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159868): https://review.coreboot.org/c/coreboot/+/23586/comment/89f92a35_b134d36a PS58, Line 65: static const char *tabs[] = { "Hex-View", "Info", "Text", "Summary" }; static const char * array should probably be static const char * const File payloads/cbui/NuklearUI/NuklearRwE820.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159868): https://review.coreboot.org/c/coreboot/+/23586/comment/781b0785_3895ee52 PS58, Line 20: static const char *tools[] = { lang_translate(LANG_SAVE, 0) }; static const char * array should probably be static const char * const File payloads/cbui/NuklearUI/NuklearRwEc.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159868): https://review.coreboot.org/c/coreboot/+/23586/comment/843b5250_b841f9fa PS58, Line 49: static const char *tools[] = { lang_translate(LANG_SAVE, 0), "Save bin", "Load", static const char * array should probably be static const char * const Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159868): https://review.coreboot.org/c/coreboot/+/23586/comment/24b67538_ff311507 PS58, Line 52: static const char *tabs[] = { "Hex-View", "Info", "Text" }; static const char * array should probably be static const char * const File payloads/cbui/NuklearUI/NuklearRwIo.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159868): https://review.coreboot.org/c/coreboot/+/23586/comment/48aa01af_4d1abc0c PS58, Line 49: static const char *tools[] = { lang_translate(LANG_SAVE, 0), "Save bin", "Load", static const char * array should probably be static const char * const Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159868): https://review.coreboot.org/c/coreboot/+/23586/comment/2724463f_4d49d109 PS58, Line 52: static const char *tabs[] = { "Hex-View", "Info", "Text" }; static const char * array should probably be static const char * const File payloads/cbui/NuklearUI/NuklearRwIoIndexData.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159868): https://review.coreboot.org/c/coreboot/+/23586/comment/d50f3080_940dfb01 PS58, Line 49: static const char *tools[] = { lang_translate(LANG_SAVE, 0), "Save bin", "Load", static const char * array should probably be static const char * const Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159868): https://review.coreboot.org/c/coreboot/+/23586/comment/b88bb05a_d99919e0 PS58, Line 52: static const char *tabs[] = { "Hex-View", "Info", "Text" }; static const char * array should probably be static const char * const File payloads/cbui/arch/x86/int32.h: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159868): https://review.coreboot.org/c/coreboot/+/23586/comment/47327f05_b771dbdc PS58, Line 20: typedef struct __attribute__ ((packed)) { Prefer __packed over __attribute__((packed)) File payloads/cbui/arch/x86/int32.nasm: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159868): https://review.coreboot.org/c/coreboot/+/23586/comment/c02c1bf6_7b6538d9 PS58, Line 38: struc regs16_t 'struc' may be misspelled - perhaps 'struct'? File payloads/cbui/gfx/vbe.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159868): https://review.coreboot.org/c/coreboot/+/23586/comment/7ba0ca45_b52e7a85 PS58, Line 24: static u8 low_mem[0x1000] __attribute__ ((section(".lowmem"))); Prefer __section(".lowmem") over __attribute__((section(".lowmem"))) File payloads/cbui/lang/de.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159868): https://review.coreboot.org/c/coreboot/+/23586/comment/62fb5686_93d01121 PS58, Line 39: "Kein Framebuffer gefunden. CBUI funktioniert nicht" \ Avoid unnecessary line continuations Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159868): https://review.coreboot.org/c/coreboot/+/23586/comment/63d69826_a3f105b9 PS58, Line 44: "Der coreboot framebuffer hat keine physikalische " \ Avoid unnecessary line continuations Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159868): https://review.coreboot.org/c/coreboot/+/23586/comment/203d909d_aa9e976d PS58, Line 47: "Kein Platz auf dem Heap.\nBitte vergroBere den" \ Avoid unnecessary line continuations Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159868): https://review.coreboot.org/c/coreboot/+/23586/comment/3e122330_d8865da9 PS58, Line 50: "Konnte die nuklear Bibliothek nicht intitialisieren.\nBitte" \ Avoid unnecessary line continuations Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159868): https://review.coreboot.org/c/coreboot/+/23586/comment/d3e99326_762427f7 PS58, Line 52: "stelle sicher, das der Framebuffer entweder das RGBX8 oder " \ Avoid unnecessary line continuations Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159868): https://review.coreboot.org/c/coreboot/+/23586/comment/b7f9c772_fba26c55 PS58, Line 65: "Fehler: Keine CMOS Eintrage gefunden. Bitte schalte die " \ Avoid unnecessary line continuations Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159868): https://review.coreboot.org/c/coreboot/+/23586/comment/4d6754cb_5bd4fba6 PS58, Line 86: "Fehler: Keine Zeitstempel gefunden. Bitte schalte die " \ Avoid unnecessary line continuations Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159868): https://review.coreboot.org/c/coreboot/+/23586/comment/40ecf9c8_480548bd PS58, Line 89: "Fehler: Bootlog nicht gefunden. Bitte schalte die Kconfig " \ Avoid unnecessary line continuations File payloads/cbui/lang/en.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159868): https://review.coreboot.org/c/coreboot/+/23586/comment/d2735277_c3c703db PS58, Line 38: "No framebuffer found. CBUI doesn't work in text mode.\n" \ Avoid unnecessary line continuations Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159868): https://review.coreboot.org/c/coreboot/+/23586/comment/0c93c969_5bcbdbfb PS58, Line 46: "Failed to init nuklear library.\nMake sure you have enough " \ Avoid unnecessary line continuations Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159868): https://review.coreboot.org/c/coreboot/+/23586/comment/e6d02947_f1dcf0ac PS58, Line 60: "ERROR: No CMOS options found. Please make sure to enable " \ Avoid unnecessary line continuations Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159868): https://review.coreboot.org/c/coreboot/+/23586/comment/1737c63f_712c941e PS58, Line 81: "ERROR: No timestamps found. Please make sure to enable " \ Avoid unnecessary line continuations Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159868): https://review.coreboot.org/c/coreboot/+/23586/comment/35d15b1d_165612f8 PS58, Line 84: "ERROR: Bootlog not found. Please make sure to enable " \ Avoid unnecessary line continuations File payloads/cbui/modules/bootlog_module.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159868): https://review.coreboot.org/c/coreboot/+/23586/comment/c1e7f189_fa2ea24d PS58, Line 28: } __attribute__ ((__packed__)); Prefer __packed over __attribute__((__packed__)) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159868): https://review.coreboot.org/c/coreboot/+/23586/comment/424c562b_210db2a7 PS58, Line 82: } void function return statements are not generally useful File payloads/cbui/modules/cbfs_module.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159868): https://review.coreboot.org/c/coreboot/+/23586/comment/ddef4161_e99c58a3 PS58, Line 50: } __attribute__ ((packed)); Prefer __packed over __attribute__((packed)) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159868): https://review.coreboot.org/c/coreboot/+/23586/comment/e79a0ef6_0bee3361 PS58, Line 59: } __attribute__ ((packed)); Prefer __packed over __attribute__((packed)) File payloads/cbui/modules/cpuinfo_module.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159868): https://review.coreboot.org/c/coreboot/+/23586/comment/d5114753_172addb8 PS58, Line 35: static const char *intel_cap_edx_flags[] = { static const char * array should probably be static const char * const Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159868): https://review.coreboot.org/c/coreboot/+/23586/comment/47dd3e5c_2b21fe7f PS58, Line 43: static const char *amd_cap_edx_flags[] = { static const char * array should probably be static const char * const Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159868): https://review.coreboot.org/c/coreboot/+/23586/comment/bf62cfbd_98072af8 PS58, Line 51: static const char *intel_cap_ecx_flags[] = { static const char * array should probably be static const char * const Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159868): https://review.coreboot.org/c/coreboot/+/23586/comment/e76000e0_ede79916 PS58, Line 59: static const char *amd_cap_ecx_flags[] = { static const char * array should probably be static const char * const Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159868): https://review.coreboot.org/c/coreboot/+/23586/comment/379e5383_7c7b9fdd PS58, Line 67: static const char *intel_cap_extended_edx_flags[] = { static const char * array should probably be static const char * const Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159868): https://review.coreboot.org/c/coreboot/+/23586/comment/5e1c1b00_b7a6ea86 PS58, Line 75: static const char *intel_cap_extended_ecx_flags[] = { static const char * array should probably be static const char * const Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159868): https://review.coreboot.org/c/coreboot/+/23586/comment/b7ec7ce5_dbb349f8 PS58, Line 83: static const char *amd_cap_extended_edx_flags[] = { static const char * array should probably be static const char * const Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159868): https://review.coreboot.org/c/coreboot/+/23586/comment/901a5928_4485d963 PS58, Line 92: static const char *amd_cap_extended_ecx_flags[] = { static const char * array should probably be static const char * const -- To view, visit https://review.coreboot.org/c/coreboot/+/23586 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib9a1a07c1065880aa675380625021750d5cab7d1 Gerrit-Change-Number: 23586 Gerrit-PatchSet: 58 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Iman Bingi <imanbingy(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Iman Bingi <imanbingy(a)gmail.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Thu, 06 Oct 2022 18:17:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: ec/starlabs/merlin: Add support for enabling fast charge
by Martin Roth (Code Review) 06 Oct '22

06 Oct '22

Martin Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/66298 ) Change subject: ec/starlabs/merlin: Add support for enabling fast charge ...................................................................... ec/starlabs/merlin: Add support for enabling fast charge The Lite Mk IV's can enable fast charging, with support up to 100W via USB-C PD 3.0. The default for this is disabled, as it can reduce battery life span. This patch adds the option to enable fast charging, by writing 0x01 to 0x18 in the EC space. Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Change-Id: Ie01eb59d3f41b242190973fd9c58b1494320c12a Reviewed-on: https://review.coreboot.org/c/coreboot/+/66298 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/ec/starlabs/merlin/Kconfig M src/ec/starlabs/merlin/ec.h M src/ec/starlabs/merlin/nuvoton.c M src/ec/starlabs/merlin/variants/apl/ecdefs.h M src/ec/starlabs/merlin/variants/cezanne/ecdefs.h M src/ec/starlabs/merlin/variants/cml/ecdefs.h M src/ec/starlabs/merlin/variants/glk/ecdefs.h M src/ec/starlabs/merlin/variants/glkr/ecdefs.h M src/ec/starlabs/merlin/variants/glkr/emem.asl M src/ec/starlabs/merlin/variants/kbl/ecdefs.h M src/ec/starlabs/merlin/variants/merlin/ecdefs.h M src/ec/starlabs/merlin/variants/tgl/ecdefs.h 12 files changed, 70 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved diff --git a/src/ec/starlabs/merlin/Kconfig b/src/ec/starlabs/merlin/Kconfig index ff6077a..6ccd217 100644 --- a/src/ec/starlabs/merlin/Kconfig +++ b/src/ec/starlabs/merlin/Kconfig @@ -50,6 +50,13 @@ help Select if the mainboard has a fan. +config EC_STARLABS_FAST_CHARGE + bool + default n + depends on EC_STARLABS_NUVOTON + help + Select if the mainboard supports fast charging. + config EC_STARLABS_MAX_CHARGE bool default n diff --git a/src/ec/starlabs/merlin/ec.h b/src/ec/starlabs/merlin/ec.h index 6a6cda5..ca1d081 100644 --- a/src/ec/starlabs/merlin/ec.h +++ b/src/ec/starlabs/merlin/ec.h @@ -71,6 +71,10 @@ #define CHARGE_80 0xbb #define CHARGE_60 0xaa +/* Fast Charge Setting */ +#define CHARGE_RATE_NORMAL 0x00 +#define CHARGE_RATE_FAST 0x01 + /* Fan Mode Setting */ #define FAN_NORMAL 0x00 #define FAN_AGGRESSIVE 0xbb diff --git a/src/ec/starlabs/merlin/nuvoton.c b/src/ec/starlabs/merlin/nuvoton.c index ee8a661..e62f3dc 100644 --- a/src/ec/starlabs/merlin/nuvoton.c +++ b/src/ec/starlabs/merlin/nuvoton.c @@ -137,6 +137,27 @@ ARRAY_SIZE(max_charge))); /* + * Fast Charge + * + * Setting: fast_charge + * + * Values: Normal, Fast + * Default: Normal + * + */ + const uint8_t fast_charge[] = { + CHARGE_RATE_NORMAL, + CHARGE_RATE_FAST + }; + + if (CONFIG(EC_STARLABS_FAST_CHARGE)) + ec_write(ECRAM_FAST_CHARGE, + get_ec_value_from_option("fast_charge", + 0, + fast_charge, + ARRAY_SIZE(fast_charge))); + + /* * Fan Mode * * Setting: fan_mode diff --git a/src/ec/starlabs/merlin/variants/apl/ecdefs.h b/src/ec/starlabs/merlin/variants/apl/ecdefs.h index bb791bc..fa7e79b 100644 --- a/src/ec/starlabs/merlin/variants/apl/ecdefs.h +++ b/src/ec/starlabs/merlin/variants/apl/ecdefs.h @@ -22,5 +22,6 @@ #define ECRAM_FN_CTRL_REVERSE 0x2d #define ECRAM_MAX_CHARGE dead_code_t(uint8_t) #define ECRAM_FAN_MODE dead_code_t(uint8_t) +#define ECRAM_FAST_CHARGE dead_code_t(uint8_t) #endif diff --git a/src/ec/starlabs/merlin/variants/cezanne/ecdefs.h b/src/ec/starlabs/merlin/variants/cezanne/ecdefs.h index a75720e..6a3bad9 100644 --- a/src/ec/starlabs/merlin/variants/cezanne/ecdefs.h +++ b/src/ec/starlabs/merlin/variants/cezanne/ecdefs.h @@ -1,5 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <assert.h> +#include <stdint.h> + /* * EC communication interface for ITE Embedded Controller */ @@ -19,5 +22,6 @@ #define ECRAM_FN_CTRL_REVERSE 0x22 #define ECRAM_MAX_CHARGE 0x23 #define ECRAM_FAN_MODE 0x24 +#define ECRAM_FAST_CHARGE dead_code_t(uint8_t) #endif diff --git a/src/ec/starlabs/merlin/variants/cml/ecdefs.h b/src/ec/starlabs/merlin/variants/cml/ecdefs.h index 78c0329..6a24bc4 100644 --- a/src/ec/starlabs/merlin/variants/cml/ecdefs.h +++ b/src/ec/starlabs/merlin/variants/cml/ecdefs.h @@ -1,5 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <assert.h> +#include <stdint.h> + /* * EC communication interface for ITE Embedded Controller */ @@ -19,5 +22,6 @@ #define ECRAM_KBL_STATE 0x18 #define ECRAM_KBL_BRIGHTNESS 0x19 #define ECRAM_FN_LOCK_STATE 0x2c +#define ECRAM_FAST_CHARGE dead_code_t(uint8_t) #endif diff --git a/src/ec/starlabs/merlin/variants/glk/ecdefs.h b/src/ec/starlabs/merlin/variants/glk/ecdefs.h index 7407267..fefdd14 100644 --- a/src/ec/starlabs/merlin/variants/glk/ecdefs.h +++ b/src/ec/starlabs/merlin/variants/glk/ecdefs.h @@ -22,5 +22,6 @@ #define ECRAM_FN_CTRL_REVERSE 0x2d #define ECRAM_MAX_CHARGE dead_code_t(uint8_t) #define ECRAM_FAN_MODE dead_code_t(uint8_t) +#define ECRAM_FAST_CHARGE dead_code_t(uint8_t) #endif diff --git a/src/ec/starlabs/merlin/variants/glkr/ecdefs.h b/src/ec/starlabs/merlin/variants/glkr/ecdefs.h index 51b34df..038c378 100644 --- a/src/ec/starlabs/merlin/variants/glkr/ecdefs.h +++ b/src/ec/starlabs/merlin/variants/glkr/ecdefs.h @@ -22,5 +22,6 @@ #define ECRAM_FN_CTRL_REVERSE 0x13 #define ECRAM_MAX_CHARGE dead_code_t(uint8_t) #define ECRAM_FAN_MODE dead_code_t(uint8_t) +#define ECRAM_FAST_CHARGE 0x18 #endif diff --git a/src/ec/starlabs/merlin/variants/glkr/emem.asl b/src/ec/starlabs/merlin/variants/glkr/emem.asl index 4f7c100..6fa827e 100644 --- a/src/ec/starlabs/merlin/variants/glkr/emem.asl +++ b/src/ec/starlabs/merlin/variants/glkr/emem.asl @@ -26,6 +26,7 @@ FLKE, 8, // Function Lock State KLSE, 8, // Keyboard Backlight State KLBE, 8, // Keyboard Backlight Brightness + FSCH, 8, // Fast Charge Offset(0x20), RCMD, 8, // Send EC command diff --git a/src/ec/starlabs/merlin/variants/kbl/ecdefs.h b/src/ec/starlabs/merlin/variants/kbl/ecdefs.h index a9dda92..3b69317 100644 --- a/src/ec/starlabs/merlin/variants/kbl/ecdefs.h +++ b/src/ec/starlabs/merlin/variants/kbl/ecdefs.h @@ -22,5 +22,6 @@ #define ECRAM_FAN_MODE 0x42 #define ECRAM_FN_CTRL_REVERSE 0x43 #define ECRAM_MAX_CHARGE dead_code_t(uint8_t) +#define ECRAM_FAST_CHARGE dead_code_t(uint8_t) #endif diff --git a/src/ec/starlabs/merlin/variants/merlin/ecdefs.h b/src/ec/starlabs/merlin/variants/merlin/ecdefs.h index 48357d9..f02c73a 100644 --- a/src/ec/starlabs/merlin/variants/merlin/ecdefs.h +++ b/src/ec/starlabs/merlin/variants/merlin/ecdefs.h @@ -19,5 +19,6 @@ #define ECRAM_KBL_TIMEOUT 0x35 #define ECRAM_FAN_MODE 0x50 #define ECRAM_MAX_CHARGE 0x51 +#define ECRAM_FAST_CHARGE 0x52 #endif diff --git a/src/ec/starlabs/merlin/variants/tgl/ecdefs.h b/src/ec/starlabs/merlin/variants/tgl/ecdefs.h index 3441bc0..cbc7b86e 100644 --- a/src/ec/starlabs/merlin/variants/tgl/ecdefs.h +++ b/src/ec/starlabs/merlin/variants/tgl/ecdefs.h @@ -1,5 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <assert.h> +#include <stdint.h> + /* * EC communication interface for ITE Embedded Controller */ @@ -19,5 +22,6 @@ #define ECRAM_FN_CTRL_REVERSE 0x17 #define ECRAM_MAX_CHARGE 0x1a #define ECRAM_FAN_MODE 0x1b +#define ECRAM_FAST_CHARGE dead_code_t(uint8_t) #endif -- To view, visit https://review.coreboot.org/c/coreboot/+/66298 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie01eb59d3f41b242190973fd9c58b1494320c12a Gerrit-Change-Number: 66298 Gerrit-PatchSet: 9 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[M] Change in coreboot[master]: mb/starlabs/lite: Add variant specific cmos.layout and cmos.default
by Martin Roth (Code Review) 06 Oct '22

06 Oct '22

Martin Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/66297 ) Change subject: mb/starlabs/lite: Add variant specific cmos.layout and cmos.default ...................................................................... mb/starlabs/lite: Add variant specific cmos.layout and cmos.default Add variant specific cmos files, which avoid options like "FastCharge" existing in platforms that don't support such options. Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Change-Id: I04264cf72d47ef719acfd144d8bf9acb0ceccc11 Reviewed-on: https://review.coreboot.org/c/coreboot/+/66297 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/mainboard/starlabs/lite/Kconfig A src/mainboard/starlabs/lite/variants/glkr/cmos.default A src/mainboard/starlabs/lite/variants/glkr/cmos.layout 3 files changed, 142 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved diff --git a/src/mainboard/starlabs/lite/Kconfig b/src/mainboard/starlabs/lite/Kconfig index 7783df1..fd177d8e 100644 --- a/src/mainboard/starlabs/lite/Kconfig +++ b/src/mainboard/starlabs/lite/Kconfig @@ -30,6 +30,12 @@ if BOARD_STARLABS_LITE_SERIES +config CMOS_DEFAULT_FILE + default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/variants/\$(CONFIG_VARIANT_DIR)/cmos.default" if BOARD_STARLABS_LITE_GLKR + +config CMOS_LAYOUT_FILE + default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/variants/\$(CONFIG_VARIANT_DIR)/cmos.layout" if BOARD_STARLABS_LITE_GLKR + config DEVICETREE default "variants/\$(CONFIG_VARIANT_DIR)/devicetree.cb" diff --git a/src/mainboard/starlabs/lite/variants/glkr/cmos.default b/src/mainboard/starlabs/lite/variants/glkr/cmos.default new file mode 100644 index 0000000..2455e2b --- /dev/null +++ b/src/mainboard/starlabs/lite/variants/glkr/cmos.default @@ -0,0 +1,21 @@ +# hardcoded +boot_option=Fallback +# console +debug_level=Debug +# cpu +vtd=Enable +power_profile=Balanced +# Devices +wireless=Enable +webcam=Enable +legacy_8254_timer=Disable +# EC +kbl_timeout=30 seconds +fn_ctrl_swap=Disable +# southbridge +power_on_after_fail=Disable +# Functions +fn_lock_state=0x1 +trackpad_state=0x1 +kbl_brightness=0x0 +kbl_state=0x1 diff --git a/src/mainboard/starlabs/lite/variants/glkr/cmos.layout b/src/mainboard/starlabs/lite/variants/glkr/cmos.layout new file mode 100644 index 0000000..e6b3be2 --- /dev/null +++ b/src/mainboard/starlabs/lite/variants/glkr/cmos.layout @@ -0,0 +1,99 @@ +# SPDX-License-Identifier: GPL-2.0-only + +# ----------------------------------------------------------------- +entries + +# Bank: 1 +# ----------------------------------------------------------------- +0 120 r 0 reserved_memory + +# ----------------------------------------------------------------- +# RTC_BOOT_BYTE (coreboot hardcoded) +384 1 e 2 boot_option +388 4 h 0 reboot_counter + +# ----------------------------------------------------------------- +# coreboot config options: console +395 4 e 3 debug_level +# coreboot config options: cpu +#400 8 r 0 reserved for century byte +416 1 e 1 vtd +424 2 e 7 power_profile + +# coreboot config options: Devices +504 1 e 1 wireless +512 1 e 1 webcam +528 1 e 1 legacy_8254_timer + +# coreboot config options: EC +600 3 e 4 kbl_timeout +608 1 e 1 fn_ctrl_swap + +# coreboot config options: southbridge +800 2 e 6 power_on_after_fail + +# coreboot config options: check sums +984 16 h 0 check_sum + +# Bank: 2 +# embedded controller settings (outside the checksummed area) +1024 8 h 1 fn_lock_state +1032 8 h 1 trackpad_state +1040 8 h 10 kbl_brightness +1048 8 h 1 kbl_state + +# ----------------------------------------------------------------- + +enumerations + +#ID value text +1 0 Disable +1 1 Enable + +2 0 Fallback +2 1 Normal + +3 0 Emergency +3 1 Alert +3 2 Critical +3 3 Error +3 4 Warning +3 5 Notice +3 6 Info +3 7 Debug +3 8 Spew + +4 0 30 seconds +4 1 1 minute +4 2 3 minutes +4 3 5 minutes +4 4 Never + +5 0 Enable +5 1 Disable + +6 0 Disable +6 1 Enable +6 2 Keep + +7 0 Power Saver +7 1 Balanced +7 2 Performance + +8 0 100% +8 1 80% +8 2 60% + +9 0 Normal +9 1 Aggressive +9 2 Quiet + +10 0 Off +10 1 Low +10 2 High +10 3 On + +# ----------------------------------------------------------------- +checksums + +checksum 392 983 984 -- To view, visit https://review.coreboot.org/c/coreboot/+/66297 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I04264cf72d47ef719acfd144d8bf9acb0ceccc11 Gerrit-Change-Number: 66297 Gerrit-PatchSet: 8 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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[M] Change in coreboot[master]: mb/starlabs/starbook: Add variant specific cmos.layout and cmos.default
by Martin Roth (Code Review) 06 Oct '22

06 Oct '22

Martin Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/66296 ) Change subject: mb/starlabs/starbook: Add variant specific cmos.layout and cmos.default ...................................................................... mb/starlabs/starbook: Add variant specific cmos.layout and cmos.default Add variant specific cmos files, which avoid options like "Thunderbolt" existing in platforms that don't support such options. This change also removes entries that were never used, including: * smi_handler * usb_always_on Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Change-Id: I359e5c5bbf29eb474f2d3bc42a8e80afc0a5d38a Reviewed-on: https://review.coreboot.org/c/coreboot/+/66296 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/mainboard/starlabs/starbook/Kconfig M src/mainboard/starlabs/starbook/cmos.default M src/mainboard/starlabs/starbook/cmos.layout A src/mainboard/starlabs/starbook/variants/tgl/cmos.default A src/mainboard/starlabs/starbook/variants/tgl/cmos.layout 5 files changed, 157 insertions(+), 6 deletions(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved diff --git a/src/mainboard/starlabs/starbook/Kconfig b/src/mainboard/starlabs/starbook/Kconfig index 0e23ecf..8f51db4 100644 --- a/src/mainboard/starlabs/starbook/Kconfig +++ b/src/mainboard/starlabs/starbook/Kconfig @@ -60,6 +60,12 @@ default 6 if BOARD_STARLABS_LABTOP_CML default 3 +config CMOS_DEFAULT_FILE + default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/variants/\$(CONFIG_VARIANT_DIR)/cmos.default" if BOARD_STARLABS_STARBOOK_TGL + +config CMOS_LAYOUT_FILE + default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/variants/\$(CONFIG_VARIANT_DIR)/cmos.layout" if BOARD_STARLABS_STARBOOK_TGL + config DEVICETREE default "variants/\$(CONFIG_VARIANT_DIR)/devicetree.cb" diff --git a/src/mainboard/starlabs/starbook/cmos.default b/src/mainboard/starlabs/starbook/cmos.default index 0783adf..f1276cc 100644 --- a/src/mainboard/starlabs/starbook/cmos.default +++ b/src/mainboard/starlabs/starbook/cmos.default @@ -7,14 +7,11 @@ vtd=Enable power_profile=Balanced me_state=Disable -smi_handler=Enable # Devices wireless=Enable webcam=Enable microphone=Enable legacy_8254_timer=Disable -usb_always_on=Disable -thunderbolt=Disable # EC kbl_timeout=30 seconds fn_ctrl_swap=Disable diff --git a/src/mainboard/starlabs/starbook/cmos.layout b/src/mainboard/starlabs/starbook/cmos.layout index 85ec477..887c0b2 100644 --- a/src/mainboard/starlabs/starbook/cmos.layout +++ b/src/mainboard/starlabs/starbook/cmos.layout @@ -22,15 +22,12 @@ 424 2 e 7 power_profile 432 1 e 5 me_state 440 4 h 0 me_state_counter -448 1 e 1 smi_handler # coreboot config options: Devices 504 1 e 1 wireless 512 1 e 1 webcam 520 1 e 1 microphone 528 1 e 1 legacy_8254_timer -536 1 e 1 usb_always_on -544 1 e 1 thunderbolt # coreboot config options: EC 600 3 e 4 kbl_timeout diff --git a/src/mainboard/starlabs/starbook/variants/tgl/cmos.default b/src/mainboard/starlabs/starbook/variants/tgl/cmos.default new file mode 100644 index 0000000..cfc9a61 --- /dev/null +++ b/src/mainboard/starlabs/starbook/variants/tgl/cmos.default @@ -0,0 +1,25 @@ +# hardcoded +boot_option=Fallback +# console +debug_level=Debug +# cpu +hyper_threading=Enable +vtd=Enable +power_profile=Balanced +me_state=Disable +# Devices +wireless=Enable +webcam=Enable +microphone=Enable +legacy_8254_timer=Disable +thunderbolt=Disable +# EC +kbl_timeout=30 seconds +fn_ctrl_swap=Disable +# southbridge +power_on_after_fail=Disable +# Functions +fn_lock_state=0x1 +trackpad_state=0x1 +kbl_brightness=0x0 +kbl_state=0x1 diff --git a/src/mainboard/starlabs/starbook/variants/tgl/cmos.layout b/src/mainboard/starlabs/starbook/variants/tgl/cmos.layout new file mode 100644 index 0000000..c4a49c5 --- /dev/null +++ b/src/mainboard/starlabs/starbook/variants/tgl/cmos.layout @@ -0,0 +1,106 @@ +# SPDX-License-Identifier: GPL-2.0-only + +# ----------------------------------------------------------------- +entries + +# Bank: 1 +# ----------------------------------------------------------------- +0 120 r 0 reserved_memory + +# ----------------------------------------------------------------- +# RTC_BOOT_BYTE (coreboot hardcoded) +384 1 e 2 boot_option +388 4 h 0 reboot_counter + +# ----------------------------------------------------------------- +# coreboot config options: console +395 4 e 3 debug_level +# coreboot config options: cpu +#400 8 r 0 reserved for century byte +408 1 e 1 hyper_threading +416 1 e 1 vtd +424 2 e 7 power_profile +432 1 e 5 me_state +440 4 h 0 me_state_counter + +# coreboot config options: Devices +504 1 e 1 wireless +512 1 e 1 webcam +520 1 e 1 microphone +528 1 e 1 legacy_8254_timer +536 1 e 1 thunderbolt + +# coreboot config options: EC +600 3 e 4 kbl_timeout +608 1 e 1 fn_ctrl_swap +616 2 e 8 max_charge +624 2 e 9 fan_mode + +# coreboot config options: southbridge +800 2 e 6 power_on_after_fail + +# coreboot config options: check sums +984 16 h 0 check_sum + +# Bank: 2 +# embedded controller settings (outside the checksummed area) +1024 8 h 1 fn_lock_state +1032 8 h 1 trackpad_state +1040 8 h 10 kbl_brightness +1048 8 h 1 kbl_state + +# ----------------------------------------------------------------- + +enumerations + +#ID value text +1 0 Disable +1 1 Enable + +2 0 Fallback +2 1 Normal + +3 0 Emergency +3 1 Alert +3 2 Critical +3 3 Error +3 4 Warning +3 5 Notice +3 6 Info +3 7 Debug +3 8 Spew + +4 0 30 seconds +4 1 1 minute +4 2 3 minutes +4 3 5 minutes +4 4 Never + +5 0 Enable +5 1 Disable + +6 0 Disable +6 1 Enable +6 2 Keep + +7 0 Power Saver +7 1 Balanced +7 2 Performance + +8 0 100% +8 1 80% +8 2 60% + +9 0 Normal +9 1 Aggressive +9 2 Quiet + +10 0 Off +10 1 Low +10 2 High +10 3 On + +# ----------------------------------------------------------------- +checksums + +checksum 392 983 984 -- To view, visit https://review.coreboot.org/c/coreboot/+/66296 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I359e5c5bbf29eb474f2d3bc42a8e80afc0a5d38a Gerrit-Change-Number: 66296 Gerrit-PatchSet: 9 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: merged

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