Attention is currently required from: Shelley Chen, Tim Wawrzynczak, Julius Werner.
Douglas Anderson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67884 )
Change subject: soc/qualcomm: Update the wait time for checking PCIe link up
......................................................................
Patch Set 4: Code-Review+2
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Attention is currently required from: Iman Bingi, Martin L Roth, Julius Werner, Patrick Rudolph.
Iman Bingi has uploaded a new patch set (#57) to the change originally created by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/23586 )
Change subject: payloads/cbui: Add new payload CBUI
......................................................................
payloads/cbui: Add new payload CBUI
Depends on libpayload and nuklear.
Features:
* Graphical menus with scrolling.
* Text rendering engine (atm only bitmap font)
* Support for keyboard and mouse
* Support for USB and PS/2 devices
* Ported coreinfo and nvramcui
* Allows to modify NVRAM and RTC
* Works as ELF payload
* Works as Seabios secondary payload
* Basic support for multiple languages
* Hacky support for BIOS calls (depends on NASM)
* Runs in qemu and on real hardware
* Use linker script to allocate low memory
Shortcomings:
* Doesn't work in VGA text mode
* Untested on UEFI
* int32 relocates itself to low memory
Licenses:
* GPLv2 (CBUI + libpayload)
* BSD (libpayload)
* MIT (nuklear)
TODO:
* Test on as much platforms as possible
* Link int32 into low memory
This is Patrick Rudolph's original patch, updated by
Ben Adu-Boahen to:
* Add Read/Write module
* This module allows read/write to any hardware
component that is readable/writeable
Note:
This is work in progress
Change-Id: Ib9a1a07c1065880aa675380625021750d5cab7d1
Signed-off-by: Patrick Rudolph <siro(a)das-labor.org>
Signed-off-by: Ben Adu-Boahen <imanbingy(a)gmail.com>
---
M payloads/Kconfig
M payloads/Makefile.inc
A payloads/cbui/.gitignore
A payloads/cbui/Kconfig
A payloads/cbui/Makefile
A payloads/cbui/NuklearUI/NuklearCombo.c
A payloads/cbui/NuklearUI/NuklearCombo.h
A payloads/cbui/NuklearUI/NuklearCommon.h
A payloads/cbui/NuklearUI/NuklearDataGrid.c
A payloads/cbui/NuklearUI/NuklearDataGrid.h
A payloads/cbui/NuklearUI/NuklearDatePicker.c
A payloads/cbui/NuklearUI/NuklearDatePicker.h
A payloads/cbui/NuklearUI/NuklearFieldFile.c
A payloads/cbui/NuklearUI/NuklearFieldFile.h
A payloads/cbui/NuklearUI/NuklearFieldHex.c
A payloads/cbui/NuklearUI/NuklearFieldHex.h
A payloads/cbui/NuklearUI/NuklearFileChooser.c
A payloads/cbui/NuklearUI/NuklearFileChooser.h
A payloads/cbui/NuklearUI/NuklearGroup.c
A payloads/cbui/NuklearUI/NuklearGroup.h
A payloads/cbui/NuklearUI/NuklearHex.c
A payloads/cbui/NuklearUI/NuklearHex.h
A payloads/cbui/NuklearUI/NuklearIntegerRange.c
A payloads/cbui/NuklearUI/NuklearIntegerRange.h
A payloads/cbui/NuklearUI/NuklearLabel.c
A payloads/cbui/NuklearUI/NuklearLabel.h
A payloads/cbui/NuklearUI/NuklearObject.c
A payloads/cbui/NuklearUI/NuklearObject.h
A payloads/cbui/NuklearUI/NuklearPciHeader.c
A payloads/cbui/NuklearUI/NuklearPciHeader.h
A payloads/cbui/NuklearUI/NuklearRW.c
A payloads/cbui/NuklearUI/NuklearRW.h
A payloads/cbui/NuklearUI/NuklearRoot.c
A payloads/cbui/NuklearUI/NuklearRwAcpi.c
A payloads/cbui/NuklearUI/NuklearRwAcpi.h
A payloads/cbui/NuklearUI/NuklearRwAtaAtapi.c
A payloads/cbui/NuklearUI/NuklearRwAtaAtapi.h
A payloads/cbui/NuklearUI/NuklearRwClock.c
A payloads/cbui/NuklearUI/NuklearRwClock.h
A payloads/cbui/NuklearUI/NuklearRwCpuMsr.c
A payloads/cbui/NuklearUI/NuklearRwCpuMsr.h
A payloads/cbui/NuklearUI/NuklearRwDimmSpd.c
A payloads/cbui/NuklearUI/NuklearRwDimmSpd.h
A payloads/cbui/NuklearUI/NuklearRwE820.c
A payloads/cbui/NuklearUI/NuklearRwE820.h
A payloads/cbui/NuklearUI/NuklearRwEc.c
A payloads/cbui/NuklearUI/NuklearRwEc.h
A payloads/cbui/NuklearUI/NuklearRwIo.c
A payloads/cbui/NuklearUI/NuklearRwIo.h
A payloads/cbui/NuklearUI/NuklearStyle.c
A payloads/cbui/NuklearUI/NuklearStyle.h
A payloads/cbui/NuklearUI/NuklearTabView.c
A payloads/cbui/NuklearUI/NuklearTextView.c
A payloads/cbui/NuklearUI/NuklearTextView.h
A payloads/cbui/NuklearUI/NuklearTextfield.c
A payloads/cbui/NuklearUI/NuklearTextfield.h
A payloads/cbui/NuklearUI/NuklearTimePicker.c
A payloads/cbui/NuklearUI/NuklearTimePicker.h
A payloads/cbui/NuklearUI/NuklearUI.h
A payloads/cbui/NuklearUI/NuklearVector.c
A payloads/cbui/NuklearUI/NuklearVector.h
A payloads/cbui/arch/x86/cpuid.c
A payloads/cbui/arch/x86/cpuid.h
A payloads/cbui/arch/x86/int32.h
A payloads/cbui/arch/x86/int32.ld
A payloads/cbui/arch/x86/int32.nasm
A payloads/cbui/arch/x86/memcpy.c
A payloads/cbui/arch/x86/memcpy.h
A payloads/cbui/arch/x86/vga.c
A payloads/cbui/arch/x86/vga.h
A payloads/cbui/cbui.c
A payloads/cbui/cbui.h
A payloads/cbui/fsys/usbstorage.c
A payloads/cbui/fsys/usbstorage.h
A payloads/cbui/gfx/coreboot.c
A payloads/cbui/gfx/coreboot.h
A payloads/cbui/gfx/gfx.c
A payloads/cbui/gfx/gfx.h
A payloads/cbui/gfx/splash.c
A payloads/cbui/gfx/splash.h
A payloads/cbui/gfx/vbe.c
A payloads/cbui/gfx/vbe.h
A payloads/cbui/lang/de.c
A payloads/cbui/lang/en.c
A payloads/cbui/lang/lang.c
A payloads/cbui/lang/lang.h
A payloads/cbui/logo/cbui.png
A payloads/cbui/lp.config
A payloads/cbui/modules/bootlog_module.c
A payloads/cbui/modules/cbfs_module.c
A payloads/cbui/modules/cmos_module.c
A payloads/cbui/modules/coreboot_module.c
A payloads/cbui/modules/cpuinfo_module.c
A payloads/cbui/modules/license_module.c
A payloads/cbui/modules/modules.c
A payloads/cbui/modules/modules.h
A payloads/cbui/modules/nvram_module.c
A payloads/cbui/modules/pci_module.c
A payloads/cbui/modules/reboot_module.c
A payloads/cbui/modules/rtc_module.c
A payloads/cbui/modules/rw_module.c
A payloads/cbui/modules/timestamps_module.c
A payloads/cbui/modules/usb_module.c
A payloads/libpayload/configs/defconfig-cbui
104 files changed, 13,555 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/23586/57
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build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68137 )
Change subject: [WIP] mb/prodrive/atlas: Populate smbios table with VPD from ECs EMI
......................................................................
Patch Set 6:
(6 comments)
File src/mainboard/prodrive/atlas/emi.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159865):
https://review.coreboot.org/c/coreboot/+/68137/comment/1f2d9ea0_7b767265
PS6, Line 51: switch (access) {
switch and case should be at the same indent
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159865):
https://review.coreboot.org/c/coreboot/+/68137/comment/5d93655a_06d00df9
PS6, Line 89: switch (access) {
switch and case should be at the same indent
File src/mainboard/prodrive/atlas/mainboard.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159865):
https://review.coreboot.org/c/coreboot/+/68137/comment/ac9d411b_9540d719
PS6, Line 14: static const char* get_smbios_part_number(void);
"foo* bar" should be "foo *bar"
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159865):
https://review.coreboot.org/c/coreboot/+/68137/comment/a0451ecc_9ed381b2
PS6, Line 41: static const char* get_smbios_part_number(void)
"foo* bar" should be "foo *bar"
File src/mainboard/prodrive/atlas/smbios.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159865):
https://review.coreboot.org/c/coreboot/+/68137/comment/cf8805c4_14f05b4b
PS6, Line 8: const char* smbios_mainboard_serial_number(void)
"foo* bar" should be "foo *bar"
File src/mainboard/prodrive/atlas/vpd.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159865):
https://review.coreboot.org/c/coreboot/+/68137/comment/492a1b51_74ebc866
PS6, Line 34: switch (vpd) {
switch and case should be at the same indent
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Attention is currently required from: Patrick Rudolph, Christian Walter.
Hello build bot (Jenkins), Patrick Rudolph, Christian Walter,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/66616
to look at the new patch set (#3).
Change subject: mb/prodrive/hermes: Prevent SGPIO cross-powering 5V rail
......................................................................
mb/prodrive/hermes: Prevent SGPIO cross-powering 5V rail
The PCH's SGPIO pads are connected to a buffer chip which is powered from
the always-on +3V3_AUX rail. For some reason, if the SGPIO pads remain in
their native function when a Poseidon system shuts down, a bit of voltage
from the +3V3_AUX-powered buffer chip will leak into the +5V rail through
the SATA backplane. Simply pulling the SGPIO pads low before powering off
the system stops the +5V rail from being cross-powered.
This issue has only been observed in S5, but it is very likely other sleep
states are affected as well. Thus, always pull the SGPIO pins low when the
power supply will be switched off, i.e. ACPI S3 or deeper.
TEST=Obtain a Poseidon system, verify that the +5V rail is cross-powered
after going to S5. We measured 0.17V on our system, but voltages as
high as 0.6V were measured on other systems. Verify that unplugging
the SGPIO cable going to the SATA backplane results in the +5V rail
voltage dropping to 0V, which indicates that the voltage leakage is
exclusively coming from the SGPIO and SATA backplane. Finally, make
sure that the +5V rail voltage drops to 0V after going into ACPI S5
with this patch applied and the SGPIO cable connected.
Change-Id: Ic872903d5fcdd1c17e02b4c06d5ba29889fbc27d
Signed-off-by: Angel Pons <th3fanbus(a)gmail.com>
---
A src/mainboard/prodrive/hermes/smihandler.c
1 file changed, 51 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/66616/3
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Hello build bot (Jenkins), Christian Walter, Angel Pons, Lean Sheng Tan,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/68137
to look at the new patch set (#6).
Change subject: [WIP] mb/prodrive/atlas: Populate smbios table with VPD from ECs EMI
......................................................................
[WIP] mb/prodrive/atlas: Populate smbios table with VPD from ECs EMI
The embedded controller stores serial-number and part-number within
an EEPROM which is unreachable to the Host CPU. Therefore, on the
EC side, we set up a shared memory region with the help of EMI
and copy the VPDs to it. On the coreboot side, we can read those
back and populate the SMBios table type 1 with the serial-number and
type 11 with the part-number.
emi.*: small interface to access the EMI regions
vpd.*: uses the emi interface in order to read the VPDs
smbios.c: populates smbios type 1 with the serial-number by using
vpd.h
mainboard.c: uses vpd.h to add a string to smbios type 11
ld_config.*: offers functionality to configure logical devices
devicetree.cb: enables address range 0xc00-0xcff for the EMI runtime
registers
Makefile.inc: adds emi.c, vpd.c, smbios.c, ld_config.c to the ramstage
compilation
TODO: ld_config.* is redundant. We can replace this with pnp_device.h
or pnp_ops.h
Signed-off-by: David Milosevic <David.Milosevic(a)9elements.com>
Change-Id: I47bb4883c43ff344a9bda92c3106dd025533b391
---
M src/mainboard/prodrive/atlas/Makefile.inc
M src/mainboard/prodrive/atlas/devicetree.cb
A src/mainboard/prodrive/atlas/emi.c
A src/mainboard/prodrive/atlas/emi.h
A src/mainboard/prodrive/atlas/ld_config.c
A src/mainboard/prodrive/atlas/ld_config.h
M src/mainboard/prodrive/atlas/mainboard.c
A src/mainboard/prodrive/atlas/smbios.c
A src/mainboard/prodrive/atlas/vpd.c
A src/mainboard/prodrive/atlas/vpd.h
10 files changed, 528 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/68137/6
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Change subject: [WIP] mb/prodrive/atlas: Populate smbios table with VPD from ECs EMI
......................................................................
Patch Set 5:
(6 comments)
File src/mainboard/prodrive/atlas/emi.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159864):
https://review.coreboot.org/c/coreboot/+/68137/comment/3b31797e_48f92f4c
PS5, Line 51: switch (access) {
switch and case should be at the same indent
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159864):
https://review.coreboot.org/c/coreboot/+/68137/comment/1ad7e4b8_347f908c
PS5, Line 89: switch (access) {
switch and case should be at the same indent
File src/mainboard/prodrive/atlas/mainboard.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159864):
https://review.coreboot.org/c/coreboot/+/68137/comment/ffaba98a_f1359106
PS5, Line 14: static const char* get_smbios_part_number(void);
"foo* bar" should be "foo *bar"
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159864):
https://review.coreboot.org/c/coreboot/+/68137/comment/ee70bc3c_f3e844de
PS5, Line 41: static const char* get_smbios_part_number(void)
"foo* bar" should be "foo *bar"
File src/mainboard/prodrive/atlas/smbios.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159864):
https://review.coreboot.org/c/coreboot/+/68137/comment/ed0f7cf7_55bbf920
PS5, Line 8: const char* smbios_mainboard_serial_number(void)
"foo* bar" should be "foo *bar"
File src/mainboard/prodrive/atlas/vpd.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159864):
https://review.coreboot.org/c/coreboot/+/68137/comment/fd102c78_cbbf620a
PS5, Line 34: switch (vpd) {
switch and case should be at the same indent
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Attention is currently required from: Patrick Rudolph, Christian Walter, Angel Pons, Lean Sheng Tan.
Hello build bot (Jenkins), Christian Walter, Angel Pons, Lean Sheng Tan,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/68137
to look at the new patch set (#5).
Change subject: [WIP] mb/prodrive/atlas: Populate smbios table with VPD from ECs EMI
......................................................................
[WIP] mb/prodrive/atlas: Populate smbios table with VPD from ECs EMI
The embedded controller stores serial-number and part-number within
an EEPROM which is unreachable to the Host CPU. Therefore, on the
EC side, we set up a shared memory region with the help of EMI
and copy the VPDs to it. On the coreboot side, we can read those
back and populate the SMBios table type 1 with the serial-number and
type 11 with the part-number.
emi.*: small interface to access the EMI regions
vpd.*: uses the emi interface in order to read the VPDs
smbios.c: populates smbios type 1 with the serial-number by using
vpd.h
mainboard.c: uses vpd.h to add a string to smbios type 11
ld_config.*: offers functionality to configure logical devices
devicetree.cb: enables address range 0xc00-0xcff for the EMI runtime
registers
Makefile.inc: adds emi.c, vpd.c, smbios.c, ld_config.c to the ramstage
compilation
TODO: ld_config.* is redundant. We can replace this with pnp_device.h
or pnp_ops.h
Signed-off-by: David Milosevic <David.Milosevic(a)9elements.com>
Change-Id: I47bb4883c43ff344a9bda92c3106dd025533b391
---
M 3rdparty/blobs
M src/mainboard/prodrive/atlas/Makefile.inc
M src/mainboard/prodrive/atlas/devicetree.cb
A src/mainboard/prodrive/atlas/emi.c
A src/mainboard/prodrive/atlas/emi.h
A src/mainboard/prodrive/atlas/ld_config.c
A src/mainboard/prodrive/atlas/ld_config.h
M src/mainboard/prodrive/atlas/mainboard.c
A src/mainboard/prodrive/atlas/smbios.c
A src/mainboard/prodrive/atlas/vpd.c
A src/mainboard/prodrive/atlas/vpd.h
11 files changed, 529 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/68137/5
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Jon Murphy has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68115 )
Change subject: 3rdparty/amd_blobs:Advance submodule pointer
......................................................................
Patch Set 2: Code-Review+2
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Hello build bot (Jenkins), Jon Murphy, Karthik Ramasubramanian,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/68115
to look at the new patch set (#2).
Change subject: 3rdparty/amd_blobs:Advance submodule pointer
......................................................................
3rdparty/amd_blobs:Advance submodule pointer
This picks up the following changes:
84928ce2 mendocino: Upgrade SMU to 90.35.0
12ca1df1 mendocino: Add all blobs from PI 1.0.0.2
Change-Id: Ia28bba399ed527863f18ecd790c7096254873298
Signed-off-by: Jason Glenesk <jason.glenesk(a)amd.com>
---
M 3rdparty/amd_blobs
1 file changed, 15 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/68115/2
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