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Change subject: util/amdfwtool: Add preliminary code for morgana & glinda SOCs
......................................................................
Patch Set 3: Code-Review+1
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Change subject: mb/amd/birman: Add framework for morgana crb birman
......................................................................
Patch Set 3:
(3 comments)
File src/mainboard/amd/birman/port_descriptors.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-160014):
https://review.coreboot.org/c/coreboot/+/68196/comment/99b873da_ca1b7975
PS3, Line 104: break;
break is not useful after a return
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-160014):
https://review.coreboot.org/c/coreboot/+/68196/comment/30ac4a50_b2e12412
PS3, Line 108: break;
break is not useful after a return
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-160014):
https://review.coreboot.org/c/coreboot/+/68196/comment/e9872c2c_d24fafd8
PS3, Line 112: break;
break is not useful after a return
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Change subject: util/amdfwtool: Add Mendocino to usage
......................................................................
Patch Set 4: Code-Review+2
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Change subject: soc/amd/morgana: Add initial commit for new SoC
......................................................................
Patch Set 3:
(13 comments)
File src/soc/amd/morgana/fsp_m_params.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-160013):
https://review.coreboot.org/c/coreboot/+/68195/comment/941ba256_80dd43fb
PS3, Line 32: for (i = 0; i < num; i++) {
braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-160013):
https://review.coreboot.org/c/coreboot/+/68195/comment/1a767399_e7cfe5f9
PS3, Line 45: for (i = 0; i < num; i++) {
braces {} are not necessary for single statement blocks
File src/soc/amd/morgana/psp_verstage/svc.h:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-160013):
https://review.coreboot.org/c/coreboot/+/68195/comment/fb9d85b9_9a09bf95
PS3, Line 12: #define SVC_CALL4(SVC_ID, R0, R1, R2, R3, Ret) \
Macros with complex values should be enclosed in parentheses
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-160013):
https://review.coreboot.org/c/coreboot/+/68195/comment/393396e6_5897ceab
PS3, Line 25: #define SVC_CALL3(SVC_ID, R0, R1, R2, Ret) \
Macros with complex values should be enclosed in parentheses
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-160013):
https://review.coreboot.org/c/coreboot/+/68195/comment/0d1936b7_36738818
PS3, Line 36: #define SVC_CALL2(SVC_ID, R0, R1, Ret) \
Macros with complex values should be enclosed in parentheses
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-160013):
https://review.coreboot.org/c/coreboot/+/68195/comment/2d4d5409_8b29a82c
PS3, Line 46: #define SVC_CALL1(SVC_ID, R0, Ret) \
Macros with complex values should be enclosed in parentheses
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-160013):
https://review.coreboot.org/c/coreboot/+/68195/comment/6b7e4f3b_93d82e7e
PS3, Line 55: #define SVC_CALL0(SVC_ID, Ret) \
Macros with complex values should be enclosed in parentheses
File src/soc/amd/morgana/root_complex.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-160013):
https://review.coreboot.org/c/coreboot/+/68195/comment/949b24e0_6f612441
PS3, Line 87: * | | X86_RESET_VECTOR = BOOTBLOCK_END - 0x10
line length of 98 exceeds 96 columns
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-160013):
https://review.coreboot.org/c/coreboot/+/68195/comment/d8e2c278_5fae07cd
PS3, Line 90: * +--------------------------------+ BOOTBLOCK_ADDR = BOOTBLOCK_END - C_ENV_BOOTBLOCK_SIZE
line length of 111 exceeds 96 columns
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-160013):
https://review.coreboot.org/c/coreboot/+/68195/comment/ec7ad983_dbb6328e
PS3, Line 95: * +--------------------------------+ PSP_SHAREDMEM_BASE + PSP_SHAREDMEM_SIZE + PRERAM_CBMEM_CONSOLE_SIZE + 0x200
line length of 133 exceeds 96 columns
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-160013):
https://review.coreboot.org/c/coreboot/+/68195/comment/dd638125_daec63cd
PS3, Line 97: * +--------------------------------+ PSP_SHAREDMEM_BASE + PSP_SHAREDMEM_SIZE + PRERAM_CBMEM_CONSOLE_SIZE
line length of 125 exceeds 96 columns
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-160013):
https://review.coreboot.org/c/coreboot/+/68195/comment/c64d7145_ed52a049
PS3, Line 100: * +--------------------------------+ PSP_SHAREDMEM_BASE + PSP_SHAREDMEM_SIZE
line length of 97 exceeds 96 columns
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-160013):
https://review.coreboot.org/c/coreboot/+/68195/comment/c5059b9f_a7ef4495
PS3, Line 182: reserved_ram_resource_kb(dev, idx++, res->addr / KiB, res->length / KiB);
line length of 97 exceeds 96 columns
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Change subject: util/amdfwtool: Add preliminary code for morgana & glinda SOCs
......................................................................
Patch Set 3:
(1 comment)
File util/amdfwtool/amdfwtool.c:
https://review.coreboot.org/c/coreboot/+/68193/comment/d56da4ab_20b04bb0
PS2, Line 1940: return PLATFORM_GLENDA;
> This should be PLATFORM_GLINDA to fix the build error
Done
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Change subject: util/amdfwtool: Add preliminary code for morgana & glinda SOCs
......................................................................
Patch Set 2: -Code-Review
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Change subject: mb/amd/birman: Add framework for morgana crb birman
......................................................................
Patch Set 2: Code-Review+2
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Iman Bingi has uploaded a new patch set (#79) to the change originally created by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/23586 )
Change subject: payloads/cbui: Add new payload CBUI
......................................................................
payloads/cbui: Add new payload CBUI
Depends on libpayload and nuklear.
Features:
* Graphical menus with scrolling.
* Text rendering engine (atm only bitmap font)
* Support for keyboard and mouse
* Support for USB and PS/2 devices
* Ported coreinfo and nvramcui
* Allows to modify NVRAM and RTC
* Works as ELF payload
* Works as Seabios secondary payload
* Basic support for multiple languages
* Hacky support for BIOS calls (depends on NASM)
* Runs in qemu and on real hardware
* Use linker script to allocate low memory
Shortcomings:
* Doesn't work in VGA text mode
* Untested on UEFI
* int32 relocates itself to low memory
Licenses:
* GPLv2 (CBUI + libpayload)
* BSD (libpayload)
* MIT (nuklear)
TODO:
* Test on as much platforms as possible
* Link int32 into low memory
This is Patrick Rudolph's original patch, updated by
Ben Adu-Boahen to:
* Add Read/Write module
* This module allows read/write to any hardware
component that is readable/writeable
Note:
This is work in progress
Change-Id: Ib9a1a07c1065880aa675380625021750d5cab7d1
Signed-off-by: Patrick Rudolph <siro(a)das-labor.org>
Signed-off-by: Ben Adu-Boahen <imanbingy(a)gmail.com>
---
M payloads/Kconfig
M payloads/Makefile.inc
A payloads/cbui/.gitignore
A payloads/cbui/Kconfig
A payloads/cbui/Makefile
A payloads/cbui/NuklearUI/NuklearCombo.c
A payloads/cbui/NuklearUI/NuklearCombo.h
A payloads/cbui/NuklearUI/NuklearCommon.h
A payloads/cbui/NuklearUI/NuklearDataGrid.c
A payloads/cbui/NuklearUI/NuklearDataGrid.h
A payloads/cbui/NuklearUI/NuklearDatePicker.c
A payloads/cbui/NuklearUI/NuklearDatePicker.h
A payloads/cbui/NuklearUI/NuklearFieldFile.c
A payloads/cbui/NuklearUI/NuklearFieldFile.h
A payloads/cbui/NuklearUI/NuklearFieldHex.c
A payloads/cbui/NuklearUI/NuklearFieldHex.h
A payloads/cbui/NuklearUI/NuklearFileChooser.c
A payloads/cbui/NuklearUI/NuklearFileChooser.h
A payloads/cbui/NuklearUI/NuklearGroup.c
A payloads/cbui/NuklearUI/NuklearGroup.h
A payloads/cbui/NuklearUI/NuklearHex.c
A payloads/cbui/NuklearUI/NuklearHex.h
A payloads/cbui/NuklearUI/NuklearIntegerRange.c
A payloads/cbui/NuklearUI/NuklearIntegerRange.h
A payloads/cbui/NuklearUI/NuklearLabel.c
A payloads/cbui/NuklearUI/NuklearLabel.h
A payloads/cbui/NuklearUI/NuklearObject.c
A payloads/cbui/NuklearUI/NuklearObject.h
A payloads/cbui/NuklearUI/NuklearPciHeader.c
A payloads/cbui/NuklearUI/NuklearPciHeader.h
A payloads/cbui/NuklearUI/NuklearRW.c
A payloads/cbui/NuklearUI/NuklearRW.h
A payloads/cbui/NuklearUI/NuklearRoot.c
A payloads/cbui/NuklearUI/NuklearRwAcpi.c
A payloads/cbui/NuklearUI/NuklearRwAcpi.h
A payloads/cbui/NuklearUI/NuklearRwAtaAtapi.c
A payloads/cbui/NuklearUI/NuklearRwAtaAtapi.h
A payloads/cbui/NuklearUI/NuklearRwClock.c
A payloads/cbui/NuklearUI/NuklearRwClock.h
A payloads/cbui/NuklearUI/NuklearRwCpuMsr.c
A payloads/cbui/NuklearUI/NuklearRwCpuMsr.h
A payloads/cbui/NuklearUI/NuklearRwDimmSpd.c
A payloads/cbui/NuklearUI/NuklearRwDimmSpd.h
A payloads/cbui/NuklearUI/NuklearRwE820.c
A payloads/cbui/NuklearUI/NuklearRwE820.h
A payloads/cbui/NuklearUI/NuklearRwEc.c
A payloads/cbui/NuklearUI/NuklearRwEc.h
A payloads/cbui/NuklearUI/NuklearRwIo.c
A payloads/cbui/NuklearUI/NuklearRwIo.h
A payloads/cbui/NuklearUI/NuklearRwIoIndexData.c
A payloads/cbui/NuklearUI/NuklearRwIoIndexData.h
A payloads/cbui/NuklearUI/NuklearRwMemory.c
A payloads/cbui/NuklearUI/NuklearRwMemory.h
A payloads/cbui/NuklearUI/NuklearRwMemoryIndexData.c
A payloads/cbui/NuklearUI/NuklearRwMemoryIndexData.h
A payloads/cbui/NuklearUI/NuklearRwNvram.c
A payloads/cbui/NuklearUI/NuklearRwNvram.h
A payloads/cbui/NuklearUI/NuklearRwPci.c
A payloads/cbui/NuklearUI/NuklearRwPci.h
A payloads/cbui/NuklearUI/NuklearRwPciIndexData.c
A payloads/cbui/NuklearUI/NuklearRwPciIndexData.h
A payloads/cbui/NuklearUI/NuklearRwPciOptionRom.c
A payloads/cbui/NuklearUI/NuklearRwPciOptionRom.h
A payloads/cbui/NuklearUI/NuklearRwSmbios.c
A payloads/cbui/NuklearUI/NuklearRwSmbios.h
A payloads/cbui/NuklearUI/NuklearRwSmbus.c
A payloads/cbui/NuklearUI/NuklearRwSmbus.h
A payloads/cbui/NuklearUI/NuklearRwSmram.c
A payloads/cbui/NuklearUI/NuklearRwSmram.h
A payloads/cbui/NuklearUI/NuklearRwSuperIo.c
A payloads/cbui/NuklearUI/NuklearRwSuperIo.h
A payloads/cbui/NuklearUI/NuklearRwUsb.c
A payloads/cbui/NuklearUI/NuklearRwUsb.h
A payloads/cbui/NuklearUI/NuklearStyle.c
A payloads/cbui/NuklearUI/NuklearStyle.h
A payloads/cbui/NuklearUI/NuklearTabView.c
A payloads/cbui/NuklearUI/NuklearTextView.c
A payloads/cbui/NuklearUI/NuklearTextView.h
A payloads/cbui/NuklearUI/NuklearTextfield.c
A payloads/cbui/NuklearUI/NuklearTextfield.h
A payloads/cbui/NuklearUI/NuklearTimePicker.c
A payloads/cbui/NuklearUI/NuklearTimePicker.h
A payloads/cbui/NuklearUI/NuklearUI.h
A payloads/cbui/NuklearUI/NuklearVector.c
A payloads/cbui/NuklearUI/NuklearVector.h
A payloads/cbui/arch/x86/cpuid.c
A payloads/cbui/arch/x86/cpuid.h
A payloads/cbui/arch/x86/int32.h
A payloads/cbui/arch/x86/int32.ld
A payloads/cbui/arch/x86/int32.nasm
A payloads/cbui/arch/x86/memcpy.c
A payloads/cbui/arch/x86/memcpy.h
A payloads/cbui/arch/x86/vga.c
A payloads/cbui/arch/x86/vga.h
A payloads/cbui/cbui.c
A payloads/cbui/cbui.h
A payloads/cbui/fsys/usbstorage.c
A payloads/cbui/fsys/usbstorage.h
A payloads/cbui/gfx/coreboot.c
A payloads/cbui/gfx/coreboot.h
A payloads/cbui/gfx/gfx.c
A payloads/cbui/gfx/gfx.h
A payloads/cbui/gfx/splash.c
A payloads/cbui/gfx/splash.h
A payloads/cbui/gfx/vbe.c
A payloads/cbui/gfx/vbe.h
A payloads/cbui/lang/de.c
A payloads/cbui/lang/en.c
A payloads/cbui/lang/lang.c
A payloads/cbui/lang/lang.h
A payloads/cbui/logo/cbui.png
A payloads/cbui/lp.config
A payloads/cbui/modules/bootlog_module.c
A payloads/cbui/modules/cbfs_module.c
A payloads/cbui/modules/cmos_module.c
A payloads/cbui/modules/coreboot_module.c
A payloads/cbui/modules/cpuinfo_module.c
A payloads/cbui/modules/license_module.c
A payloads/cbui/modules/modules.c
A payloads/cbui/modules/modules.h
A payloads/cbui/modules/nvram_module.c
A payloads/cbui/modules/pci_module.c
A payloads/cbui/modules/reboot_module.c
A payloads/cbui/modules/rtc_module.c
A payloads/cbui/modules/rw_module.c
A payloads/cbui/modules/timestamps_module.c
A payloads/cbui/modules/usb_module.c
A payloads/libpayload/configs/defconfig-cbui
128 files changed, 15,587 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/23586/79
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Gerrit-Change-Number: 23586
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Change subject: soc/amd/morgana: Add initial commit for new SoC
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Patch Set 2: Code-Review+2
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Change subject: soc/amd/common: Add morgana SoC to psp_efs.h
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Patch Set 2: -Code-Review
(1 comment)
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PS2:
Dang it. I wonder if it'd be as simple as reordering the commits.
> #!!!!! Error: CONFIG() used on unknown value (SOC_AMD_MORGANA) at src/soc/amd/common/block/include/amdblocks/psp_efs.h:20.
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