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Change subject: arch/x86/include: Split msr access into separate file
......................................................................
Patch Set 3:
(2 comments)
Patchset:
PS3:
> will <cpu/x86/msr.h> chain-include <cpu/x86/msr_access. […]
Yes, that's the plan - both of these patches (cpuid & msr) are intended to be chain included, though they could be included separately if for some reason only the access mechanisms were needed.
File src/include/cpu/x86/msr_access.h:
https://review.coreboot.org/c/coreboot/+/67917/comment/48ec3190_ca54b1e6
PS3, Line 30: /* The following functions require the __always_inline due to AMD
: * function STOP_CAR_AND_CPU that disables cache as
: * RAM, the cache as RAM stack can no longer be used. Called
: * functions must be inlined to avoid stack usage. Also, the
: * compiler must keep local variables register based and not
: * allocated them from the stack. With gcc 4.5.0, some functions
: * declared as inline are not being inlined. This patch forces
: * these functions to always be inlined by adding the qualifier
: * __always_inline to their declaration.
: */
> This comment could be rewritten a bit. It looks like it was copied from a commit message.
I agree, but this patch is a simple move.
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Change subject: mb/google/skyrim/port_descriptors: update DDI for MDN and Chausie
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Patch Set 10: Code-Review+2
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Change subject: mb/google/skyrim/port_descriptors: update DDI for MDN and Chausie
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Change subject: soc/amd/*/smi.h: Use BIT() for clarity
......................................................................
Patch Set 1: Code-Review+1
(1 comment)
File src/soc/amd/stoneyridge/include/soc/smi.h:
https://review.coreboot.org/c/coreboot/+/68548/comment/2d65181b_b2d67ea8
PS1, Line 152: BIT
needs <types.h>
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Change subject: soc/amd/*/uart: cleanup includes
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