coreboot-gerrit October 2022

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[S] Change in coreboot[4.18_branch]: drivers/tpm: Move TPM init to end of device init phase
by Felix Held (Code Review) 20 Oct '22

20 Oct '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68600 ) Change subject: drivers/tpm: Move TPM init to end of device init phase ...................................................................... drivers/tpm: Move TPM init to end of device init phase Boards which use an I2C TPM and do not use vboot will not have the I2C bus initialized/ready at the start of the device init phase. If TPM init is called before the bus, init will fail with I2C transfer timeouts and a significantly lengthened boot time. Resolves: https://ticket.coreboot.org/issues/429 TEST=build/boot google/reef w/o vboot, verify successful TPM init. Change-Id: Ic47e465db1c06d8b79a1f0a06906843149b6dacd Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68600 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/drivers/tpm/tpm.c 1 file changed, 23 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved diff --git a/src/drivers/tpm/tpm.c b/src/drivers/tpm/tpm.c index ce1a2b7..3b582c8 100644 --- a/src/drivers/tpm/tpm.c +++ b/src/drivers/tpm/tpm.c @@ -10,4 +10,4 @@ tpm_setup(s3resume); } -BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_ENTRY, init_tpm_dev, NULL); +BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_EXIT, init_tpm_dev, NULL); -- To view, visit https://review.coreboot.org/c/coreboot/+/68600 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: 4.18_branch Gerrit-Change-Id: Ic47e465db1c06d8b79a1f0a06906843149b6dacd Gerrit-Change-Number: 68600 Gerrit-PatchSet: 2 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: drivers/tpm: Move TPM init to end of device init phase
by Felix Held (Code Review) 20 Oct '22

20 Oct '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68550 ) Change subject: drivers/tpm: Move TPM init to end of device init phase ...................................................................... drivers/tpm: Move TPM init to end of device init phase Boards which use an I2C TPM and do not use vboot will not have the I2C bus initialized/ready at the start of the device init phase. If TPM init is called before the bus, init will fail with I2C transfer timeouts and a significantly lengthened boot time. Resolves: https://ticket.coreboot.org/issues/429 TEST=build/boot google/reef w/o vboot, verify successful TPM init. Change-Id: Ic47e465db1c06d8b79a1f0a06906843149b6dacd Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68550 Reviewed-by: Alexandru Stan <amstan(a)chromium.org> Reviewed-by: Julius Werner <jwerner(a)chromium.org> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub(a)google.com> --- M src/drivers/tpm/tpm.c 1 file changed, 26 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Julius Werner: Looks good to me, approved Alexandru Stan: Looks good to me, but someone else must approve Angel Pons: Looks good to me, approved Karthik Ramasubramanian: Looks good to me, approved diff --git a/src/drivers/tpm/tpm.c b/src/drivers/tpm/tpm.c index ce1a2b7..3b582c8 100644 --- a/src/drivers/tpm/tpm.c +++ b/src/drivers/tpm/tpm.c @@ -10,4 +10,4 @@ tpm_setup(s3resume); } -BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_ENTRY, init_tpm_dev, NULL); +BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_EXIT, init_tpm_dev, NULL); -- To view, visit https://review.coreboot.org/c/coreboot/+/68550 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic47e465db1c06d8b79a1f0a06906843149b6dacd Gerrit-Change-Number: 68550 Gerrit-PatchSet: 3 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Alexandru Stan <amstan(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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[S] Change in coreboot[4.18_branch]: drivers/tpm: Move TPM init to end of device init phase
by Felix Held (Code Review) 20 Oct '22

20 Oct '22

Attention is currently required from: Matt DeVillier. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68600 ) Change subject: drivers/tpm: Move TPM init to end of device init phase ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > this seems to be a duplicate of CB:68550 despite both having the same change id o_O oh, the different branch explains this -- To view, visit https://review.coreboot.org/c/coreboot/+/68600 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: 4.18_branch Gerrit-Change-Id: Ic47e465db1c06d8b79a1f0a06906843149b6dacd Gerrit-Change-Number: 68600 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Comment-Date: Thu, 20 Oct 2022 17:22:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: drivers/intel/fsp2_0/memory_init.c: clean code
by Maximilian Brune (Code Review) 20 Oct '22

20 Oct '22

Maximilian Brune has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/68592 ) Change subject: drivers/intel/fsp2_0/memory_init.c: clean code ...................................................................... drivers/intel/fsp2_0/memory_init.c: clean code Change-Id: I4d57c45ede520160ef615725c023b7e92289a995 --- M src/drivers/intel/fsp2_0/memory_init.c 1 file changed, 12 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/68592/1 diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c index f7aaed4..99b0fea 100644 --- a/src/drivers/intel/fsp2_0/memory_init.c +++ b/src/drivers/intel/fsp2_0/memory_init.c @@ -26,14 +26,11 @@ static uint8_t temp_ram[CONFIG_FSP_TEMP_RAM_SIZE] __aligned(sizeof(uint64_t)); -static void save_memory_training_data(bool s3wake, uint32_t fsp_version) +static void save_memory_training_data(uint32_t fsp_version) { size_t mrc_data_size; const void *mrc_data; - if (!CONFIG(CACHE_MRC_SETTINGS) || s3wake) - return; - mrc_data = fsp_find_nv_storage_data(&mrc_data_size); if (!mrc_data) { printk(BIOS_ERR, "FSP_NON_VOLATILE_STORAGE_HOB missing!\n"); @@ -76,7 +73,8 @@ (uintptr_t)cbmem_find(CBMEM_ID_FSP_RESERVED_MEMORY)) die("Failed to accommodate FSP reserved memory request!\n"); - save_memory_training_data(s3wake, fsp_version); + if (CONFIG(CACHE_MRC_SETTINGS) && !s3wake) + save_memory_training_data(fsp_version); /* Create romstage handof information */ romstage_handoff_init(s3wake); -- To view, visit https://review.coreboot.org/c/coreboot/+/68592 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4d57c45ede520160ef615725c023b7e92289a995 Gerrit-Change-Number: 68592 Gerrit-PatchSet: 1 Gerrit-Owner: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[4.18_branch]: drivers/tpm: Move TPM init to end of device init phase
by Felix Held (Code Review) 20 Oct '22

20 Oct '22

Attention is currently required from: Matt DeVillier. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68600 ) Change subject: drivers/tpm: Move TPM init to end of device init phase ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: this seems to be a duplicate of CB:68550 despite both having the same change id o_O -- To view, visit https://review.coreboot.org/c/coreboot/+/68600 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: 4.18_branch Gerrit-Change-Id: Ic47e465db1c06d8b79a1f0a06906843149b6dacd Gerrit-Change-Number: 68600 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Comment-Date: Thu, 20 Oct 2022 17:21:31 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/(guybrush|skyrim): Use a variable for APCB filename
by Felix Held (Code Review) 20 Oct '22

20 Oct '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/67501 ) Change subject: mb/google/(guybrush|skyrim): Use a variable for APCB filename ...................................................................... mb/google/(guybrush|skyrim): Use a variable for APCB filename We use the name of the APCB file repeatedly, so put it into a variable so that it's easier to update. Signed-off-by: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Change-Id: I8684db2f7b2d68f0354e37bd8cdfc4f9cab44b8a Reviewed-on: https://review.coreboot.org/c/coreboot/+/67501 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Paul Menzel <paulepanter(a)mailbox.org> Reviewed-by: Jason Glenesk <jason.glenesk(a)amd.corp-partner.google.com> Reviewed-by: Felix Held <felix-coreboot(a)felixheld.de> --- M src/mainboard/google/guybrush/Makefile.inc M src/mainboard/google/skyrim/Makefile.inc 2 files changed, 35 insertions(+), 13 deletions(-) Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Felix Held: Looks good to me, but someone else must approve Jason Glenesk: Looks good to me, approved diff --git a/src/mainboard/google/guybrush/Makefile.inc b/src/mainboard/google/guybrush/Makefile.inc index 1158dcfa..8ffb00f 100644 --- a/src/mainboard/google/guybrush/Makefile.inc +++ b/src/mainboard/google/guybrush/Makefile.inc @@ -22,14 +22,16 @@ CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/baseboard/include CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/include +APCB_NAME=APCB_CZN_D4 + LIB_SPD_DEPS = $(SPD_SOURCES) -APCB_SOURCES = $(obj)/APCB_CZN_D4.gen -APCB_SOURCES_RECOVERY = $(obj)/APCB_CZN_D4.gen +APCB_SOURCES = $(obj)/$(APCB_NAME).gen +APCB_SOURCES_RECOVERY = $(obj)/$(APCB_NAME).gen -$(obj)/APCB_CZN_D4.gen: $(SPD_SOURCES) \ +$(obj)/$(APCB_NAME).gen: $(SPD_SOURCES) \ $(APCB_V3_EDIT_TOOL) \ - $(MAINBOARD_BLOBS_DIR)/APCB_CZN_D4.bin - $(APCB_V3_EDIT_TOOL) $(MAINBOARD_BLOBS_DIR)/APCB_CZN_D4.bin \ - $(obj)/APCB_CZN_D4.gen \ + $(MAINBOARD_BLOBS_DIR)/$(APCB_NAME).bin + $(APCB_V3_EDIT_TOOL) $(MAINBOARD_BLOBS_DIR)/$(APCB_NAME).bin \ + $(obj)/$(APCB_NAME).gen \ --spd_sources $(SPD_SOURCES) diff --git a/src/mainboard/google/skyrim/Makefile.inc b/src/mainboard/google/skyrim/Makefile.inc index a594ceb..0fa733e 100644 --- a/src/mainboard/google/skyrim/Makefile.inc +++ b/src/mainboard/google/skyrim/Makefile.inc @@ -18,21 +18,23 @@ CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/baseboard/include CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/include -ifneq ($(wildcard $(MAINBOARD_BLOBS_DIR)/APCB_MDN_D5.bin),) +APCB_NAME=APCB_MDN_D5 + +ifneq ($(wildcard $(MAINBOARD_BLOBS_DIR)/$(APCB_NAME).bin),) $(info APCB sources present.) ifneq ($(wildcard $(src)/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/memory/Makefile.inc),) LIB_SPD_DEPS = $(SPD_SOURCES) -APCB_SOURCES = $(obj)/APCB_MDN_D5.gen -APCB_SOURCES_RECOVERY = $(obj)/APCB_MDN_D5.gen +APCB_SOURCES = $(obj)/$(APCB_NAME).gen +APCB_SOURCES_RECOVERY = $(obj)/$(APCB_NAME).gen -$(obj)/APCB_MDN_D5.gen: $(SPD_SOURCES) \ +$(obj)/$(APCB_NAME).gen: $(SPD_SOURCES) \ $(APCB_V3_EDIT_TOOL) \ - $(MAINBOARD_BLOBS_DIR)/APCB_MDN_D5.bin - $(APCB_V3_EDIT_TOOL) $(MAINBOARD_BLOBS_DIR)/APCB_MDN_D5.bin \ - $(obj)/APCB_MDN_D5.gen \ + $(MAINBOARD_BLOBS_DIR)/$(APCB_NAME).bin + $(APCB_V3_EDIT_TOOL) $(MAINBOARD_BLOBS_DIR)/$(APCB_NAME).bin \ + $(obj)/$(APCB_NAME).gen \ --spd_sources $(SPD_SOURCES) \ --mem_type 'lp5' else -- To view, visit https://review.coreboot.org/c/coreboot/+/67501 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8684db2f7b2d68f0354e37bd8cdfc4f9cab44b8a Gerrit-Change-Number: 67501 Gerrit-PatchSet: 3 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)amd.corp-partner.google.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: mb/google/(guybrush|skyrim): Use a variable for APCB filename
by Felix Held (Code Review) 20 Oct '22

20 Oct '22

Attention is currently required from: Jason Glenesk, Martin L Roth. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67501 ) Change subject: mb/google/(guybrush|skyrim): Use a variable for APCB filename ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/67501 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8684db2f7b2d68f0354e37bd8cdfc4f9cab44b8a Gerrit-Change-Number: 67501 Gerrit-PatchSet: 2 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)amd.corp-partner.google.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Comment-Date: Thu, 20 Oct 2022 17:19:44 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/rex: Skip sending the MBP HOB to save boot time
by Felix Held (Code Review) 20 Oct '22

20 Oct '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68418 ) Change subject: mb/google/rex: Skip sending the MBP HOB to save boot time ...................................................................... mb/google/rex: Skip sending the MBP HOB to save boot time This change is to skip sending the MBP HOB since coreboot doesn't use it and also helps to reduce the boot time by ~40 ms. Boot time data Before: * 955:returning from FspSiliconInit 1,656,985 (274,416) After: * 955:returning from FspSiliconInit 1,593,036 (233,286) BUG=b:252410202 TEST=Verified that boot time is reduced by ~40 msec. Signed-off-by: Wonkyu Kim <wonkyu.kim(a)intel.com> Change-Id: I0d4f66940529b8d38d9658c769feba8b5c9b715e Reviewed-on: https://review.coreboot.org/c/coreboot/+/68418 Reviewed-by: Tarun Tuli <taruntuli(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Subrata Banik <subratabanik(a)google.com> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> Reviewed-by: Kapil Porwal <kapilporwal(a)google.com> --- M src/mainboard/google/rex/variants/rex0/overridetree.cb 1 file changed, 30 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved Subrata Banik: Looks good to me, approved Tarun Tuli: Looks good to me, approved Kapil Porwal: Looks good to me, approved diff --git a/src/mainboard/google/rex/variants/rex0/overridetree.cb b/src/mainboard/google/rex/variants/rex0/overridetree.cb index 5cb3ad5..2e1c159 100644 --- a/src/mainboard/google/rex/variants/rex0/overridetree.cb +++ b/src/mainboard/google/rex/variants/rex0/overridetree.cb @@ -69,6 +69,8 @@ [PchSerialIoIndexI2C5] = PchSerialIoPci, }" + register "skip_mbp_hob" = "1" + # Intel Common SoC Config #+-------------------+---------------------------+ #| Field | Value | -- To view, visit https://review.coreboot.org/c/coreboot/+/68418 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0d4f66940529b8d38d9658c769feba8b5c9b715e Gerrit-Change-Number: 68418 Gerrit-PatchSet: 11 Gerrit-Owner: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: soc/intel/meteorlake: Add support to skip the MBP HOB
by Felix Held (Code Review) 20 Oct '22

20 Oct '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68416 ) Change subject: soc/intel/meteorlake: Add support to skip the MBP HOB ...................................................................... soc/intel/meteorlake: Add support to skip the MBP HOB This patch adds the support to enable/disable skipping MBP HOB from the devicetree based on mainboard requirement. Porting the feature from commit 2bc54e7c001c ("soc/intel/alderlake: Add support to skip the MBP HOB") TEST=Build and boot to verify that the right value has been passed to the FSP. Signed-off-by: Wonkyu Kim <wonkyu.kim(a)intel.com> Change-Id: I360d33617b9d2626fce5600e861214b0747f57b4 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68416 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Subrata Banik <subratabanik(a)google.com> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> Reviewed-by: Kapil Porwal <kapilporwal(a)google.com> --- M src/soc/intel/meteorlake/chip.h M src/soc/intel/meteorlake/romstage/fsp_params.c 2 files changed, 32 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved Subrata Banik: Looks good to me, approved Kapil Porwal: Looks good to me, approved diff --git a/src/soc/intel/meteorlake/chip.h b/src/soc/intel/meteorlake/chip.h index 1d335c5..b6e3ab2 100644 --- a/src/soc/intel/meteorlake/chip.h +++ b/src/soc/intel/meteorlake/chip.h @@ -325,6 +325,12 @@ * Default 0. */ uint8_t lan_clk; + + /* + * Enable or Disable Skipping MBP HOB. + * Default is set to 0 and set to 1 to skip the MBP HOB. + */ + bool skip_mbp_hob; }; typedef struct soc_intel_meteorlake_config config_t; diff --git a/src/soc/intel/meteorlake/romstage/fsp_params.c b/src/soc/intel/meteorlake/romstage/fsp_params.c index 60324e9..0ca3756 100644 --- a/src/soc/intel/meteorlake/romstage/fsp_params.c +++ b/src/soc/intel/meteorlake/romstage/fsp_params.c @@ -173,6 +173,9 @@ /* Skip GPIO configuration from FSP */ m_cfg->GpioOverride = 0x1; + + /* Skip MBP HOB */ + m_cfg->SkipMbpHob = config->skip_mbp_hob; } static void fill_fspm_audio_params(FSP_M_CONFIG *m_cfg, -- To view, visit https://review.coreboot.org/c/coreboot/+/68416 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I360d33617b9d2626fce5600e861214b0747f57b4 Gerrit-Change-Number: 68416 Gerrit-PatchSet: 4 Gerrit-Owner: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: soc/amd/*/uart: cleanup includes
by Felix Held (Code Review) 20 Oct '22

20 Oct '22

Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/68633 ) Change subject: soc/amd/*/uart: cleanup includes ...................................................................... soc/amd/*/uart: cleanup includes Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I59ab9c2eaa65d974d418123e87e9afe65b1168cc --- M src/soc/amd/cezanne/uart.c M src/soc/amd/mendocino/uart.c M src/soc/amd/morgana/uart.c M src/soc/amd/picasso/uart.c M src/soc/amd/stoneyridge/uart.c 5 files changed, 12 insertions(+), 9 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/68633/1 diff --git a/src/soc/amd/cezanne/uart.c b/src/soc/amd/cezanne/uart.c index 3ac7deb..189a1e5 100644 --- a/src/soc/amd/cezanne/uart.c +++ b/src/soc/amd/cezanne/uart.c @@ -3,8 +3,6 @@ #include <amdblocks/gpio.h> #include <amdblocks/uart.h> #include <commonlib/helpers.h> -#include <console/console.h> -#include <device/device.h> #include <device/mmio.h> #include <soc/aoac_defs.h> #include <soc/gpio.h> diff --git a/src/soc/amd/mendocino/uart.c b/src/soc/amd/mendocino/uart.c index d4bf2fe..03fc593 100644 --- a/src/soc/amd/mendocino/uart.c +++ b/src/soc/amd/mendocino/uart.c @@ -3,8 +3,6 @@ #include <amdblocks/gpio.h> #include <amdblocks/uart.h> #include <commonlib/helpers.h> -#include <console/console.h> -#include <device/device.h> #include <device/mmio.h> #include <soc/aoac_defs.h> #include <soc/gpio.h> diff --git a/src/soc/amd/morgana/uart.c b/src/soc/amd/morgana/uart.c index 401a134..92cb2fe 100644 --- a/src/soc/amd/morgana/uart.c +++ b/src/soc/amd/morgana/uart.c @@ -5,8 +5,6 @@ #include <amdblocks/gpio.h> #include <amdblocks/uart.h> #include <commonlib/helpers.h> -#include <console/console.h> -#include <device/device.h> #include <device/mmio.h> #include <soc/aoac_defs.h> #include <soc/gpio.h> diff --git a/src/soc/amd/picasso/uart.c b/src/soc/amd/picasso/uart.c index e3e3aa9..2120ad7 100644 --- a/src/soc/amd/picasso/uart.c +++ b/src/soc/amd/picasso/uart.c @@ -1,11 +1,9 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <console/console.h> -#include <commonlib/helpers.h> -#include <device/device.h> #include <device/mmio.h> #include <amdblocks/gpio.h> #include <amdblocks/uart.h> +#include <commonlib/helpers.h> #include <soc/aoac_defs.h> #include <soc/gpio.h> #include <soc/iomap.h> diff --git a/src/soc/amd/stoneyridge/uart.c b/src/soc/amd/stoneyridge/uart.c index 86e2626..7fbba07 100644 --- a/src/soc/amd/stoneyridge/uart.c +++ b/src/soc/amd/stoneyridge/uart.c @@ -2,6 +2,7 @@ #include <amdblocks/gpio.h> #include <amdblocks/uart.h> +#include <commonlib/helpers.h> #include <soc/aoac_defs.h> #include <soc/gpio.h> #include <soc/iomap.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/68633 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I59ab9c2eaa65d974d418123e87e9afe65b1168cc Gerrit-Change-Number: 68633 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newchange

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coreboot-gerrit October 2022