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Hello Martin Roth,
I'd like you to do a code review.
Please visit
https://review.coreboot.org/c/coreboot/+/68595
to review the following change.
Change subject: payloads: Make PAYLOAD_NONE a bool outside of the choice
......................................................................
payloads: Make PAYLOAD_NONE a bool outside of the choice
Instead of having the config option PAYLOADS_NONE inside the choice of
payloads, make that a separate choice that enables the payload menu.
If the no_payload option is selected, this hides the other options
and keeps them out of the saved config file and config.h
Signed-off-by: Martin Roth <martin.roth(a)amd.corp-partner.google.com>
Change-Id: I932c65630261a5b39809abf4dfbda5bf932c6684
---
M payloads/Kconfig
1 file changed, 26 insertions(+), 9 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/68595/1
diff --git a/payloads/Kconfig b/payloads/Kconfig
index 2e627d7..09e8e8e 100644
--- a/payloads/Kconfig
+++ b/payloads/Kconfig
@@ -1,15 +1,8 @@
menu "Payload"
-config NO_DEFAULT_PAYLOAD
- bool
-
-choice
- prompt "Add a payload"
- default PAYLOAD_NONE if NO_DEFAULT_PAYLOAD || !ARCH_X86
- default PAYLOAD_SEABIOS if ARCH_X86
-
config PAYLOAD_NONE
- bool "None"
+ bool "Don't add a payload"
+ default n
help
Select this option if you want to create an "empty" coreboot
ROM image for a certain mainboard, i.e. a coreboot ROM image
@@ -18,6 +11,11 @@
For such an image to be useful, you have to use 'cbfstool'
to add a payload to the ROM image later.
+if !PAYLOAD_NONE
+choice
+ prompt "Payload to add"
+ default PAYLOAD_SEABIOS if ARCH_X86
+
config PAYLOAD_ELF
bool "An ELF executable payload"
help
@@ -178,4 +176,7 @@
source "payloads/external/*/Kconfig.secondary"
endmenu # "Secondary Payloads"
+
+endif # !PAYLOAD_NONE
+
endmenu
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Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68467 )
Change subject: Docs/releases: Finalize relnotes for the 4.18 release
......................................................................
Patch Set 6: Code-Review+2
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Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68467 )
Change subject: Docs/releases: Finalize relnotes for the 4.18 release
......................................................................
Patch Set 6:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/68467/comment/88914f94_949f813a
PS4, Line 7: Final
> Make it a verb? `Finalize`
Done
File Documentation/releases/coreboot-4.18-relnotes.md:
https://review.coreboot.org/c/coreboot/+/68467/comment/2808c83c_82d10bea
PS4, Line 247: CB:67754 + CB:67662
> Can we make these links?
Done
https://review.coreboot.org/c/coreboot/+/68467/comment/4a9e5a46_e23aeca9
PS4, Line 256: long boot times.
> See CB:68550 for the fix
Done
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Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68017 )
Change subject: mb/lenovo/*/mainboard.c: Clean up includes
......................................................................
Patch Set 3: Code-Review+2
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Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67917 )
Change subject: arch/x86/include: Split msr access into separate file
......................................................................
Patch Set 3:
(1 comment)
File src/include/cpu/x86/msr_access.h:
https://review.coreboot.org/c/coreboot/+/67917/comment/32fa7bcc_0364678e
PS3, Line 30: /* The following functions require the __always_inline due to AMD
: * function STOP_CAR_AND_CPU that disables cache as
: * RAM, the cache as RAM stack can no longer be used. Called
: * functions must be inlined to avoid stack usage. Also, the
: * compiler must keep local variables register based and not
: * allocated them from the stack. With gcc 4.5.0, some functions
: * declared as inline are not being inlined. This patch forces
: * these functions to always be inlined by adding the qualifier
: * __always_inline to their declaration.
: */
> I agree, but this patch is a simple move.
Oh, forgot to explicitly indicate that this is meant for another patch.
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Martin Roth has uploaded a new patch set (#5) to the change originally created by Martin L Roth. ( https://review.coreboot.org/c/coreboot/+/68467 )
Change subject: Docs/releases: Finalize relnotes for the 4.18 release
......................................................................
Docs/releases: Finalize relnotes for the 4.18 release
The coreboot 4.18 release has been tagged, so the release notes can
now be finalized.
Updated with known issues.
Signed-off-by: Martin Roth <gaumless(a)gmail.com>
Change-Id: I77676ddc42488e9635f1e6f995386490dca441c0
---
M Documentation/releases/coreboot-4.18-relnotes.md
1 file changed, 50 insertions(+), 15 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/68467/5
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Change subject: soc/amd/*/smi.h: Use BIT() for clarity
......................................................................
Patch Set 2:
(1 comment)
File src/soc/amd/stoneyridge/include/soc/smi.h:
https://review.coreboot.org/c/coreboot/+/68548/comment/edd03688_1e117841
PS1, Line 152: BIT
> needs <types. […]
Done - good catch, thanks!
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Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Matt DeVillier, Angel Pons, Elyes Haouas, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/68548
to look at the new patch set (#2).
Change subject: soc/amd/*/smi.h: Use BIT() for clarity
......................................................................
soc/amd/*/smi.h: Use BIT() for clarity
Use the BIT() macro for single-bit constants.
Signed-off-by: Fred Reitberger <reitbergerfred(a)gmail.com>
Change-Id: I490f0093d55813260fcdb7303a94accfa90e75e4
---
M src/soc/amd/cezanne/include/soc/smi.h
M src/soc/amd/mendocino/include/soc/smi.h
M src/soc/amd/picasso/include/soc/smi.h
M src/soc/amd/stoneyridge/include/soc/smi.h
4 files changed, 53 insertions(+), 39 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/68548/2
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