coreboot-gerrit January 2022

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Change in coreboot[master]: libpayload: Refer to vboot source consistently
by Patrick Georgi (Code Review) 27 Jan '22

27 Jan '22

Attention is currently required from: Jakub Czapiga. Patrick Georgi has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/61427 ) Change subject: libpayload: Refer to vboot source consistently ...................................................................... libpayload: Refer to vboot source consistently Don't assume that libpayload is built from a fully checked out coreboot tree. There's already an override when building vboot, so reuse that override when referring to its header files. While moving stuff around, move VBOOT_SOURCE from Makefile (generic build system stuff) to Makefile.inc (libpayload specific handling) Signed-off-by: Patrick Georgi <pgeorgi(a)google.com> Change-Id: I503c69a593dd68b3a974fbdbb64d7bb25d6c7f63 --- M payloads/libpayload/Makefile M payloads/libpayload/Makefile.inc M payloads/libpayload/tests/Makefile.inc 3 files changed, 4 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/61427/1 diff --git a/payloads/libpayload/Makefile b/payloads/libpayload/Makefile index 0104a11..2014cd4 100644 --- a/payloads/libpayload/Makefile +++ b/payloads/libpayload/Makefile @@ -45,7 +45,6 @@ export objutil ?= $(obj)/util export objk := $(objutil)/lp_kconfig export absobj := $(abspath $(obj)) -VBOOT_SOURCE ?= $(coreboottop)/3rdparty/vboot export KCONFIG_AUTOHEADER := $(obj)/config.h export KCONFIG_AUTOCONFIG := $(obj)/auto.conf diff --git a/payloads/libpayload/Makefile.inc b/payloads/libpayload/Makefile.inc index 01c3ede..ebafeb6 100644 --- a/payloads/libpayload/Makefile.inc +++ b/payloads/libpayload/Makefile.inc @@ -59,10 +59,12 @@ subdirs-$(CONFIG_LP_LZ4) += liblz4 subdirs-$(CONFIG_LP_VBOOT_LIB) += vboot +VBOOT_SOURCE ?= $(coreboottop)/3rdparty/vboot + INCLUDES := -Iinclude -Iinclude/$(ARCHDIR-y) -I$(obj) INCLUDES += -include include/kconfig.h -include include/compiler.h INCLUDES += -I$(coreboottop)/src/commonlib/bsd/include -INCLUDES += -I$(coreboottop)/3rdparty/vboot/firmware/include +INCLUDES += -I$(VBOOT_SOURCE)/firmware/include CFLAGS += $(INCLUDES) -Os -pipe -nostdinc -ggdb3 CFLAGS += -nostdlib -fno-builtin -ffreestanding -fomit-frame-pointer diff --git a/payloads/libpayload/tests/Makefile.inc b/payloads/libpayload/tests/Makefile.inc index e1c2a23..529524c 100644 --- a/payloads/libpayload/tests/Makefile.inc +++ b/payloads/libpayload/tests/Makefile.inc @@ -34,7 +34,7 @@ TEST_CFLAGS += -Iinclude -Iinclude/mock TEST_CFLAGS += -I$(coreboottop)/src/commonlib/bsd/include TEST_CFLAGS += -I$(dir $(TEST_KCONFIG_AUTOHEADER)) -TEST_CFLAGS += -I$(coreboottop)/3rdparty/vboot/firmware/include +TEST_CFLAGS += -I$(VBOOT_SOURCE)/firmware/include # Test specific includes TEST_CFLAGS += -I$(testsrc)/include -- To view, visit https://review.coreboot.org/c/coreboot/+/61427 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I503c69a593dd68b3a974fbdbb64d7bb25d6c7f63 Gerrit-Change-Number: 61427 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Attention: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/brya/var/brask: set tcc offset value to 10℃
by Felix Held (Code Review) 27 Jan '22

27 Jan '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/61142 ) Change subject: mb/google/brya/var/brask: set tcc_offset value to 10℃ ...................................................................... mb/google/brya/var/brask: set tcc_offset value to 10℃ Set tcc_offset value to 10 in devicetree for Thermal Control Circuit (TCC) activation feature. This value is suggested by Thermal team. BUG=b:214890058 BRANCH=None TEST=build pass Signed-off-by: David Wu <david_wu(a)quanta.corp-partner.google.com> Change-Id: I86acb172ed427d45973b9360e0413978cbd46645 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61142 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> --- M src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb 1 file changed, 2 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Tim Wawrzynczak: Looks good to me, approved diff --git a/src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb index a36c849..466f08a 100644 --- a/src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb +++ b/src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb @@ -17,6 +17,8 @@ # DPTF enable register "dptf_enable" = "1" + register "tcc_offset" = "10" # TCC of 90 + # Enable CNVi BT register "CnviBtCore" = "true" -- To view, visit https://review.coreboot.org/c/coreboot/+/61142 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I86acb172ed427d45973b9360e0413978cbd46645 Gerrit-Change-Number: 61142 Gerrit-PatchSet: 7 Gerrit-Owner: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Alan Huang <alan-huang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Peter Ou <peter.ou(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: soc/amd/sabrina/gpio: update GPIO definitions and gpio_event_table
by Marshall Dawson (Code Review) 27 Jan '22

27 Jan '22

Attention is currently required from: Jason Glenesk, Raul Rangel, Felix Held. Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61084 ) Change subject: soc/amd/sabrina/gpio: update GPIO definitions and gpio_event_table ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/61084 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iabb85a3d24c881055e94400d08d01505df44a07a Gerrit-Change-Number: 61084 Gerrit-PatchSet: 5 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 27 Jan 2022 14:43:46 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: amdfwtool: Add SPL support
by Bao Zheng (Code Review) 27 Jan '22

27 Jan '22

Attention is currently required from: Zheng Bao. Hello Zheng Bao, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/61426 to review the following change. Change subject: amdfwtool: Add SPL support ...................................................................... amdfwtool: Add SPL support BUG=b:216096562 Change-Id: I4665f2372ccd599ab835c8784da08cde5558a795 Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M util/amdfwtool/amdfwtool.c M util/amdfwtool/amdfwtool.h M util/amdfwtool/data_parse.c 3 files changed, 5 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/61426/1 diff --git a/util/amdfwtool/amdfwtool.c b/util/amdfwtool/amdfwtool.c index fb6769a..1d5db12 100644 --- a/util/amdfwtool/amdfwtool.c +++ b/util/amdfwtool/amdfwtool.c @@ -256,6 +256,7 @@ { .type = AMD_FW_DRTM_TA, .level = PSP_LVL2 }, { .type = AMD_FW_KEYDB_BL, .level = PSP_BOTH }, { .type = AMD_FW_KEYDB_TOS, .level = PSP_LVL2 }, + { .type = AMD_FW_SPL, .level = PSP_LVL2 }, { .type = AMD_FW_DMCU_ERAM, .level = PSP_LVL2 }, { .type = AMD_FW_DMCU_ISR, .level = PSP_LVL2 }, { .type = AMD_RPMC_NVRAM, .level = PSP_LVL2 }, diff --git a/util/amdfwtool/amdfwtool.h b/util/amdfwtool/amdfwtool.h index 2ffbfc6..b14a437 100644 --- a/util/amdfwtool/amdfwtool.h +++ b/util/amdfwtool/amdfwtool.h @@ -48,6 +48,7 @@ AMD_FW_PSP_VERSTAGE = 0x52, AMD_FW_VERSTAGE_SIG = 0x53, AMD_RPMC_NVRAM = 0x54, + AMD_FW_SPL = 0x55, AMD_FW_DMCU_ERAM = 0x58, AMD_FW_DMCU_ISR = 0x59, AMD_FW_PSP_BOOTLOADER_AB = 0x73, diff --git a/util/amdfwtool/data_parse.c b/util/amdfwtool/data_parse.c index 8f93183..c116bb2 100644 --- a/util/amdfwtool/data_parse.c +++ b/util/amdfwtool/data_parse.c @@ -282,6 +282,9 @@ } else if (strcmp(fw_name, "KEYDB_TOS_FILE") == 0) { fw_type = AMD_FW_KEYDB_TOS; subprog = 0; + } else if (strcmp(fw_name, "SPL_TABLE_FILE") == 0) { + fw_type = AMD_SPL; + subprog = 0; } else if (strcmp(fw_name, "DMCUERAMDCN21_FILE") == 0) { fw_type = AMD_FW_DMCU_ERAM; subprog = 0; -- To view, visit https://review.coreboot.org/c/coreboot/+/61426 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4665f2372ccd599ab835c8784da08cde5558a795 Gerrit-Change-Number: 61426 Gerrit-PatchSet: 1 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Zheng Bao Gerrit-Attention: Zheng Bao Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/amd/cezanne: Add the fw SPL to fw.cfg
by Bao Zheng (Code Review) 27 Jan '22

27 Jan '22

Attention is currently required from: Zheng Bao. Hello Zheng Bao, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/61425 to review the following change. Change subject: soc/amd/cezanne: Add the fw SPL to fw.cfg ...................................................................... soc/amd/cezanne: Add the fw SPL to fw.cfg BUG=b:216096562 Change-Id: I0aa456b8b4eec506fbb319293f0903b293325cb0 Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M src/soc/amd/cezanne/fw.cfg 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/61425/1 diff --git a/src/soc/amd/cezanne/fw.cfg b/src/soc/amd/cezanne/fw.cfg index 9757d72..f26e215 100644 --- a/src/soc/amd/cezanne/fw.cfg +++ b/src/soc/amd/cezanne/fw.cfg @@ -28,6 +28,7 @@ DRTMTA_FILE TypeId0x47_DrtmTA_CZN.sbin KEYDBBL_FILE TypeId0x50_KeyDbBl_CZN.sbin KEYDB_TOS_FILE TypeId0x51_KeyDbTos_CZN.sbin +SPL_TABLE_FILE TypeId0x55_SplTableBl_CZN.sbin DMCUERAMDCN21_FILE TypeId0x58_DmcuEramDcn21.sbin DMCUINTVECTORSDCN21_FILE TypeId0x59_DmcuIntvectorsDcn21.sbin PSPBTLDR_AB_FILE TypeId0x73_PspBootLoader_AB_CZN.sbin -- To view, visit https://review.coreboot.org/c/coreboot/+/61425 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0aa456b8b4eec506fbb319293f0903b293325cb0 Gerrit-Change-Number: 61425 Gerrit-PatchSet: 1 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Zheng Bao Gerrit-Attention: Zheng Bao Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/intel/common/gpio: Skip GPIO PAD locking in recovery mode
by Subrata Banik (Code Review) 27 Jan '22

27 Jan '22

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/61424 ) Change subject: soc/intel/common/gpio: Skip GPIO PAD locking in recovery mode ...................................................................... soc/intel/common/gpio: Skip GPIO PAD locking in recovery mode The recovery mode is meant to provide fixes for the platform deformity hence, skip locking the GPIO PAD configuration to provide the same flexibility to the platform owner while booting in recovery mode. BUG=b:211950520 TEST=Able to build and boot the brya. Signed-off-by: Subrata Banik <subratabanik(a)google.com> Change-Id: I0f0a3cfb2be7f2a5485679f6a3d8cb4fb407fcf4 --- M src/soc/intel/common/block/gpio/gpio.c 1 file changed, 3 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/61424/1 diff --git a/src/soc/intel/common/block/gpio/gpio.c b/src/soc/intel/common/block/gpio/gpio.c index dcec12a..3c5d3f3 100644 --- a/src/soc/intel/common/block/gpio/gpio.c +++ b/src/soc/intel/common/block/gpio/gpio.c @@ -13,6 +13,7 @@ #include <intelblocks/itss.h> #include <intelblocks/p2sb.h> #include <intelblocks/pcr.h> +#include <security/vboot/vboot_common.h> #include <soc/pci_devs.h> #include <soc/pm.h> #include <stdlib.h> @@ -616,8 +617,8 @@ int gpio_lock_pad(const gpio_t pad, enum gpio_lock_action lock_action) { - /* Skip locking GPIO PAD in early stages */ - if (ENV_ROMSTAGE_OR_BEFORE) + /* Skip locking GPIO PAD in early stages or in recovery mode */ + if (ENV_ROMSTAGE_OR_BEFORE || vboot_recovery_mode_enabled()) return -1; const struct gpio_lock_config pads = { -- To view, visit https://review.coreboot.org/c/coreboot/+/61424 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0f0a3cfb2be7f2a5485679f6a3d8cb4fb407fcf4 Gerrit-Change-Number: 61424 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/intel/graphics: Add override api for graphics_get_memory_base()
by Ethan Tsao (Code Review) 27 Jan '22

27 Jan '22

Attention is currently required from: Subrata Banik, Ravishankar Sarawadi, Tim Wawrzynczak, Paul Menzel, Raj Astekar, Patrick Rudolph. Ethan Tsao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61389 ) Change subject: soc/intel/graphics: Add override api for graphics_get_memory_base() ...................................................................... Patch Set 5: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/61389/comment/1e1e3d72_c3bee4cd PS5, Line 9: graphic memory may vary by every platfrom. > Thanks Ethan. […] Thanks suggestion, Subrata. I will do it. -- To view, visit https://review.coreboot.org/c/coreboot/+/61389 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6b1e34ada9b895dabcdc8116d2470e8831ed0a9e Gerrit-Change-Number: 61389 Gerrit-PatchSet: 5 Gerrit-Owner: Ethan Tsao <ethan.tsao(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subi.banik(a)gmail.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subi.banik(a)gmail.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Thu, 27 Jan 2022 14:35:27 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Ethan Tsao <ethan.tsao(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/graphics: Add override api for graphics_get_memory_base()
by Subrata Banik (Code Review) 27 Jan '22

27 Jan '22

Attention is currently required from: Subrata Banik, Ethan Tsao, Ravishankar Sarawadi, Tim Wawrzynczak, Paul Menzel, Raj Astekar, Patrick Rudolph. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61389 ) Change subject: soc/intel/graphics: Add override api for graphics_get_memory_base() ...................................................................... Patch Set 5: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/61389/comment/99c8cb0c_6ce8988b PS5, Line 9: graphic memory may vary by every platfrom. > Hi Subrata, […] Thanks Ethan. Can you please create a bug to track this activity and update here in commit msg section. -- To view, visit https://review.coreboot.org/c/coreboot/+/61389 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6b1e34ada9b895dabcdc8116d2470e8831ed0a9e Gerrit-Change-Number: 61389 Gerrit-PatchSet: 5 Gerrit-Owner: Ethan Tsao <ethan.tsao(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subi.banik(a)gmail.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subi.banik(a)gmail.com> Gerrit-Attention: Ethan Tsao <ethan.tsao(a)intel.com> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Thu, 27 Jan 2022 14:17:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Ethan Tsao <ethan.tsao(a)intel.com> Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/graphics: Add override api for graphics_get_memory_base()
by Ethan Tsao (Code Review) 27 Jan '22

27 Jan '22

Attention is currently required from: Subrata Banik, Ravishankar Sarawadi, Tim Wawrzynczak, Paul Menzel, Raj Astekar, Patrick Rudolph. Ethan Tsao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61389 ) Change subject: soc/intel/graphics: Add override api for graphics_get_memory_base() ...................................................................... Patch Set 5: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/61389/comment/7686232c_d6cc4080 PS5, Line 9: graphic memory may vary by every platfrom. > Looking at EDS 640858, I could able to sense the background behind this change which is somewhat mis […] Hi Subrata, You are right. This patch cannot be seen in current EDS. We are working with internal team to update external document now. The main purpose of this patch is for aligning internal specification and fixing issue in future platform. -- To view, visit https://review.coreboot.org/c/coreboot/+/61389 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6b1e34ada9b895dabcdc8116d2470e8831ed0a9e Gerrit-Change-Number: 61389 Gerrit-PatchSet: 5 Gerrit-Owner: Ethan Tsao <ethan.tsao(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subi.banik(a)gmail.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subi.banik(a)gmail.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Thu, 27 Jan 2022 14:11:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common: Implement ACPI CPPCv3 package to support hybrid core
by Sridhar Siricilla (Code Review) 27 Jan '22

27 Jan '22

Attention is currently required from: Arthur Heymans, Nico Huber, Subrata Banik, Paul Menzel, ravindr1, Michael Niewöhner, Patrick Rudolph. Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59359 ) Change subject: soc/intel/common: Implement ACPI CPPCv3 package to support hybrid core ...................................................................... Patch Set 15: (1 comment) Patchset: PS15: > Since SSDT dump of CPPC is huge, I will create a bug and add the SSDT dump of CPPC to it. I have attached the requested info at b:216610084 -- To view, visit https://review.coreboot.org/c/coreboot/+/59359 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icd5ea9e70bebd1e66d3cea2bcf8a6678e5cc95ca Gerrit-Change-Number: 59359 Gerrit-PatchSet: 15 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ravindr1 <ravindra(a)intel.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Sridhar Siricilla <sridhar.siricilla(a)intel.corp-partner.google.com> Gerrit-CC: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: ravindr1 <ravindra(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Thu, 27 Jan 2022 14:03:52 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Comment-In-Reply-To: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-MessageType: comment

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coreboot-gerrit January 2022