coreboot-gerrit January 2022

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Change in coreboot[master]: soc/intel/alderlake: Add eMMC PCR Port ID for Alder Lake N
by Krishna P Bhat D (Code Review) 28 Jan '22

28 Jan '22

Attention is currently required from: Reka Norman, Kangheui Won, Paul Menzel, Rizwan Qureshi, Patrick Rudolph. Krishna P Bhat D has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61126 ) Change subject: soc/intel/alderlake: Add eMMC PCR Port ID for Alder Lake N ...................................................................... Patch Set 3: (2 comments) File src/soc/intel/alderlake/include/soc/pcr_ids.h: https://review.coreboot.org/c/coreboot/+/61126/comment/b56676b3_34dac9b8 PS2, Line 37: #define PID_EMMC 0xa1 > Please mention the source, like datasheet name and revision, in the commit message, where this is de […] Done File src/soc/intel/alderlake/include/soc/pcr_ids.h: https://review.coreboot.org/c/coreboot/+/61126/comment/7f23fc39_8b33892e PS1, Line 37: > use space instead of a tab Done -- To view, visit https://review.coreboot.org/c/coreboot/+/61126 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6dc494d1748e66b8b4058954f127ec226863e8af Gerrit-Change-Number: 61126 Gerrit-PatchSet: 3 Gerrit-Owner: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Reka Norman <rekanorman(a)google.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Reka Norman <rekanorman(a)google.com> Gerrit-Attention: Kangheui Won <khwon(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Thu, 27 Jan 2022 15:06:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Enable eMMC based on dev enabled
by Krishna P Bhat D (Code Review) 28 Jan '22

28 Jan '22

Attention is currently required from: Kangheui Won, Tim Wawrzynczak, Rizwan Qureshi, Reka Norman. Krishna P Bhat D has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61129 ) Change subject: soc/intel/alderlake: Enable eMMC based on dev enabled ...................................................................... Patch Set 7: (1 comment) File src/soc/intel/alderlake/fsp_params.c: https://review.coreboot.org/c/coreboot/+/61129/comment/e3b2c6ce_bdbdcd45 PS6, Line 187: .slot = PCH_DEV_SLOT_EMMC, > This only exists on PCH-N, so kmust be guarded by […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/61129 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I44f17420f7a2a1ca0fbb6cfb1886b1617c5a5064 Gerrit-Change-Number: 61129 Gerrit-PatchSet: 7 Gerrit-Owner: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Usha P <usha.p(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kangheui Won <khwon(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Reka Norman <rekanorman(a)chromium.org> Gerrit-Comment-Date: Thu, 27 Jan 2022 15:05:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: amdfwtool: Add SPL support
by Bao Zheng (Code Review) 28 Jan '22

28 Jan '22

Attention is currently required from: Zheng Bao. Hello Zheng Bao, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/61426 to look at the new patch set (#2). Change subject: amdfwtool: Add SPL support ...................................................................... amdfwtool: Add SPL support BUG=b:216096562 Change-Id: I4665f2372ccd599ab835c8784da08cde5558a795 Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M util/amdfwtool/amdfwtool.c M util/amdfwtool/amdfwtool.h M util/amdfwtool/data_parse.c 3 files changed, 5 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/61426/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/61426 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4665f2372ccd599ab835c8784da08cde5558a795 Gerrit-Change-Number: 61426 Gerrit-PatchSet: 2 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Zheng Bao Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Zheng Bao Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/alderlake: Add eMMC PCR Port ID for Alder Lake N
by Krishna P Bhat D (Code Review) 28 Jan '22

28 Jan '22

Attention is currently required from: Reka Norman, Kangheui Won, Rizwan Qureshi, Patrick Rudolph. Hello Reka Norman, build bot (Jenkins), Kangheui Won, Tim Wawrzynczak, Rizwan Qureshi, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/61126 to look at the new patch set (#3). Change subject: soc/intel/alderlake: Add eMMC PCR Port ID for Alder Lake N ...................................................................... soc/intel/alderlake: Add eMMC PCR Port ID for Alder Lake N Alder Lake N has eMMC storage device. Add PCR Port ID for it. Reference: Alder Lake N platform EDS Doc# 645548. Change-Id: I6dc494d1748e66b8b4058954f127ec226863e8af Signed-off-by: Krishna Prasad Bhat <krishna.p.bhat.d(a)intel.com> --- M src/soc/intel/alderlake/include/soc/pcr_ids.h 1 file changed, 5 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/61126/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/61126 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6dc494d1748e66b8b4058954f127ec226863e8af Gerrit-Change-Number: 61126 Gerrit-PatchSet: 3 Gerrit-Owner: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Reka Norman <rekanorman(a)google.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Reka Norman <rekanorman(a)google.com> Gerrit-Attention: Kangheui Won <khwon(a)chromium.org> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/alderlake: Enable eMMC based on dev enabled
by Krishna P Bhat D (Code Review) 28 Jan '22

28 Jan '22

Attention is currently required from: Patrick Rudolph. Hello build bot (Jenkins), Tim Wawrzynczak, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/61129 to look at the new patch set (#7). Change subject: soc/intel/alderlake: Enable eMMC based on dev enabled ...................................................................... soc/intel/alderlake: Enable eMMC based on dev enabled This patch adds the following, 1. Add eMMC device function in pci_devs.h. 2. Enable eMMC device and configuration based on dev enabled. 3. Add SOC acpi name for eMMC. Change-Id: I44f17420f7a2a1ca0fbb6cfb1886b1617c5a5064 Signed-off-by: Krishna Prasad Bhat <krishna.p.bhat.d(a)intel.com> --- M src/soc/intel/alderlake/chip.c M src/soc/intel/alderlake/chip.h M src/soc/intel/alderlake/fsp_params.c M src/soc/intel/alderlake/include/soc/pci_devs.h 4 files changed, 28 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/61129/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/61129 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I44f17420f7a2a1ca0fbb6cfb1886b1617c5a5064 Gerrit-Change-Number: 61129 Gerrit-PatchSet: 7 Gerrit-Owner: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: libpayload: Refer to vboot source consistently
by Jakub Czapiga (Code Review) 28 Jan '22

28 Jan '22

Attention is currently required from: Patrick Georgi. Jakub Czapiga has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61427 ) Change subject: libpayload: Refer to vboot source consistently ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/61427 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I503c69a593dd68b3a974fbdbb64d7bb25d6c7f63 Gerrit-Change-Number: 61427 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Attention: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Comment-Date: Thu, 27 Jan 2022 14:54:26 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: cpu/intel/socket_p: Drop 'select SSE'
by Felix Held (Code Review) 28 Jan '22

28 Jan '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/61319 ) Change subject: cpu/intel/socket_p: Drop 'select SSE' ...................................................................... cpu/intel/socket_p: Drop 'select SSE' SSE is already selected by SSE2 through model_{1067x,6fx}/Kconfig Change-Id: I3641118905f1fcc1e34d7fe4f7ca3082c3cf0d3b Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/61319 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/cpu/intel/socket_p/Kconfig 1 file changed, 0 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved diff --git a/src/cpu/intel/socket_p/Kconfig b/src/cpu/intel/socket_p/Kconfig index a7c8ab1..4b99ace 100644 --- a/src/cpu/intel/socket_p/Kconfig +++ b/src/cpu/intel/socket_p/Kconfig @@ -3,7 +3,6 @@ select CPU_INTEL_MODEL_1067X select CPU_INTEL_MODEL_6FX select MMX - select SSE if CPU_INTEL_SOCKET_P -- To view, visit https://review.coreboot.org/c/coreboot/+/61319 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3641118905f1fcc1e34d7fe4f7ca3082c3cf0d3b Gerrit-Change-Number: 61319 Gerrit-PatchSet: 2 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: cpu/intel/socket_m: Drop 'select SSE'
by Felix Held (Code Review) 28 Jan '22

28 Jan '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/61318 ) Change subject: cpu/intel/socket_m: Drop 'select SSE' ...................................................................... cpu/intel/socket_m: Drop 'select SSE' SSE is already slected by SSE2 through model_6{e,f}x/Kconfig Change-Id: Ibe215cfe6aa6d7c215dd62e1ab2966d079c2a78d Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/61318 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/cpu/intel/socket_m/Kconfig 1 file changed, 0 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved diff --git a/src/cpu/intel/socket_m/Kconfig b/src/cpu/intel/socket_m/Kconfig index 50eb7e3..4e74eb4 100644 --- a/src/cpu/intel/socket_m/Kconfig +++ b/src/cpu/intel/socket_m/Kconfig @@ -8,7 +8,6 @@ select CPU_INTEL_MODEL_6EX select CPU_INTEL_MODEL_6FX select MMX - select SSE config DCACHE_RAM_BASE hex -- To view, visit https://review.coreboot.org/c/coreboot/+/61318 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibe215cfe6aa6d7c215dd62e1ab2966d079c2a78d Gerrit-Change-Number: 61318 Gerrit-PatchSet: 2 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: cpu/intel/socket_LGA775: Drop 'select SSE'
by Felix Held (Code Review) 28 Jan '22

28 Jan '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/61317 ) Change subject: cpu/intel/socket_LGA775: Drop 'select SSE' ...................................................................... cpu/intel/socket_LGA775: Drop 'select SSE' SSE is already selected by SSE2 through model_1067x/Kconfig Change-Id: I7b16af0277dc01c5905c5990244d3738a33723b3 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/61317 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/cpu/intel/socket_LGA775/Kconfig 1 file changed, 0 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved diff --git a/src/cpu/intel/socket_LGA775/Kconfig b/src/cpu/intel/socket_LGA775/Kconfig index 7d0bce7..3c9f262 100644 --- a/src/cpu/intel/socket_LGA775/Kconfig +++ b/src/cpu/intel/socket_LGA775/Kconfig @@ -10,7 +10,6 @@ select CPU_INTEL_MODEL_F4X select CPU_INTEL_MODEL_1067X select MMX - select SSE select SIPI_VECTOR_IN_ROM config DCACHE_RAM_SIZE -- To view, visit https://review.coreboot.org/c/coreboot/+/61317 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7b16af0277dc01c5905c5990244d3738a33723b3 Gerrit-Change-Number: 61317 Gerrit-PatchSet: 2 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: cpu/intel/socket_FCBGA559: Drop 'select SSE'
by Felix Held (Code Review) 28 Jan '22

28 Jan '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/61316 ) Change subject: cpu/intel/socket_FCBGA559: Drop 'select SSE' ...................................................................... cpu/intel/socket_FCBGA559: Drop 'select SSE' SSE is already selected by SSE2 through model_106cx/Kconfig Change-Id: I31b8345fdd901e1d05df5fa8351db3255f9cf9cb Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/61316 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/cpu/intel/socket_FCBGA559/Kconfig 1 file changed, 0 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved diff --git a/src/cpu/intel/socket_FCBGA559/Kconfig b/src/cpu/intel/socket_FCBGA559/Kconfig index 5105f09..681ca41 100644 --- a/src/cpu/intel/socket_FCBGA559/Kconfig +++ b/src/cpu/intel/socket_FCBGA559/Kconfig @@ -9,7 +9,6 @@ def_bool y select CPU_INTEL_MODEL_106CX select MMX - select SSE select CPU_HAS_L2_ENABLE_MSR config DCACHE_RAM_BASE -- To view, visit https://review.coreboot.org/c/coreboot/+/61316 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I31b8345fdd901e1d05df5fa8351db3255f9cf9cb Gerrit-Change-Number: 61316 Gerrit-PatchSet: 2 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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coreboot-gerrit January 2022