coreboot-gerrit September 2021

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Change in coreboot[master]: arch/x86: Refactor the SMBIOS type 17 write function
by build bot (Jenkins) (Code Review) 02 Sep '21

02 Sep '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Paul Menzel, Tim Wawrzynczak, Angel Pons, Patrick Rudolph, Felix Held. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56628 ) Change subject: arch/x86: Refactor the SMBIOS type 17 write function ...................................................................... Patch Set 8: (2 comments) File src/device/dram/spd.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-127392): https://review.coreboot.org/c/coreboot/+/56628/comment/a2717b4d_cd007af2 PS8, Line 206: static uint8_t convert_ddrx_form_factor_to_module_type(uint16_t memory_type, uint8_t form_factor) line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-127392): https://review.coreboot.org/c/coreboot/+/56628/comment/2671388f_966c996b PS8, Line 216: module_type = (memory_type == MEMORY_TYPE_DDR2) ? DDR2_SPD_SODIMM : DDR3_SPD_SODIMM; line over 96 characters -- To view, visit https://review.coreboot.org/c/coreboot/+/56628 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia337ac8f50b61ae78d86a07c7a86aa9c248bad50 Gerrit-Change-Number: 56628 Gerrit-PatchSet: 8 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 02 Sep 2021 20:23:49 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: arch/x86: Refactor the SMBIOS type 17 write function
by Subrata Banik (Code Review) 02 Sep '21

02 Sep '21

Attention is currently required from: Paul Menzel, Tim Wawrzynczak, Angel Pons. Hello build bot (Jenkins), Furquan Shaikh, Paul Menzel, Tim Wawrzynczak, Angel Pons, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/56628 to look at the new patch set (#8). Change subject: arch/x86: Refactor the SMBIOS type 17 write function ...................................................................... arch/x86: Refactor the SMBIOS type 17 write function List of changes: 1. Create Module Type macros as per Memory Type (i.e. DDR2/DDR3/DDR4/DDR5/LPDDR4/LPDDR5) and fix compilation issue due to renaming of existing macros due to scoping the Memory Type. 2. Skip fixed module type to form factor conversion using DDR2 SPD4 specification (inside dimm_info_fill()). 3. Use dedicated Memory Type and Module type for `Form Factor` conversion using `get_spd_info()` function. 4. Use dedicated Memory Type and Module type for `TypeDetail` conversion using `get_spd_info()` function. 5. Create a new API (convert_form_factor_to_module_type()) for `Form Factor` to 'Module type' conversion as per `Memory Type`. 6. Add DDR5 and LPDDR5 memory technology into the SMBIOS Memory Type table. 7. Add new argument as `Memory Type` smbios_form_factor_to_spd_mod_type(). 8. smbios_form_factor_to_spd_mod_type() internally calls convert_form_factor_to_module_type() for `Module Type` conversion. Refer to datasheet SPD4.1.2.M-1 for LPDDRx and SPD4.1.2.L-3 for DDRx. BUG=b:194659789 TEST=Refer to dmidecode -t 17 output as below: Without this code change: Handle 0x0012, DMI type 17, 40 bytes Memory Device Array Handle: 0x000A Error Information Handle: Not Provided Total Width: 16 bits Data Width: 16 bits Size: 2048 MB Form Factor: Unknown .... With this code change: Handle 0x0012, DMI type 17, 40 bytes Memory Device Array Handle: 0x000A Error Information Handle: Not Provided Total Width: 16 bits Data Width: 16 bits Size: 2048 MB Form Factor: Row Of Chips .... Change-Id: Ia337ac8f50b61ae78d86a07c7a86aa9c248bad50 Signed-off-by: Subrata Banik <subrata.banik(a)intel.com> --- M src/arch/x86/smbios.c M src/device/dram/ddr3.c M src/device/dram/ddr4.c M src/device/dram/spd.c M src/include/device/dram/spd.h M src/include/dimm_info_util.h M src/include/smbios.h M src/include/spd.h M src/lib/dimm_info_util.c M src/soc/amd/common/block/pi/amd_late_init.c M src/soc/amd/common/fsp/dmi.c M src/soc/intel/common/smbios.c 12 files changed, 322 insertions(+), 92 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/56628/8 -- To view, visit https://review.coreboot.org/c/coreboot/+/56628 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia337ac8f50b61ae78d86a07c7a86aa9c248bad50 Gerrit-Change-Number: 56628 Gerrit-PatchSet: 8 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: util/abuild: don't select ADD_FSP_BINARIES
by Felix Held (Code Review) 02 Sep '21

02 Sep '21

Felix Held has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/57344 ) Change subject: util/abuild: don't select ADD_FSP_BINARIES ...................................................................... Abandoned replaced by CB:57349 and forgot to copy over the change-id. since there are no comments on this one yet, i'll just abandon this one -- To view, visit https://review.coreboot.org/c/coreboot/+/57344 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I60c426d759ec36aac554f4e7bdbda0de0c462d97 Gerrit-Change-Number: 57344 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

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Change in coreboot[master]: [WIP] utils/abuild: select FSP_USE_REPO instead of ADD_FSP_BINARIES
by Felix Held (Code Review) 02 Sep '21

02 Sep '21

Attention is currently required from: Martin Roth. Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/57349 ) Change subject: [WIP] utils/abuild: select FSP_USE_REPO instead of ADD_FSP_BINARIES ...................................................................... [WIP] utils/abuild: select FSP_USE_REPO instead of ADD_FSP_BINARIES Like USE_AMD_BLOBS and USE_QC_BLOBS in the case of the AMD and Qualcomm repos, FSP_USE_REPO controls if the Intel FSP repo will get checked out and will be available during the Jenkins runs. ADD_FSP_BINARIES will get selected in drivers/intel/fsp2_0/Kconfig when FSP_USE_REPO is selected. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I72faa6f9e5f2b06ab7cd43595ae0b49bf4d39630 --- M util/abuild/abuild 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/57349/1 diff --git a/util/abuild/abuild b/util/abuild/abuild index 407c3f1..5fe298e 100755 --- a/util/abuild/abuild +++ b/util/abuild/abuild @@ -731,7 +731,7 @@ shift;; -B|--blobs) shift customizing="${customizing}, blobs" - configoptions="${configoptions}CONFIG_USE_AMD_BLOBS=y\nCONFIG_USE_QC_BLOBS=y\nCONFIG_ADD_FSP_BINARIES=y\n" + configoptions="${configoptions}CONFIG_USE_AMD_BLOBS=y\nCONFIG_USE_QC_BLOBS=y\nCONFIG_FSP_USE_REPO=y\n" ;; -A|--any-toolchain) shift customizing="${customizing}, any-toolchain" -- To view, visit https://review.coreboot.org/c/coreboot/+/57349 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I72faa6f9e5f2b06ab7cd43595ae0b49bf4d39630 Gerrit-Change-Number: 57349 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/amd/picasso: select ADD_FSP_BINARIES if USE_AMD_BLOBS is selected
by Felix Held (Code Review) 02 Sep '21

02 Sep '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson. Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/57348 ) Change subject: soc/amd/picasso: select ADD_FSP_BINARIES if USE_AMD_BLOBS is selected ...................................................................... soc/amd/picasso: select ADD_FSP_BINARIES if USE_AMD_BLOBS is selected Since the FSP binaries for Picasso are present in the amd_blobs repo, select the ADD_FSP_BINARIES option if the Kconfig option to check out that repo is set. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I9a8571730cf271ad5e113e5df87700882b3c5475 --- M src/soc/amd/picasso/Kconfig 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/57348/1 diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig index addff5e..473f316 100644 --- a/src/soc/amd/picasso/Kconfig +++ b/src/soc/amd/picasso/Kconfig @@ -18,6 +18,7 @@ select X86_AMD_FIXED_MTRRS select X86_AMD_INIT_SIPI select ACPI_SOC_NVS + select ADD_FSP_BINARIES if USE_AMD_BLOBS select DRIVERS_I2C_DESIGNWARE select DRIVERS_USB_PCI_XHCI select GENERIC_GPIO_LIB -- To view, visit https://review.coreboot.org/c/coreboot/+/57348 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9a8571730cf271ad5e113e5df87700882b3c5475 Gerrit-Change-Number: 57348 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/intel/leafhill,minnow3: remove FSP_M_FILE and FSP_S_FILE override
by Felix Held (Code Review) 02 Sep '21

02 Sep '21

Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/57347 ) Change subject: mb/intel/leafhill,minnow3: remove FSP_M_FILE and FSP_S_FILE override ...................................................................... mb/intel/leafhill,minnow3: remove FSP_M_FILE and FSP_S_FILE override Normally, selecting FSP_USE_REPO will select FSP_FULL_FD which then will configure the proper paths for FSP_M_FILE and FSP_S_FILE. The override in these two boards caused FSP_M_FILE and FSP_S_FILE being empty despite ADD_FSP_BINARIES being selected by FSP_USE_REPO which is an invalid case that needs to be avoided, so remove the board-level override of those two options. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I20c8cebea8327d59f0f33d05b824a74bf2121f4b --- M src/mainboard/intel/leafhill/Kconfig M src/mainboard/intel/minnow3/Kconfig 2 files changed, 0 insertions(+), 20 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/57347/1 diff --git a/src/mainboard/intel/leafhill/Kconfig b/src/mainboard/intel/leafhill/Kconfig index dc2eff6..bf59d00 100644 --- a/src/mainboard/intel/leafhill/Kconfig +++ b/src/mainboard/intel/leafhill/Kconfig @@ -44,16 +44,6 @@ depends on NEED_IFWI default y -config FSP_M_FILE - string "path to FSP-M.Fv blob" - depends on ADD_FSP_BINARIES - default "" - -config FSP_S_FILE - string "path to FSP-S.Fv blob" - depends on ADD_FSP_BINARIES - default "" - config FSP_S_CBFS string default "fsps.bin" diff --git a/src/mainboard/intel/minnow3/Kconfig b/src/mainboard/intel/minnow3/Kconfig index 41aacdd..13a8591 100644 --- a/src/mainboard/intel/minnow3/Kconfig +++ b/src/mainboard/intel/minnow3/Kconfig @@ -44,16 +44,6 @@ depends on NEED_IFWI default y -config FSP_M_FILE - string "path to FSP-M.Fv blob" - depends on ADD_FSP_BINARIES - default "" - -config FSP_S_FILE - string "path to FSP-S.Fv blob" - depends on ADD_FSP_BINARIES - default "" - config FSP_S_CBFS string default "fsps.bin" -- To view, visit https://review.coreboot.org/c/coreboot/+/57347 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I20c8cebea8327d59f0f33d05b824a74bf2121f4b Gerrit-Change-Number: 57347 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/intel/leafhill,minnow3: remove ADD_FSP_BINARIES config override
by Felix Held (Code Review) 02 Sep '21

02 Sep '21

Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/57346 ) Change subject: mb/intel/leafhill,minnow3: remove ADD_FSP_BINARIES config override ...................................................................... mb/intel/leafhill,minnow3: remove ADD_FSP_BINARIES config override The ADD_FSP_BINARIES override in the mainboard's Kconfig caused this option to not be selected when FSP_USE_REPO is selected. Remove the override to fix this problem. These two boards are the only ones in tree that had an override for this option, so now the ADD_FSP_BINARIES option is only defined in drivers/intel/fsp2_0/Kconfig. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I23439f3134eef9460625addbff7efd64c5f65ae5 --- M src/mainboard/intel/leafhill/Kconfig M src/mainboard/intel/minnow3/Kconfig 2 files changed, 0 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/57346/1 diff --git a/src/mainboard/intel/leafhill/Kconfig b/src/mainboard/intel/leafhill/Kconfig index 3d25aaa..dc2eff6 100644 --- a/src/mainboard/intel/leafhill/Kconfig +++ b/src/mainboard/intel/leafhill/Kconfig @@ -44,10 +44,6 @@ depends on NEED_IFWI default y -config ADD_FSP_BINARIES - bool "Add FSP blobs" - default n - config FSP_M_FILE string "path to FSP-M.Fv blob" depends on ADD_FSP_BINARIES diff --git a/src/mainboard/intel/minnow3/Kconfig b/src/mainboard/intel/minnow3/Kconfig index 66bee2f..41aacdd 100644 --- a/src/mainboard/intel/minnow3/Kconfig +++ b/src/mainboard/intel/minnow3/Kconfig @@ -44,10 +44,6 @@ depends on NEED_IFWI default y -config ADD_FSP_BINARIES - bool "Add FSP blobs" - default n - config FSP_M_FILE string "path to FSP-M.Fv blob" depends on ADD_FSP_BINARIES -- To view, visit https://review.coreboot.org/c/coreboot/+/57346 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I23439f3134eef9460625addbff7efd64c5f65ae5 Gerrit-Change-Number: 57346 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/intel/common: Don't suppress SPD Module Type value
by Subrata Banik (Code Review) 02 Sep '21

02 Sep '21

Subrata Banik has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/56650 ) Change subject: soc/intel/common: Don't suppress SPD Module Type value ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/56650 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia3f38c24efa6a8685639bb607926e2fd9c702ff6 Gerrit-Change-Number: 56650 Gerrit-PatchSet: 3 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: abandon

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Change in coreboot[master]: include/spd: Fix SPD Memory Type as per JEDEC Standard No. 21-C
by Subrata Banik (Code Review) 02 Sep '21

02 Sep '21

Subrata Banik has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/56627 ) Change subject: include/spd: Fix SPD Memory Type as per JEDEC Standard No. 21-C ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/56627 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I356b322fabd7ceeaefda60bcc5438eb4a64675ed Gerrit-Change-Number: 56627 Gerrit-PatchSet: 3 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Rudolph <siro(a)das-labor.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: abandon

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Change in coreboot[master]: coreboot tables: Add type-c port info to coreboot table
by Nick Vaccaro (Code Review) 02 Sep '21

02 Sep '21

Attention is currently required from: Tim Wawrzynczak. Nick Vaccaro has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57069 ) Change subject: coreboot tables: Add type-c port info to coreboot table ...................................................................... Patch Set 15: (2 comments) Patchset: PS11: > Will do. Done File src/drivers/intel/pmc_mux/conn/conn.c: https://review.coreboot.org/c/coreboot/+/57069/comment/1324cb82_ff50de93 PS11, Line 116: > To be safest, it's probably best to loop through the children and verify they all have a `chip_info` […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/57069 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ice732be2fa634dbf31ec620552b383c4a5b41451 Gerrit-Change-Number: 57069 Gerrit-PatchSet: 15 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Thu, 02 Sep 2021 20:06:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Comment-In-Reply-To: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-MessageType: comment

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coreboot-gerrit September 2021