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Change subject: soc/intel/elkhartlake: Lock PAM registers in finalize
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Patch Set 1: Code-Review+2
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Change subject: soc/intel/cannonlake: Lock PAM registers in finalize
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Change subject: soc/intel/jasperlake: Lock PAM registers in finalize
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Patch Set 1: Code-Review+2
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Change subject: lib/edid_fill_fb: Make framebuffer orientation to be configurable
......................................................................
Patch Set 4:
(1 comment)
Patchset:
PS2:
> I just followed Kconfig option is better than c code for the static return for orientation, but I al […]
Well... I mean I guess we can do this but I still think the existing API was better. This weak function callback thing makes the control flow very complicated and requires mainboard code to be able to respond with the panel properties on demand. For the Kukui board you're now calling get_active_panel() twice, which is not a function that was designed to be called twice and will waste time on doing the same CBFS lookup twice now. I guess you could rewrite it to cache the result and support that, but... why make this so complicated? The previous flow made perfect sense for those boards.
I think the real problem here is that the FSP graphics driver is too far removed from the mainboard and doesn't allow to directly pass anything in or out. The cleanest solution for that would be to fix it so that the mainboard init code actually calls something to trigger display initialization and then gets something back (e.g. a struct fb_info pointer). If we don't want to do that, because it's a bit too big of a change maybe, you could also do something like have the FSP graphics driver store the fb_info pointer in a global and provide a function for the mainboard code to retrieve it and add additional info to it.
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Change subject: mb/google/guybrush: Initialize WWAN GPIOs the same for PCI vs USB
......................................................................
Patch Set 3:
(2 comments)
Patchset:
PS3:
> Realized that step 1) is not in PSP verstage and it is done very early in bootblock. […]
Here are the tables:
- Early - called either in psp_verstage if it's enabled or early bootblock if psp_verstage is not enabled. Initializes everything needed for PSP_verstage as well as starting the power sequencing for PCIe.
- Bootblock - Happens late in the bootblock. Next step in the power sequencing.
- PCIe_RST - happens in romstage just before FSP-S. This brings the PCIe devices out of reset.
- Ramstage - Initialize or Re-Initialize everything.
- Finalize - Finish enabling the Fingerprint MCU.
- Sleep/shutdown - Power off the Fingerprint MCU.
There's also another call for the fingerprint MCU power, but that's self contained.
WWAN & WWAN have power signals in addition to the aux reset lines.
SD card & NVME only have aux reset. The power on is handled in hardware when power comes up, and firmware has no control over those signals.
So here's the power-on sequence for all of the devices:
- Early: Enable WWAN & WLAN power
- Bootblock: Bring WWAN out of reset and enable it - all that's left for the power-on sequence it to deassert the PCIE_RST signal
- Romstage: Aux_RST is deasserted for all 4 devices that can be on the PCIe bus.
If WWAN is only using USB, PCIe training on that link doesn't happen, so the device stays in USB mode.
All of the devices need to be brought up in the correct power-on sequence so that the training can occur. If someone wants to try moving that to ACPI and letting the linux kernel do all of the allocation and everything, I'd be happy to let them, but without AGESA doing the PCIe bus training, there might be a bunch of additional code that's needed in a driver that's written specifically to handle that.
File src/mainboard/google/guybrush/variants/baseboard/gpio.c:
https://review.coreboot.org/c/coreboot/+/57317/comment/ab05e1d9_455ad013
PS3, Line 172: /* Assert all AUX reset lines */
> Correction: Why do we need to do early bootblock initialization of *AUX_RESET* GPIOs only when PSP v […]
Because if PSP_Verstage is enabled, it gets done in psp_verstage instead of in early bootblock.
On board rev0, we need to enable pcie_rst early, but we want to keep all of those signals disabled because we want to keep the PCIe reset lines asserted until we're ready to do the pcie training. The way we'd prefer this to happen (though it makes no real difference) is to raise the AUX lines early and bring everything out of reset by just raising the single pcie_rst signal. We can do that with board rev2, but it will break all of the rev0 boards.
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Change subject: util/liveiso: Make neovim the default editor
......................................................................
Patch Set 4:
(1 comment)
File util/liveiso/common.nix:
https://review.coreboot.org/c/coreboot/+/57393/comment/bbca4186_6bddd19e
PS3, Line 95: vi = "nvim";
> not sure about this, since `vi` is a different editor and it's present by default
Done
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Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/57393
to look at the new patch set (#4).
Change subject: util/liveiso: Make neovim the default editor
......................................................................
util/liveiso: Make neovim the default editor
Make neovim the default editor and create aliases for vi and vim.
The NixOS module for neovim is currently broken. Thus, add a note to
`description.md` to do that later.
Change-Id: I9345a6e32f3035565e55e50579c97121b4987d83
Signed-off-by: Felix Singer <felixsinger(a)posteo.net>
---
M util/liveiso/common.nix
M util/liveiso/description.md
2 files changed, 13 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/57393/4
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Change subject: util/liveiso: Make neovim the default editor
......................................................................
Patch Set 3:
(1 comment)
File util/liveiso/common.nix:
https://review.coreboot.org/c/coreboot/+/57393/comment/e3adf286_f0a82054
PS3, Line 95: vi = "nvim";
not sure about this, since `vi` is a different editor and it's present by default
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