coreboot-gerrit September 2021

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Change in coreboot[master]: soc/intel/adl: Drop SGPM, RGPM and EGPM methods
by Meera Ravindranath (Code Review) 06 Sep '21

06 Sep '21

Attention is currently required from: Furquan Shaikh, Maulik V Vaghela, Paul Menzel, Subrata Banik, Patrick Rudolph. Hello build bot (Jenkins), Furquan Shaikh, Maulik V Vaghela, Tim Wawrzynczak, Angel Pons, Subrata Banik, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/57209 to look at the new patch set (#5). Change subject: soc/intel/adl: Drop SGPM, RGPM and EGPM methods ...................................................................... soc/intel/adl: Drop SGPM, RGPM and EGPM methods These methods can now be dropped as Dynamic GPIO PM is enabled. Signed-off-by: Meera Ravindranath <meera.ravindranath(a)intel.com> Change-Id: I0c7b67b5414d8c80775ab7678ce7b12181af7882 --- M src/soc/intel/alderlake/acpi/gpio.asl 1 file changed, 0 insertions(+), 41 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/57209/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/57209 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0c7b67b5414d8c80775ab7678ce7b12181af7882 Gerrit-Change-Number: 57209 Gerrit-PatchSet: 5 Gerrit-Owner: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/adl: Drop SGPM, RGPM and EGPM methods
by Meera Ravindranath (Code Review) 06 Sep '21

06 Sep '21

Attention is currently required from: Furquan Shaikh, Maulik V Vaghela, Paul Menzel, Subrata Banik, Patrick Rudolph. Meera Ravindranath has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57209 ) Change subject: soc/intel/adl: Drop SGPM, RGPM and EGPM methods ...................................................................... Patch Set 4: (1 comment) Patchset: PS4: > Looks like ADLRVP is still setting gpio_override_pm. I think that should be dropped from ADLRVP. […] Sure, is it okay to push a different CL to remove gpio_override_pm from chip.h and let the current CL merge? As removing from chip.h would also require the corresponding check in chip.c https://review.coreboot.org/plugins/gitiles/coreboot/+/711b6c5c2d9a0833a068… and the other brya mainboards using it to be removed. -- To view, visit https://review.coreboot.org/c/coreboot/+/57209 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0c7b67b5414d8c80775ab7678ce7b12181af7882 Gerrit-Change-Number: 57209 Gerrit-PatchSet: 4 Gerrit-Owner: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 06 Sep 2021 11:38:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/intel/fsp2_0: add warning when ADD_FSP_BINARIES isn't selected
by Nico Huber (Code Review) 06 Sep '21

06 Sep '21

Attention is currently required from: Andrey Petrov, Patrick Rudolph, Felix Held. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57368 ) Change subject: drivers/intel/fsp2_0: add warning when ADD_FSP_BINARIES isn't selected ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/57368 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6efc184ecc4059818474937fd31574f703c9bdc6 Gerrit-Change-Number: 57368 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 06 Sep 2021 11:35:09 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/intel/leafhill,minnow3: remove ADD_FSP_BINARIES config override
by Nico Huber (Code Review) 06 Sep '21

06 Sep '21

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57346 ) Change subject: mb/intel/leafhill,minnow3: remove ADD_FSP_BINARIES config override ...................................................................... Patch Set 2: (1 comment) Patchset: PS1: > there are also some other things i found in the fsp driver's Kconfig that could be improved, but not […] There'll always be room for improvement left. After all, we have been cleaning up this area for about 3 years already, still what you encountered was easy to improve. Thanks for taking the time! it already looks much better now -- To view, visit https://review.coreboot.org/c/coreboot/+/57346 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I23439f3134eef9460625addbff7efd64c5f65ae5 Gerrit-Change-Number: 57346 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Martin Roth <martinroth(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Mon, 06 Sep 2021 11:33:17 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Martin Roth <martinroth(a)google.com> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/intel/adlrvp_p: Enable TCSS USB ports device path
by Meera Ravindranath (Code Review) 06 Sep '21

06 Sep '21

Attention is currently required from: Sridhar Siricilla, Bernardo Perez Priego, Tim Wawrzynczak, Deepti Deshatty. Hello build bot (Jenkins), Sridhar Siricilla, Bernardo Perez Priego, Tim Wawrzynczak, Deepti Deshatty, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/57274 to look at the new patch set (#2). Change subject: mb/intel/adlrvp_p: Enable TCSS USB ports device path ...................................................................... mb/intel/adlrvp_p: Enable TCSS USB ports device path TEST=Boot device, Type C port should operate correctly. Signed-off-by: Meera Ravindranath <meera.ravindranath(a)intel.com> Change-Id: Iadc0df2e6e29a5afbcbb7db1ae0be6546dbcdc1a --- M src/mainboard/intel/adlrvp/devicetree.cb 1 file changed, 23 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/57274/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/57274 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iadc0df2e6e29a5afbcbb7db1ae0be6546dbcdc1a Gerrit-Change-Number: 57274 Gerrit-PatchSet: 2 Gerrit-Owner: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Reviewer: Deepti Deshatty <deepti.deshatty(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Attention: Deepti Deshatty <deepti.deshatty(a)intel.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: Doc/Intel: Remove out-of-date documentation
by Nico Huber (Code Review) 06 Sep '21

06 Sep '21

Attention is currently required from: Angel Pons, Arthur Heymans, Patrick Rudolph. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57400 ) Change subject: Doc/Intel: Remove out-of-date documentation ...................................................................... Patch Set 1: Code-Review+2 (1 comment) Patchset: PS1: I've skimmed through it and it really looks like a snapshot of the initial state when Intel got involved; not considering things that should have had a FIXME or things that shouldn't have been merged in the documented state in the first place. It's the kind of docu- mentation that is hard to maintain and I can fully understand that it was abandoned rather quickly. There are some interesting link compilations about the hardware, though. But that particular hardware was abandoned too, so I don't think we should save things right now. After all, it stays in the Git history. -- To view, visit https://review.coreboot.org/c/coreboot/+/57400 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If359f554e85d32cdb65c3d928b5155db30bc40a5 Gerrit-Change-Number: 57400 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 06 Sep 2021 11:27:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/dedede/var/cret: Update DPTF parameters
by Dtrain Hsu (Code Review) 06 Sep '21

06 Sep '21

Attention is currently required from: Henry Sun, Sumeet R Pawnikar, Shou-Chieh Hsu, Karthik Ramasubramanian. Dtrain Hsu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57404 ) Change subject: mb/google/dedede/var/cret: Update DPTF parameters ...................................................................... Patch Set 3: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/57404 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I25d3909144d6e38d7a6eb859d33585c319a84b04 Gerrit-Change-Number: 57404 Gerrit-PatchSet: 3 Gerrit-Owner: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Alan Lee <alan_lee(a)compal.corp-partner.google.com> Gerrit-CC: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-CC: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Attention: Henry Sun <henrysun(a)google.com> Gerrit-Attention: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Attention: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Mon, 06 Sep 2021 10:59:58 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/variants/taeko: Add initial fw config for taeko
by Joey Peng (Code Review) 06 Sep '21

06 Sep '21

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Change in coreboot[master]: mb/google/brya/variants/taeko: Add initial fw config for taeko
by Joey Peng (Code Review) 06 Sep '21

06 Sep '21

Attention is currently required from: Tim Wawrzynczak, YH Lin. Joey Peng has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57332 ) Change subject: mb/google/brya/variants/taeko: Add initial fw config for taeko ...................................................................... Patch Set 9: (5 comments) This change is ready for review. File src/mainboard/google/brya/variants/taeko/overridetree.cb: https://review.coreboot.org/c/coreboot/+/57332/comment/3ce19217_3f2e999e PS7, Line 1: fw_config : field KB_BL 4 4 : option KB_BL_ABSENT 0 : option KB_BL_PRESENT 1 : end : field AUDIO 5 7 : option AUDIO_UNKNOWN 0 : option MAX98357_ALC5682I_I2S 1 : end : field BOOT_DEVICE_EMMC 12 12 : option BOOT_EMMC_DISABLED 0 : option BOOT_EMMC_ENABLED 1 : end : field BOOT_DEVICE_NVME 13 13 : option BOOT_NVME_DISABLED 0 : option BOOT_NVME_ENABLED 1 : end : end > From config.star, I think the fw_config section should look like this: […] Done https://review.coreboot.org/c/coreboot/+/57332/comment/bf1e9e4d_4deaf4c8 PS7, Line 172: end > Looks like you'll also need a soundwire FW_CONFIG option for AUDIO We confirmed with EE team that we won't use soundwire. We will remove this part. https://review.coreboot.org/c/coreboot/+/57332/comment/33e2e4ac_8bca490c PS7, Line 193: > `probe DB_SD DB_SD_PRESENT` Done https://review.coreboot.org/c/coreboot/+/57332/comment/528ba840_e018a45f PS7, Line 247: chip drivers/usb/acpi : register "desc" = ""USB3 Type-C Port C1 (DB)"" : register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" : register "group" = "ACPI_PLD_GROUP(3, 1)" : device ref tcss_usb3_port3 on end > You need a FW_CONFIG DB_USB for this one as well (is it the same one that has the Type-A port ?) This one is for DB_USB3_NO_A. https://review.coreboot.org/c/coreboot/+/57332/comment/eb670ee6_71550472 PS7, Line 294: > This would seem to depend on a probe for options that don't exist yet... […] This one is for MLB Type-A configuration, not for DB. -- To view, visit https://review.coreboot.org/c/coreboot/+/57332 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifef750338d777b76e9710d6bca9a166120db6a0a Gerrit-Change-Number: 57332 Gerrit-PatchSet: 9 Gerrit-Owner: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: YH Lin <yueherngl(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jerry2 Huang <jerry2.huang(a)lcfc.corp-partner.google.com> Gerrit-CC: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-CC: Melo Chuang <melo.chuang(a)lcfc.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Rasheed Hsueh <rasheed.hsueh(a)lcfc.corp-partner.google.com> Gerrit-CC: Stanley Wu <stanley1.wu(a)lcfc.corp-partner.google.com> Gerrit-CC: Sunshine Chao <sunshine.chao(a)lcfc.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: YH Lin <yueherngl(a)chromium.org> Gerrit-Comment-Date: Mon, 06 Sep 2021 10:36:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: arch/x86: Refactor the SMBIOS type 17 write function
by Subrata Banik (Code Review) 06 Sep '21

06 Sep '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Tim Wawrzynczak, Subrata Banik, Angel Pons, Patrick Rudolph, Felix Held. Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Furquan Shaikh, Marshall Dawson, Tim Wawrzynczak, Angel Pons, Patrick Rudolph, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/56628 to look at the new patch set (#15). Change subject: arch/x86: Refactor the SMBIOS type 17 write function ...................................................................... arch/x86: Refactor the SMBIOS type 17 write function List of changes: 1. Create Module Type macros as per Memory Type (i.e. DDR2/DDR3/DDR4/DDR5/LPDDR4/LPDDR5) and fix compilation issue due to renaming of existing macros due to scoping the Memory Type. 2. Skip fixed module type to form factor conversion using DDR2 SPD4 specification (inside dimm_info_fill()). 3. Use dedicated Memory Type and Module type for `Form Factor` conversion using `get_spd_info()` function. 4. Use dedicated Memory Type and Module type for `TypeDetail` conversion using `get_spd_info()` function. 5. Create a new API (convert_form_factor_to_module_type()) for `Form Factor` to 'Module type' conversion as per `Memory Type`. 6. Add DDR5 and LPDDR5 memory technology into the SMBIOS Memory Type table. 7. Add new argument as `Memory Type` smbios_form_factor_to_spd_mod_type(). 8. smbios_form_factor_to_spd_mod_type() internally calls convert_form_factor_to_module_type() for `Module Type` conversion. 9. Update `test_smbios_form_factor_to_spd_mod_type()` to accommodate different memory types. Refer to datasheet SPD4.1.2.M-1 for LPDDRx and SPD4.1.2.L-3 for DDRx. BUG=b:194659789 TEST=Refer to dmidecode -t 17 output as below: Without this code change: Handle 0x0012, DMI type 17, 40 bytes Memory Device Array Handle: 0x000A Error Information Handle: Not Provided Total Width: 16 bits Data Width: 16 bits Size: 2048 MB Form Factor: Unknown .... With this code change: Handle 0x0012, DMI type 17, 40 bytes Memory Device Array Handle: 0x000A Error Information Handle: Not Provided Total Width: 16 bits Data Width: 16 bits Size: 2048 MB Form Factor: Row Of Chips .... Change-Id: Ia337ac8f50b61ae78d86a07c7a86aa9c248bad50 Signed-off-by: Subrata Banik <subrata.banik(a)intel.com> --- M src/arch/x86/smbios.c M src/device/dram/ddr3.c M src/device/dram/ddr4.c M src/device/dram/spd.c M src/include/device/dram/spd.h M src/include/dimm_info_util.h M src/include/smbios.h M src/include/spd.h M src/lib/dimm_info_util.c M src/mainboard/scaleway/tagada/ramstage.c M src/northbridge/intel/haswell/haswell_mrc/raminit.c M src/soc/amd/common/block/pi/amd_late_init.c M src/soc/amd/common/fsp/dmi.c M src/soc/intel/common/smbios.c M tests/lib/Makefile.inc M tests/lib/dimm_info_util-test.c 16 files changed, 442 insertions(+), 111 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/56628/15 -- To view, visit https://review.coreboot.org/c/coreboot/+/56628 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia337ac8f50b61ae78d86a07c7a86aa9c248bad50 Gerrit-Change-Number: 56628 Gerrit-PatchSet: 15 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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coreboot-gerrit September 2021