coreboot-gerrit September 2021

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Change in coreboot[master]: soc/amd/common/block/gpio_banks: move GPIO MUX access functions
by Felix Held (Code Review) 06 Sep '21

06 Sep '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Martin Roth, Marshall Dawson. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56782 ) Change subject: soc/amd/common/block/gpio_banks: move GPIO MUX access functions ...................................................................... Patch Set 4: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/56782/comment/a167bf52_1b4e6383 PS2, Line 9: MOve > Nit: change to 'Move' done -- To view, visit https://review.coreboot.org/c/coreboot/+/56782 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If787e6e1d124a932beafd73e5ce7d0ce4869e800 Gerrit-Change-Number: 56782 Gerrit-PatchSet: 4 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Comment-Date: Mon, 06 Sep 2021 23:56:05 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Martin Roth <martinroth(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: [WIP] soc/amd/*: move reset_i2c_peripherals call after early GPIO setup
by Felix Held (Code Review) 06 Sep '21

06 Sep '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Martin Roth, Marshall Dawson. Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Marshall Dawson, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/57291 to look at the new patch set (#3). Change subject: [WIP] soc/amd/*: move reset_i2c_peripherals call after early GPIO setup ...................................................................... [WIP] soc/amd/*: move reset_i2c_peripherals call after early GPIO setup Since bootblock_soc_early_init gets called before bootblock_mainboard_early_init which does the early GPIO setup, external I2C level shifters that are controlled by GPIOs might not be enabled yet. Moving the reset_i2c_peripherals call to bootblock_soc_init makes sure that the early GPIO setup is already done when reset_i2c_peripherals is called. Haven't probed any SCL signal on the non-SOC side of the I2C level shifters yet, but the waveform on the SCL pin of I2C3 on the SoC of a barla/careena Chromebook doesn't have the longer than expected SCL pulses any more. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: If02140aef56ed6db7ecee24811724b5b24e54a91 --- M src/soc/amd/cezanne/early_fch.c M src/soc/amd/picasso/early_fch.c M src/soc/amd/stoneyridge/bootblock.c 3 files changed, 8 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/57291/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/57291 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If02140aef56ed6db7ecee24811724b5b24e54a91 Gerrit-Change-Number: 57291 Gerrit-PatchSet: 3 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin Roth <martinroth(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/amd/common/block/gpio_banks: move GPIO MUX access functions
by Felix Held (Code Review) 06 Sep '21

06 Sep '21

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Change in coreboot[master]: soc/amd/common/block/i2c: use common GPIO API in drive_scl
by Felix Held (Code Review) 06 Sep '21

06 Sep '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson. Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Martin Roth, Marshall Dawson, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/56777 to look at the new patch set (#5). Change subject: soc/amd/common/block/i2c: use common GPIO API in drive_scl ...................................................................... soc/amd/common/block/i2c: use common GPIO API in drive_scl No need to do raw GPIO MMIO accesses when basically the same functionality can be achieved by using existing APIs. Using the existing GPIO API instead of raw GPIO MMIO register accesses allows containing all direct GPIO MMIO accesses inside the common AMD GPIO code which will be done in subsequent patches. Since the value parameter of gpio_set is int, change the type of the val parameter of drive_scl to int as well even though I'm not sure why a signed integer was used for this in the common GPIO API. Since program_gpios already configures the SCL GPIOs as outputs, gpio_set can be used in drive_scl which only sets the output value, but doesn't configure the direction. TEST=The waveform on the SCL pin of I2C3 on a barla/careena Chromebook looks similar to the same as before during the reset_i2c_peripherals call, but due to the additional overhead of the function call, the pulse width gets about 50% longer. Since the udelay call in drive_scl still has an open TODO to make this configurable and the pulses being longer is in the safe side, this side-effect can be addressed in a follow-up patch. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: Ic323cebc1c83ecd6f0e1fbab419c69489d77face --- M src/soc/amd/common/block/i2c/i2c.c 1 file changed, 7 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/56777/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/56777 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic323cebc1c83ecd6f0e1fbab419c69489d77face Gerrit-Change-Number: 56777 Gerrit-PatchSet: 5 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/amd/*/bootblock,early_fch: rework i2c_scl_pins configuration
by Felix Held (Code Review) 06 Sep '21

06 Sep '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson. Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Martin Roth, Marshall Dawson, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/56807 to look at the new patch set (#3). Change subject: soc/amd/*/bootblock,early_fch: rework i2c_scl_pins configuration ...................................................................... soc/amd/*/bootblock,early_fch: rework i2c_scl_pins configuration drive_scl in soc/amd/common/block/i2c/i2c.c writes the raw GPIO MMIO configuration register and drives it as output, so don't initially configure the GPIO as input with no pull up/down. This is a preparation to use the common AMD GPIO access functions instead of the raw register accesses, since the gpio_set function only sets the output value, but doesn't reconfigure the direction. Using gpio_output there instead would reconfigure the direction as well, but would result in doubling the number of MMIO accesses, so just configure the GPIOs correctly right away to avoid that. TEST=The waveform on the SCL pin of I2C3 on a barla/careena Chromebook looks exactly the same as before during the reset_i2c_peripherals call. This was probed at the SCL pad of the unpopulated I2C level shifter on the side that is connected to the SoC. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I8e94afe0c755a02abcc722d5094e220d8781f8f5 --- M src/soc/amd/cezanne/early_fch.c M src/soc/amd/picasso/early_fch.c M src/soc/amd/stoneyridge/bootblock.c 3 files changed, 13 insertions(+), 13 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/56807/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/56807 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8e94afe0c755a02abcc722d5094e220d8781f8f5 Gerrit-Change-Number: 56807 Gerrit-PatchSet: 3 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: wifi: Update deny list entry size to uint16_t
by Sugnan Prabhu S (Code Review) 06 Sep '21

06 Sep '21

Attention is currently required from: Furquan Shaikh, Paul Menzel, Tim Wawrzynczak. Sugnan Prabhu S has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57407 ) Change subject: wifi: Update deny list entry size to uint16_t ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/57407/comment/55bd90a7_b5bffc0a PS1, Line 12: cc50770cd0("wifi: > Please add a space before (. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/57407 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I045c21350cf4c2266df108eede6350d090322ba0 Gerrit-Change-Number: 57407 Gerrit-PatchSet: 2 Gerrit-Owner: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Mon, 06 Sep 2021 23:44:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: wifi: Update deny list entry size to uint16_t
by Sugnan Prabhu S (Code Review) 06 Sep '21

06 Sep '21

Attention is currently required from: Furquan Shaikh, Sugnan Prabhu S, Tim Wawrzynczak. Hello build bot (Jenkins), Furquan Shaikh, Tim Wawrzynczak, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/57407 to look at the new patch set (#2). Change subject: wifi: Update deny list entry size to uint16_t ...................................................................... wifi: Update deny list entry size to uint16_t As per the connectivity document deny list entry size should be uint16 559910_Intel_Connectivity_Platforms_BIOS_Guidelines_Rev6_4.pdf Fixes: cc50770cd0 ("wifi: Add support for wifi time average SAR config") Change-Id: I045c21350cf4c2266df108eede6350d090322ba0 Signed-off-by: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com> --- M src/drivers/wifi/generic/acpi.c M src/include/sar.h 2 files changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/57407/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/57407 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I045c21350cf4c2266df108eede6350d090322ba0 Gerrit-Change-Number: 57407 Gerrit-PatchSet: 2 Gerrit-Owner: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/amd/{bilby,mandolin}: Turn empty `chip` entry into comment
by Felix Held (Code Review) 06 Sep '21

06 Sep '21

Attention is currently required from: Nico Huber. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57430 ) Change subject: mb/amd/{bilby,mandolin}: Turn empty `chip` entry into comment ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: i'm not sure if that was intentional, but since the lpc uart extension card exists in two options with different sio configuration io base addresses, i don't think that we could just add the device here. since it still works right now, i'd guess that this can be done, but i'd like to verify this on the hardware. i'll try to get around to do that this week -- To view, visit https://review.coreboot.org/c/coreboot/+/57430 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6b606f35eba089b74c562084772d95be41cac39c Gerrit-Change-Number: 57430 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Comment-Date: Mon, 06 Sep 2021 23:21:38 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: ec/acpi: Remove empty "chip" driver
by Nico Huber (Code Review) 06 Sep '21

06 Sep '21

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/57431 ) Change subject: ec/acpi: Remove empty "chip" driver ...................................................................... ec/acpi: Remove empty "chip" driver There was no code attached to this driver and hence one couldn't hook it up to any device. Even if mentioned in the `devicetree.cb` it was still dead code. Change-Id: I12415ea9e0120b1d00524f8f39f9b2d02f46ba05 Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M src/ec/acpi/ec.c M src/mainboard/getac/p470/devicetree.cb M src/mainboard/roda/rk886ex/devicetree.cb 3 files changed, 0 insertions(+), 9 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/57431/1 diff --git a/src/ec/acpi/ec.c b/src/ec/acpi/ec.c index a60de27..5d6fb18 100644 --- a/src/ec/acpi/ec.c +++ b/src/ec/acpi/ec.c @@ -148,7 +148,3 @@ ec_cmd_reg = cmd_reg; ec_data_reg = data_reg; } - -struct chip_operations ec_acpi_ops = { - CHIP_NAME("ACPI Embedded Controller") -}; diff --git a/src/mainboard/getac/p470/devicetree.cb b/src/mainboard/getac/p470/devicetree.cb index 94ffd19..9a91b81 100644 --- a/src/mainboard/getac/p470/devicetree.cb +++ b/src/mainboard/getac/p470/devicetree.cb @@ -123,8 +123,6 @@ end device pnp 4e.b off # HWM end - chip ec/acpi - end end end diff --git a/src/mainboard/roda/rk886ex/devicetree.cb b/src/mainboard/roda/rk886ex/devicetree.cb index b19b7af..6b9dbd9 100644 --- a/src/mainboard/roda/rk886ex/devicetree.cb +++ b/src/mainboard/roda/rk886ex/devicetree.cb @@ -99,9 +99,6 @@ device pnp ff.1 on # dummy address end end - chip ec/acpi - end - end device pci 1f.1 off end # IDE device pci 1f.2 on end # SATA -- To view, visit https://review.coreboot.org/c/coreboot/+/57431 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I12415ea9e0120b1d00524f8f39f9b2d02f46ba05 Gerrit-Change-Number: 57431 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: newchange

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Change in coreboot[master]: Doc/Intel: Remove out-of-date documentation
by Angel Pons (Code Review) 06 Sep '21

06 Sep '21

Attention is currently required from: Paul Menzel, Arthur Heymans, Patrick Rudolph. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57400 ) Change subject: Doc/Intel: Remove out-of-date documentation ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/57400/comment/6450f8f8_61a27ad1 PS1, Line 13: Oh, and it doesn't seem to have a license : associated to it. > AFAIUI, GPL is for code, not documentation. And I don't think licensing works this way. […] Also, note that the commit message states that this doesn't *seem to* have a license associated to it. It might actually have a license, but it's not clear. -- To view, visit https://review.coreboot.org/c/coreboot/+/57400 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If359f554e85d32cdb65c3d928b5155db30bc40a5 Gerrit-Change-Number: 57400 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 06 Sep 2021 22:05:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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coreboot-gerrit September 2021