coreboot-gerrit September 2021

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Change in coreboot[master]: driver/i2c/max98390: add dsm_param_name
by build bot (Jenkins) (Code Review) 07 Sep '21

07 Sep '21

Attention is currently required from: Chen Wisley, Tim Wawrzynczak, Paul Menzel. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57119 ) Change subject: driver/i2c/max98390: add dsm_param_name ...................................................................... Patch Set 18: (2 comments) File src/drivers/i2c/max98390/max98390.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-127586): https://review.coreboot.org/c/coreboot/+/57119/comment/5c35aeca_f14689b0 PS18, Line 30: char dsm_name[80]={}; spaces required around that '=' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-127586): https://review.coreboot.org/c/coreboot/+/57119/comment/ceceb6f0_20514871 PS18, Line 70: snprintf(dsm_name, sizeof(dsm_name), "%s_%s_%s.bin", config->dsm_param_file_name, line over 96 characters -- To view, visit https://review.coreboot.org/c/coreboot/+/57119 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I006572d6a6ea55298374c688dfd9d877835da82d Gerrit-Change-Number: 57119 Gerrit-PatchSet: 18 Gerrit-Owner: Chen Wisley <wisley.chen(a)quantatw.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Keith Tzeng <keith.tzeng(a)quanta.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Attention: Chen Wisley <wisley.chen(a)quantatw.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Tue, 07 Sep 2021 09:33:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/*/brya/variants/brask: Enable dynamic GPIO PM
by Meera Ravindranath (Code Review) 07 Sep '21

07 Sep '21

Meera Ravindranath has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/57443 ) Change subject: mb/*/brya/variants/brask: Enable dynamic GPIO PM ...................................................................... mb/*/brya/variants/brask: Enable dynamic GPIO PM GPIO PM was disabled for brask to evaluate if longer interrupt pulses are required for ADL. Since ADL requires 4us long pulses (EDS:626817), GPIO PM can be enabled. This change drops the GPIO PM override and re-enables dynamic GPIO PM. TEST=Boot brask to OS, ensure no TPM errors. Signed-off-by: Meera Ravindranath <meera.ravindranath(a)intel.com> Change-Id: I0b8b66b5526d8b80775cb7588ce6b12181af7882 --- M src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb 1 file changed, 0 insertions(+), 11 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/57443/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/57443 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0b8b66b5526d8b80775cb7588ce6b12181af7882 Gerrit-Change-Number: 57443 Gerrit-PatchSet: 2 Gerrit-Owner: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: driver/i2c/max98390: add dsm_param_name
by Chen Wisley (Code Review) 07 Sep '21

07 Sep '21

Attention is currently required from: Chen Wisley, Tim Wawrzynczak, Paul Menzel. Hello build bot (Jenkins), Tim Wawrzynczak, Wisley Chen, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/57119 to look at the new patch set (#18). Change subject: driver/i2c/max98390: add dsm_param_name ...................................................................... driver/i2c/max98390: add dsm_param_name Maxim driver look for "maxim,dsm_param_name" to load dsm parameter file. dsm param file name consist of {dsm_param_file_name} filled in devicetree, {MAINBOARD_VENDOR} and {MAINBOARD_PART_NUMBER}. => {dsm_param_file_name}_{MAINBOARD_VENDOR}_{MAINBOARD_PART_NUMBER}.bin BUG=b:197076844 TEST=build, and check ssdt Change-Id: I006572d6a6ea55298374c688dfd9d877835da82d Signed-off-by: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> --- M src/drivers/i2c/max98390/chip.h M src/drivers/i2c/max98390/max98390.c M src/vendorcode/google/chromeos/Kconfig 3 files changed, 24 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/57119/18 -- To view, visit https://review.coreboot.org/c/coreboot/+/57119 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I006572d6a6ea55298374c688dfd9d877835da82d Gerrit-Change-Number: 57119 Gerrit-PatchSet: 18 Gerrit-Owner: Chen Wisley <wisley.chen(a)quantatw.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Keith Tzeng <keith.tzeng(a)quanta.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Attention: Chen Wisley <wisley.chen(a)quantatw.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: cpu/x86/mp_init: Fix false error message on parking APs twice
by Nico Huber (Code Review) 07 Sep '21

07 Sep '21

Attention is currently required from: Johnny Lin, Stefan Reinauer, Angel Pons, Arthur Heymans. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55071 ) Change subject: cpu/x86/mp_init: Fix false error message on parking APs twice ...................................................................... Patch Set 2: (2 comments) Patchset: PS2: > > Why not fix the spurious call instead? […] Why more messy? I'd have expected a simple if (!CONFIG(SUPER_PROPRIETARY_PATH)) call(); Currently, I can't think of anything more messy than adding global state to work around a control flow issue. File src/cpu/x86/mp_init.c: https://review.coreboot.org/c/coreboot/+/55071/comment/d5e46a99_d9e45968 PS2, Line 1056: printk(BIOS_DEBUG, "%s: CPUs already parked\n", __func__); > > > > We know they had been, but what if they aren't anymore? […] They do such horrible things all the time. -- To view, visit https://review.coreboot.org/c/coreboot/+/55071 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I60095cffcb9b31d965b0525ddc3018b592a3e52e Gerrit-Change-Number: 55071 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Tue, 07 Sep 2021 09:24:56 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/intel/adlrvp{p,m}: Enable dynamic GPIO PM
by Meera Ravindranath (Code Review) 07 Sep '21

07 Sep '21

Attention is currently required from: Furquan Shaikh, Maulik V Vaghela, Tim Wawrzynczak, Angel Pons. Meera Ravindranath has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57411 ) Change subject: mb/intel/adlrvp{p,m}: Enable dynamic GPIO PM ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/57411/comment/8dcc9928_34f69d51 PS1, Line 7: Enable dynamic GPIO PM > This change should go before CB:57209 Done -- To view, visit https://review.coreboot.org/c/coreboot/+/57411 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0b7b66b5525d8b80775ab7578ce6b12181af7882 Gerrit-Change-Number: 57411 Gerrit-PatchSet: 2 Gerrit-Owner: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Angel Pons <angel.pons(a)9elements.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Attention: Angel Pons <angel.pons(a)9elements.com> Gerrit-Comment-Date: Tue, 07 Sep 2021 09:24:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brask: Enable dynamic GPIO PM
by Meera Ravindranath (Code Review) 07 Sep '21

07 Sep '21

Meera Ravindranath has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/57443 ) Change subject: mb/google/brask: Enable dynamic GPIO PM ...................................................................... mb/google/brask: Enable dynamic GPIO PM GPIO PM was disabled for brask to evaluate if longer interrupt pulses are required for ADL. Since ADL requires 4us long pulses (EDS:626817), GPIO PM can be enabled. This change drops the GPIO PM override and re-enables dynamic GPIO PM. TEST=Boot brask to OS, ensure no TPM errors. Signed-off-by: Meera Ravindranath <meera.ravindranath(a)intel.com> Change-Id: I0b8b66b5526d8b80775cb7588ce6b12181af7882 --- M src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb 1 file changed, 0 insertions(+), 11 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/57443/1 diff --git a/src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb index cc6664c..1ea2a97 100644 --- a/src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb +++ b/src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb @@ -20,17 +20,6 @@ # Enable heci communication register "HeciEnabled" = "1" - # This disabled autonomous GPIO power management, otherwise - # old cr50 FW only supports short pulses; need to clarify - # the minimum PCH IRQ pulse width with Intel, b/180111628 - register "gpio_override_pm" = "1" - register "gpio_pm[COMM_0]" = "0" - register "gpio_pm[COMM_1]" = "0" - register "gpio_pm[COMM_2]" = "0" - register "gpio_pm[COMM_3]" = "0" - register "gpio_pm[COMM_4]" = "0" - register "gpio_pm[COMM_5]" = "0" - # Enable CNVi BT register "CnviBtCore" = "true" -- To view, visit https://review.coreboot.org/c/coreboot/+/57443 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0b8b66b5526d8b80775cb7588ce6b12181af7882 Gerrit-Change-Number: 57443 Gerrit-PatchSet: 1 Gerrit-Owner: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/intel/adlrvp_p: Enable TCSS USB ports device path
by Sridhar Siricilla (Code Review) 07 Sep '21

07 Sep '21

Attention is currently required from: Maulik V Vaghela, Paul Menzel, Meera Ravindranath, Bernardo Perez Priego, Tim Wawrzynczak, Deepti Deshatty. Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57274 ) Change subject: mb/intel/adlrvp_p: Enable TCSS USB ports device path ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/57274 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iadc0df2e6e29a5afbcbb7db1ae0be6546dbcdc1a Gerrit-Change-Number: 57274 Gerrit-PatchSet: 2 Gerrit-Owner: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Reviewer: Deepti Deshatty <deepti.deshatty(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Attention: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Attention: Deepti Deshatty <deepti.deshatty(a)intel.com> Gerrit-Comment-Date: Tue, 07 Sep 2021 09:06:18 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek: preserve WDT reset reason for debugging
by Yu-Ping Wu (Code Review) 07 Sep '21

07 Sep '21

Attention is currently required from: Rex-BC Chen, Paul Menzel, Felix Held. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57270 ) Change subject: soc/mediatek: preserve WDT reset reason for debugging ...................................................................... Patch Set 6: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/57270 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5887a8312f4daab3cbd0a30fea0195670a932e52 Gerrit-Change-Number: 57270 Gerrit-PatchSet: 6 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Patrick Georgi <pgeorgi(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 07 Sep 2021 09:04:25 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: cpu/x86/mp_init: Fix false error message on parking APs twice
by Arthur Heymans (Code Review) 07 Sep '21

07 Sep '21

Attention is currently required from: Nico Huber, Johnny Lin, Stefan Reinauer, Angel Pons. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55071 ) Change subject: cpu/x86/mp_init: Fix false error message on parking APs twice ...................................................................... Patch Set 2: (1 comment) File src/cpu/x86/mp_init.c: https://review.coreboot.org/c/coreboot/+/55071/comment/c2769a12_31a63a12 PS2, Line 1056: printk(BIOS_DEBUG, "%s: CPUs already parked\n", __func__); > > > We know they had been, but what if they aren't anymore? > > > > What do you mean? There is no code in coreboot to wake APs twice to get them in a ap_wait_for_instruction() state. > > Maybe this code will appear in the future, or maybe a blob wakes up the APs again. That's very specific speculation: the blob AP code would have to call into coreboot code again for this code to be meaningful (romstage AMD AGESA does this, but that's without memory coherency cause no memory ready, so it's not handled by mp init code). It would be a horrible thing to integrate anyway, so let's hope that no silicon vendor ever designs a ramstage blob that way... -- To view, visit https://review.coreboot.org/c/coreboot/+/55071 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I60095cffcb9b31d965b0525ddc3018b592a3e52e Gerrit-Change-Number: 55071 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Tue, 07 Sep 2021 09:03:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/intel/adlrvp_p: Enable TCSS USB ports device path
by Meera Ravindranath (Code Review) 07 Sep '21

07 Sep '21

Attention is currently required from: Maulik V Vaghela, Paul Menzel, Sridhar Siricilla, Bernardo Perez Priego, Tim Wawrzynczak, Deepti Deshatty. Meera Ravindranath has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57274 ) Change subject: mb/intel/adlrvp_p: Enable TCSS USB ports device path ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/57274/comment/3480257e_e82089d6 PS2, Line 8: > So there are exactly four ports? Yes. Please check this - https://review.coreboot.org/plugins/gitiles/coreboot/+/711b6c5c2d9a0833a068… -- To view, visit https://review.coreboot.org/c/coreboot/+/57274 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iadc0df2e6e29a5afbcbb7db1ae0be6546dbcdc1a Gerrit-Change-Number: 57274 Gerrit-PatchSet: 2 Gerrit-Owner: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Reviewer: Deepti Deshatty <deepti.deshatty(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Attention: Deepti Deshatty <deepti.deshatty(a)intel.com> Gerrit-Comment-Date: Tue, 07 Sep 2021 09:03:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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coreboot-gerrit September 2021