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Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56818 )
Change subject: soc/amd/common/block/spi: Don't update spi speed if EFS is changed
......................................................................
Patch Set 2:
(1 comment)
File src/soc/amd/common/block/spi/fch_spi.c:
https://review.coreboot.org/c/coreboot/+/56818/comment/afa72f20_bf7ec833
PS2, Line 84: if (CONFIG(EM100))
: fch_spi_config_em100_modes();
: else
: fch_spi_config_mb_modes();
> This should be completely dropped and instead coreboot should rely on using EFS fields to determine […]
Do you realize that EFS only configures some of the speeds, not all of them?
Do you understand that this would allow us to use EM100 with our pre-built images instead of requiring a rebuild?
Do you realize that not all boards being used right now can run at the higher speeds that we're transitioning to?
With all of that in mind, and understanding that we can't JUST use EFS for configuration, do you still think that this should be dropped?
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Change subject: soc/amd/common/block/spi: Don't update spi speed if EFS is changed
......................................................................
Patch Set 2:
(1 comment)
File src/soc/amd/common/block/spi/fch_spi.c:
https://review.coreboot.org/c/coreboot/+/56818/comment/d938615a_fdf92883
PS2, Line 84: if (CONFIG(EM100))
: fch_spi_config_em100_modes();
: else
: fch_spi_config_mb_modes();
This should be completely dropped and instead coreboot should rely on using EFS fields to determine the speed that must be configured. This is redundant once EFS is used for the configuration.
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Change subject: soc/intel/alderlake: Switch to use common block memory info API
......................................................................
soc/intel/alderlake: Switch to use common block memory info API
API to store memory information has been implemented in intel common block,
this can be utilized by alderlake SOC.
Signed-off-by: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com>
Change-Id: I9c65119629d6890ce079fcdd38644545a2731d66
---
M src/soc/intel/alderlake/Kconfig
M src/soc/intel/alderlake/romstage/romstage.c
2 files changed, 4 insertions(+), 98 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/56612/4
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Change subject: mb/google/brya: create dynamic power limits mechanism for thermal
......................................................................
mb/google/brya: create dynamic power limits mechanism for thermal
Add dynamic power limits selection mechanism for brya board based on
CPU SKUs which is detectable at runtime.
BUG=b:194745919
BRANCH=None
TEST=Build FW and test on brya with below messages,
On brya (282):
Overriding DPTF power limits PL1 (3000, 15000) PL2 (39000, 39000)
On brya (482):
Overriding DPTF power limits PL1 (4000, 28000) PL2 (43000, 43000)
Change-Id: I86619516adeec13642f02ba7faf9fc4945ad774e
Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar(a)intel.com>
---
M src/mainboard/google/brya/mainboard.c
M src/mainboard/google/brya/variants/baseboard/brya/Makefile.inc
A src/mainboard/google/brya/variants/baseboard/brya/ramstage.c
M src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h
4 files changed, 67 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/56515/11
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Change subject: mb/google/dedede: add gooey variant
......................................................................
mb/google/dedede: add gooey variant
gooey is the same design as boten, and differs only
in replacing Cr50 with discrete TPM.
BUG=b:193366710
TEST=FW_NAME=gooey emerge-keeby coreboot
Signed-off-by: stanley.wu <stanley1.wu(a)lcfc.corp-partner.google.com>
Change-Id: I2a54f872a7d5c0bee76a9e6e309613d9357b380b
---
M src/mainboard/google/dedede/Kconfig
M src/mainboard/google/dedede/Kconfig.name
A src/mainboard/google/dedede/variants/gooey/Makefile.inc
A src/mainboard/google/dedede/variants/gooey/gpio.c
A src/mainboard/google/dedede/variants/gooey/include/variant/ec.h
A src/mainboard/google/dedede/variants/gooey/include/variant/gpio.h
A src/mainboard/google/dedede/variants/gooey/memory/Makefile.inc
A src/mainboard/google/dedede/variants/gooey/memory/dram_id.generated.txt
A src/mainboard/google/dedede/variants/gooey/memory/mem_list_variant.txt
A src/mainboard/google/dedede/variants/gooey/overridetree.cb
A src/mainboard/google/dedede/variants/gooey/variant.c
11 files changed, 475 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/56858/3
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