Attention is currently required from: Furquan Shaikh, Caveh Jalali, Matthew Blecker, Tim Wawrzynczak.
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56928 )
Change subject: mb/google/poppy/variants/atlas: stop setting touchscreen probed=1
......................................................................
Patch Set 5:
(2 comments)
Patchset:
PS4:
> The Atlas touchscreen device has had generic.probed=1 since it was first added in https://review. […]
For background: Non-Google/Chromium folk’s access to these bug reports is restricted, and, therefore, as you did, summarizing these issues in the commit message, is very important.
Patchset:
PS5:
> This should be unnecessary anyway, the `probed` property is intended to allow the kernel to send i2c […]
Thank you for the explanation. Matthew, I am sorry for being a pain in your neck, but could you add Tim’s explanation to the commit message too. I know, so much text for a oneline change, but I think it’s good to document it.
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Hello Frans Hendriks, Patrick Rudolph, Jonathan Zhang, Jeremy Soller, Angel Pons, Michael Niewöhner, Patrick Rudolph, Piotr Król, Tim Crawford, Nico Huber, Anjaneya "Reddy" Chagam, Michał Żygowski, Johnny Lin, Tim Wawrzynczak, Christian Walter, Morgan Jang, Wim Vervoorn,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#2).
Change subject: soc/intel/common: Use CHIPSET_LOCKDOWN_COREBOOT by default
......................................................................
soc/intel/common: Use CHIPSET_LOCKDOWN_COREBOOT by default
Since all mainboards use `CHIPSET_LOCKDOWN_COREBOOT`, make it the
default by changing its enum value to 0 and remove its configuration
from all related devicetrees.
If `common_soc_config.chipset_lockdown` is not configured in the
devicetree with something else, `CHIPSET_LOCKDOWN_COREBOOT` is used.
Change-Id: I369f01d3da2e901e2fb57f2c83bd07380f3946a6
Signed-off-by: Felix Singer <felixsinger(a)posteo.net>
---
M src/mainboard/51nb/x210/devicetree.cb
M src/mainboard/asrock/h110m/devicetree.cb
M src/mainboard/clevo/cml-u/variants/l140cu/devicetree.cb
M src/mainboard/clevo/kbl-u/variants/n13xwu/devicetree.cb
M src/mainboard/facebook/monolith/devicetree.cb
M src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb
M src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb
M src/mainboard/google/dedede/variants/baseboard/devicetree.cb
M src/mainboard/google/deltaur/variants/baseboard/devicetree.cb
M src/mainboard/google/drallion/variants/drallion/devicetree.cb
M src/mainboard/google/eve/devicetree.cb
M src/mainboard/google/fizz/variants/baseboard/devicetree.cb
M src/mainboard/google/glados/devicetree.cb
M src/mainboard/google/hatch/variants/baseboard/devicetree.cb
M src/mainboard/google/poppy/variants/atlas/devicetree.cb
M src/mainboard/google/poppy/variants/baseboard/devicetree.cb
M src/mainboard/google/poppy/variants/nami/devicetree.cb
M src/mainboard/google/poppy/variants/nautilus/devicetree.cb
M src/mainboard/google/poppy/variants/nocturne/devicetree.cb
M src/mainboard/google/poppy/variants/rammus/devicetree.cb
M src/mainboard/google/poppy/variants/soraka/devicetree.cb
M src/mainboard/google/sarien/variants/arcada/devicetree.cb
M src/mainboard/google/sarien/variants/sarien/devicetree.cb
M src/mainboard/google/volteer/variants/baseboard/devicetree.cb
M src/mainboard/hp/280_g2/devicetree.cb
M src/mainboard/intel/adlrvp/devicetree.cb
M src/mainboard/intel/adlrvp/devicetree_m.cb
M src/mainboard/intel/cedarisland_crb/devicetree.cb
M src/mainboard/intel/coffeelake_rvp/variants/baseboard/devicetree.cb
M src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/devicetree.cb
M src/mainboard/intel/icelake_rvp/variants/icl_u/devicetree.cb
M src/mainboard/intel/icelake_rvp/variants/icl_y/devicetree.cb
M src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb
M src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb
M src/mainboard/intel/kunimitsu/devicetree.cb
M src/mainboard/intel/saddlebrook/devicetree.cb
M src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb
M src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb
M src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb
M src/mainboard/kontron/bsl6/devicetree.cb
M src/mainboard/libretrend/lt1000/devicetree.cb
M src/mainboard/ocp/deltalake/devicetree.cb
M src/mainboard/ocp/tiogapass/devicetree.cb
M src/mainboard/prodrive/hermes/devicetree.cb
M src/mainboard/protectli/vault_kbl/devicetree.cb
M src/mainboard/purism/librem_cnl/variants/librem_14/devicetree.cb
M src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb
M src/mainboard/purism/librem_skl/devicetree.cb
M src/mainboard/razer/blade_stealth_kbl/devicetree.cb
M src/mainboard/siemens/chili/variants/base/devicetree.cb
M src/mainboard/siemens/chili/variants/chili/devicetree.cb
M src/mainboard/siemens/mc_ehl/variants/mc_ehl1/devicetree.cb
M src/mainboard/supermicro/x11-lga1151-series/devicetree.cb
M src/mainboard/system76/gaze15/devicetree.cb
M src/mainboard/system76/lemp9/devicetree.cb
M src/mainboard/system76/oryp5/devicetree.cb
M src/mainboard/system76/oryp6/devicetree.cb
M src/mainboard/system76/whl-u/devicetree.cb
M src/soc/intel/common/block/include/intelblocks/cfg.h
59 files changed, 2 insertions(+), 160 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/56967/2
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Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56868 )
Change subject: crossgcc: upgrade Expat from 2.2.9 to 2.4.1
......................................................................
Patch Set 2:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/56868/comment/fb636f2d_529c675b
PS2, Line 11: crossgcc
… with GDB.
Patchset:
PS1:
> the default config for emulation/qemu-i440fx produced a coreboot.rom with the following sha256sum: […]
Thank you for the test. Looking more into it, Expat is only used for GDB, so the ROMs should not change, and did *not* for me for commit e72dc3d46ab (mb/google/auron/var/lulu: Uniformise dual-channel handling) for the config below.
$ more defconfig
CONFIG_CBFS_SIZE=0x00040000
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_UART_PCI_ADDR=0x0
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
CONFIG_CONSOLE_QEMU_DEBUGCON_PORT=0x402
CONFIG_POST_IO_PORT=0x80
CONFIG_PAYLOAD_NONE=y
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Change subject: Documentation/util/kconfig: Remove silentoldconfig
......................................................................
Patch Set 1: Code-Review+2
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Change subject: mb/google/guybrush/var/baseboard: Set Clk request for WLAN/SD/WWAN/SSD device
......................................................................
Patch Set 6:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/56895/comment/2de916e9_ed664558
PS5, Line 7: mb/google/guybrush/var/baseboard: Set Clk request for WLAN/SD/WWAN/SSD device.
> Please remove the dot/period at the end of the git commit message summary.
Done
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Hello build bot (Jenkins), Martin Roth, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/56895
to look at the new patch set (#6).
Change subject: mb/google/guybrush/var/baseboard: Set Clk request for WLAN/SD/WWAN/SSD device
......................................................................
mb/google/guybrush/var/baseboard: Set Clk request for WLAN/SD/WWAN/SSD device
Setting the clock source depends on clock request pin for WLAN/SD/SSD device. Also turn off the unused (4/5/6) clock sources.
In guybrush, clock source 0/1/2/3 are routed for WLAN/SD/WWAN/SSD device.
BUG=b:186384256
BRANCH=none
TEST=Verify the config setting can update to the GPPCLKCONTROL registers.
Signed-off-by: Patrick Huang <patrick.huang(a)amd.corp-partner.google.com>
Change-Id: I240543e92cbc178cee034c37d7c26da0a6bbb7f6
---
M src/mainboard/google/guybrush/variants/baseboard/devicetree.cb
1 file changed, 9 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/56895/6
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