coreboot-gerrit August 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: vc/google/chromeos: Add support for new SAR tables revisions
by Sugnan Prabhu S (Code Review) 17 Aug '21

17 Aug '21

Attention is currently required from: Furquan Shaikh, Tim Wawrzynczak, Paul Menzel. Hello build bot (Jenkins), Furquan Shaikh, Tim Wawrzynczak, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/56750 to look at the new patch set (#14). Change subject: vc/google/chromeos: Add support for new SAR tables revisions ...................................................................... vc/google/chromeos: Add support for new SAR tables revisions Existing SAR infrastructure supports only revision 0 of the SAR tables. This patch modifies it to extend support intel wifi 6 and wifi 6e configs as per the connectivity document: 559910_Intel_Connectivity_Platforms_BIOS_Guidelines_Rev6_4.pdf The SAR table and WGDS configuration blocks size with in the earlier SAR binary was static with option to enable WGDS block dynamically using a coreboot config. The new binary format can support to have any block as dynamic and the size of the configuration block depends on the revision of the entry. This patch also adds support for PPAG ACPI entries related to antenna gains. BUG=b:193665559 TEST=Checked the SSDT entries for WRDS, EWRD, WGDS and PPAG with different binaries generated by setting different versions in the config.star Change-Id: I08c3f321938eba04e8bcff4d87cb215422715bb2 Signed-off-by: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com> --- M src/drivers/wifi/generic/Kconfig M src/drivers/wifi/generic/Makefile.inc M src/drivers/wifi/generic/acpi.c M src/include/sar.h M src/vendorcode/google/chromeos/Makefile.inc M src/vendorcode/google/chromeos/sar.c 6 files changed, 372 insertions(+), 84 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/56750/14 -- To view, visit https://review.coreboot.org/c/coreboot/+/56750 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I08c3f321938eba04e8bcff4d87cb215422715bb2 Gerrit-Change-Number: 56750 Gerrit-PatchSet: 14 Gerrit-Owner: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-CC: Jamie Chen <jamie.chen(a)intel.com> Gerrit-CC: Janiex Tu <janiex.tu(a)intel.corp-partner.google.com> Gerrit-CC: Matt Chen <matt.chen(a)intel.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-CC: Simon Yang <simon1.yang(a)intel.com> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/guybrush: Enable STT in device tree
by Paul Menzel (Code Review) 17 Aug '21

17 Aug '21

Attention is currently required from: Diana Zigterman, Jason Glenesk, Nikolai Vyssotski. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55434 ) Change subject: mb/google/guybrush: Enable STT in device tree ...................................................................... Patch Set 3: (1 comment) File src/mainboard/google/guybrush/variants/baseboard/devicetree.cb: https://review.coreboot.org/c/coreboot/+/55434/comment/fa0c82c3_e9797afe PS3, Line 66: register "stt_skin_temp_apu" = "0x2D00" > Thanks Paul. […] Agreed. It’d be great, if you could add it to your internal tracker somewhere. -- To view, visit https://review.coreboot.org/c/coreboot/+/55434 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I37b5da1b56586ef75ad17f6766cd00ddac87aa5a Gerrit-Change-Number: 55434 Gerrit-PatchSet: 3 Gerrit-Owner: Jason Glenesk <jason.glenesk(a)amd.corp-partner.google.com> Gerrit-Reviewer: Diana Zigterman <dzigterman(a)google.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Matt Papageorge <matthewpapa07(a)gmail.com> Gerrit-Reviewer: Nikolai Vyssotski <nikolai.vyssotski(a)amd.corp-partner.google.com> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Diana Zigterman <dzigterman(a)google.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)amd.corp-partner.google.com> Gerrit-Attention: Nikolai Vyssotski <nikolai.vyssotski(a)amd.corp-partner.google.com> Gerrit-Comment-Date: Tue, 17 Aug 2021 07:38:33 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Jason Glenesk <jason.glenesk(a)amd.corp-partner.google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: elog: define RW_ELOG constant
by Paul Menzel (Code Review) 17 Aug '21

17 Aug '21

Attention is currently required from: Furquan Shaikh, Ricardo Quesada. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56986 ) Change subject: elog: define RW_ELOG constant ...................................................................... Patch Set 1: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/56986/comment/95a747d1_77ce84a1 PS1, Line 7: elog: define RW_ELOG constant Please be more specific by adding “region name”(?) somewhere. Maybe: > Define constant for RW region name https://review.coreboot.org/c/coreboot/+/56986/comment/e394e9bc_7b55d5ec PS1, Line 9: This CL indroduces the ELOG_RW_REGION_NAME. : This constant replaced the hardcoded "RW_ELOG" value. : This constant will be used also by elogtool (see CL in the commit : chain). Please do not break lines after each sentence. (If so, please separate paragraphs by a blank line.) -- To view, visit https://review.coreboot.org/c/coreboot/+/56986 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie8d31204e65fd67d52b0f8ced7b8c1ffdcf5b539 Gerrit-Change-Number: 56986 Gerrit-PatchSet: 1 Gerrit-Owner: Ricardo Quesada <ricardoq(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Jack Rosenthal <jrosenth(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Ricardo Quesada <ricardoq(a)google.com> Gerrit-Comment-Date: Tue, 17 Aug 2021 07:36:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/dedede/var/corori: Generate RAM ID and SPD file
by Paul Menzel (Code Review) 17 Aug '21

17 Aug '21

Attention is currently required from: Ian Feng, Henry Sun, Shou-Chieh Hsu, Karthik Ramasubramanian. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56988 ) Change subject: mb/google/dedede/var/corori: Generate RAM ID and SPD file ...................................................................... Patch Set 1: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/56988/comment/1ef01b84_db5cb430 PS1, Line 13: Maybe mention, that some generic file `lp4x-spd-1.hex` can be used for that? File src/mainboard/google/dedede/variants/corori/memory/mem_parts_used.txt: https://review.coreboot.org/c/coreboot/+/56988/comment/3f9c8d20_f9e56a65 PS1, Line 11: # Part Name Should this stay in the file? -- To view, visit https://review.coreboot.org/c/coreboot/+/56988 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia11b5db145deeea838a8f5949accdb11e13342f2 Gerrit-Change-Number: 56988 Gerrit-PatchSet: 1 Gerrit-Owner: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Alan Lee <alan_lee(a)compal.corp-partner.google.com> Gerrit-CC: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-CC: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-CC: Ivy Jian <ivy_jian(a)compal.corp-partner.google.com> Gerrit-CC: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Attention: Henry Sun <henrysun(a)google.com> Gerrit-Attention: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Tue, 17 Aug 2021 07:32:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: [WIP] util/liveiso: Add documentation about persistent storage
by Paul Menzel (Code Review) 17 Aug '21

17 Aug '21

Attention is currently required from: Felix Singer. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56983 ) Change subject: [WIP] util/liveiso: Add documentation about persistent storage ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: Nit: I’d prefre if you indented the code blocks by four spaces instead of using the GitHub syntax with ```. -- To view, visit https://review.coreboot.org/c/coreboot/+/56983 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If298049c16712a5fdf99a8b953402cf5a0d265e9 Gerrit-Change-Number: 56983 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Comment-Date: Tue, 17 Aug 2021 07:31:15 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya: reduce RW_MRC_CACHE size to 64K
by Paul Menzel (Code Review) 17 Aug '21

17 Aug '21

Attention is currently required from: Tim Wawrzynczak, Nick Vaccaro. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56989 ) Change subject: mb/google/brya: reduce RW_MRC_CACHE size to 64K ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/56989/comment/d395ae73_91983bc2 PS1, Line 8: Why? Please add the motivation/reasoning to the commit message. -- To view, visit https://review.coreboot.org/c/coreboot/+/56989 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I74365b795e184b92f483ae2bf862791e235c5362 Gerrit-Change-Number: 56989 Gerrit-PatchSet: 1 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Comment-Date: Tue, 17 Aug 2021 07:28:32 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/zork: only enable RTD2141 when present
by Paul Menzel (Code Review) 17 Aug '21

17 Aug '21

Attention is currently required from: Kangheui Won, Peter Marheine. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56990 ) Change subject: mb/google/zork: only enable RTD2141 when present ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/56990/comment/412663cd_097e5964 PS2, Line 10: fw_config : probe With three options? -- To view, visit https://review.coreboot.org/c/coreboot/+/56990 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4ada9b492ab221fa98350bf2faf27a23342f3a55 Gerrit-Change-Number: 56990 Gerrit-PatchSet: 2 Gerrit-Owner: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Sam McNally <sammc(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kangheui Won <khwon(a)chromium.org> Gerrit-Attention: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Comment-Date: Tue, 17 Aug 2021 07:19:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Irms UPD enable
by Paul Menzel (Code Review) 17 Aug '21

17 Aug '21

Attention is currently required from: V Sowmya, Maulik V Vaghela, Tim Wawrzynczak, Subrata Banik, Sridhar Siricilla, Balaji Manigandan, Ronak Kanabar, Kane Chen, Srinidhi N Kaushik, Patrick Rudolph. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56330 ) Change subject: soc/intel/alderlake: Irms UPD enable ...................................................................... Patch Set 7: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/56330/comment/47637640_f3df9396 PS7, Line 7: Irms UPD enable Please make it a statement [1]. [1]: https://chris.beams.io/posts/git-commit/ https://review.coreboot.org/c/coreboot/+/56330/comment/354f6cef_3367b778 PS7, Line 8: Please elaborate. -- To view, visit https://review.coreboot.org/c/coreboot/+/56330 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ice5c775ef9560503109957a1ed994af1d287aafc Gerrit-Change-Number: 56330 Gerrit-PatchSet: 7 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Kane Chen <kane.chen(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: V Sowmya <v.sowmya(a)intel.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Kane Chen <kane.chen(a)intel.com> Gerrit-Attention: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Tue, 17 Aug 2021 07:17:24 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Move INTEL_CAR_NEM selection from SoC to mainboard
by Paul Menzel (Code Review) 17 Aug '21

17 Aug '21

Attention is currently required from: Furquan Shaikh, Tim Wawrzynczak, Subrata Banik, Meera Ravindranath, Patrick Rudolph. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56993 ) Change subject: soc/intel/alderlake: Move INTEL_CAR_NEM selection from SoC to mainboard ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/56993/comment/fefa6ae8_7c4c1ba4 PS1, Line 11: feature on OEM/ODM reference designs. Were problems observed? -- To view, visit https://review.coreboot.org/c/coreboot/+/56993 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I709185159d9869501b1d8e8d00f6d25ec77838bf Gerrit-Change-Number: 56993 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Tue, 17 Aug 2021 07:14:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/wifi/generic: Enable DSM ACPI entries for Intel WIFI card
by build bot (Jenkins) (Code Review) 17 Aug '21

17 Aug '21

Attention is currently required from: Furquan Shaikh, Paul Menzel, Tim Wawrzynczak, Rizwan Qureshi. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56751 ) Change subject: drivers/wifi/generic: Enable DSM ACPI entries for Intel WIFI card ...................................................................... Patch Set 12: (2 comments) File src/drivers/wifi/generic/acpi.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-126288): https://review.coreboot.org/c/coreboot/+/56751/comment/c2f46c0c_b0a37c6c PS12, Line 50: void wifi_write_dsm(const char *uuid, void (**callbacks)(void *), size_t count, function definition argument 'void' should also have an identifier name Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-126288): https://review.coreboot.org/c/coreboot/+/56751/comment/ed366bb4_fe6278b5 PS12, Line 50: void wifi_write_dsm(const char *uuid, void (**callbacks)(void *), size_t count, function definition argument 'void *' should also have an identifier name -- To view, visit https://review.coreboot.org/c/coreboot/+/56751 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie154edf188531fe6c260274edaa694cf3b3605d3 Gerrit-Change-Number: 56751 Gerrit-PatchSet: 12 Gerrit-Owner: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-CC: Jamie Chen <jamie.chen(a)intel.com> Gerrit-CC: Janiex Tu <janiex.tu(a)intel.corp-partner.google.com> Gerrit-CC: Matt Chen <matt.chen(a)intel.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Sherry An <sherry.an(a)intel.com> Gerrit-CC: Simon Yang <simon1.yang(a)intel.com> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Comment-Date: Tue, 17 Aug 2021 07:07:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit August 2021