coreboot-gerrit August 2021

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Change in coreboot[master]: acpigen: Add ability to auto-generate _DSM Function 0
by Sugnan Prabhu S (Code Review) 18 Aug '21

18 Aug '21

Attention is currently required from: Furquan Shaikh, Tim Wawrzynczak, EricR Lai. Sugnan Prabhu S has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56459 ) Change subject: acpigen: Add ability to auto-generate _DSM Function 0 ...................................................................... Patch Set 6: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/56459 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id9be050442485b42202cf91649aa94e56f35032a Gerrit-Change-Number: 56459 Gerrit-PatchSet: 6 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Wed, 18 Aug 2021 01:15:29 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/cezanne: Disable Co-op multitasking
by Jason Glenesk (Code Review) 18 Aug '21

18 Aug '21

Attention is currently required from: Raul Rangel, Marshall Dawson, Felix Held. Jason Glenesk has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57005 ) Change subject: soc/amd/cezanne: Disable Co-op multitasking ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/57005 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia3143f538a31b5aaaea104aa1d8bcf44e6dcb528 Gerrit-Change-Number: 57005 Gerrit-PatchSet: 1 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Nikolai Vyssotski <nikolai.vyssotski(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 18 Aug 2021 01:01:00 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/adl: Update PCI ID for ADL-M SKU
by Selma Bensaid (Code Review) 18 Aug '21

18 Aug '21

Attention is currently required from: Bora Guvendik, Anil Kumar K, Tim Wawrzynczak, Sumeet R Pawnikar, Patrick Rudolph. Selma Bensaid has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56846 ) Change subject: soc/intel/adl: Update PCI ID for ADL-M SKU ...................................................................... Patch Set 3: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/56846 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia2c5ce270bc421d8a41cc4bc6ce0b51987d2aaec Gerrit-Change-Number: 56846 Gerrit-PatchSet: 3 Gerrit-Owner: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 18 Aug 2021 00:29:54 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/cezanne: Disable Co-op multitasking
by Nikolai Vyssotski (Code Review) 18 Aug '21

18 Aug '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Felix Held. Nikolai Vyssotski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57005 ) Change subject: soc/amd/cezanne: Disable Co-op multitasking ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/57005 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia3143f538a31b5aaaea104aa1d8bcf44e6dcb528 Gerrit-Change-Number: 57005 Gerrit-PatchSet: 1 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Nikolai Vyssotski <nikolai.vyssotski(a)amd.corp-partner.google.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 17 Aug 2021 23:56:33 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in coreboot[master]: tests: Add lib/fmap-test test case
by Name of user not set (Code Review) 18 Aug '21

18 Aug '21

Name of user not set #1003143 has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/48557 ) Change subject: tests: Add lib/fmap-test test case ...................................................................... tests: Add lib/fmap-test test case Signed-off-by: Jakub Czapiga <jacz(a)semihalf.com> Change-Id: I885ea05d509d3b1330de7a18531f310d290c6965 --- A tests/include/lib/fmap/fmap_config.h A tests/include/lib/fmap/fmap_data.h M tests/lib/Makefile.inc A tests/lib/fmap-test.c 4 files changed, 563 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/48557/1 diff --git a/tests/include/lib/fmap/fmap_config.h b/tests/include/lib/fmap/fmap_config.h new file mode 100644 index 0000000..c735330 --- /dev/null +++ b/tests/include/lib/fmap/fmap_config.h @@ -0,0 +1,87 @@ +#ifndef FMAPTOOL_GENERATED_HEADER_H_ +#define FMAPTOOL_GENERATED_HEADER_H_ + +/* + * This file was generated using fmaptool from util/cbfstools using + * src/mainboard/google/octopus/chromeos.fmd + * FMAP_OFFSET was changed to zero for testing purposes. + */ +#define FMAP_OFFSET 0x204000 +#define FMAP_SIZE 0x620 + +#define FMAP_SECTION_FLASH_START 0 +#define FMAP_SECTION_FLASH_SIZE 0x1000000 +#define FMAP_SECTION_WP_RO_START 0 +#define FMAP_SECTION_WP_RO_SIZE 0x400000 +#define FMAP_SECTION_SI_DESC_START 0 +#define FMAP_SECTION_SI_DESC_SIZE 0x1000 +#define FMAP_SECTION_IFWI_START 0x1000 +#define FMAP_SECTION_IFWI_SIZE 0x1ff000 +#define FMAP_SECTION_RO_VPD_START 0x200000 +#define FMAP_SECTION_RO_VPD_SIZE 0x4000 +#define FMAP_SECTION_RO_SECTION_START 0x204000 +#define FMAP_SECTION_RO_SECTION_SIZE 0x1fc000 +#define FMAP_SECTION_FMAP_START 0x204000 +#define FMAP_SECTION_FMAP_SIZE 0x800 +#define FMAP_SECTION_RO_FRID_START 0x204800 +#define FMAP_SECTION_RO_FRID_SIZE 0x40 +#define FMAP_SECTION_RO_FRID_PAD_START 0x204840 +#define FMAP_SECTION_RO_FRID_PAD_SIZE 0x7c0 +#define FMAP_SECTION_COREBOOT_START 0x205000 +#define FMAP_SECTION_COREBOOT_SIZE 0x1f8000 +#define FMAP_SECTION_GBB_START 0x3fd000 +#define FMAP_SECTION_GBB_SIZE 0x3000 +#define FMAP_SECTION_MISC_RW_START 0x400000 +#define FMAP_SECTION_MISC_RW_SIZE 0x30000 +#define FMAP_SECTION_RW_PRESERVE_START 0x400000 +#define FMAP_SECTION_RW_PRESERVE_SIZE 0x21000 +#define FMAP_SECTION_UNIFIED_MRC_CACHE_START 0x400000 +#define FMAP_SECTION_UNIFIED_MRC_CACHE_SIZE 0x21000 +#define FMAP_SECTION_RECOVERY_MRC_CACHE_START 0x400000 +#define FMAP_SECTION_RECOVERY_MRC_CACHE_SIZE 0x10000 +#define FMAP_SECTION_RW_MRC_CACHE_START 0x410000 +#define FMAP_SECTION_RW_MRC_CACHE_SIZE 0x10000 +#define FMAP_SECTION_RW_VAR_MRC_CACHE_START 0x420000 +#define FMAP_SECTION_RW_VAR_MRC_CACHE_SIZE 0x1000 +#define FMAP_SECTION_RW_ELOG_START 0x421000 +#define FMAP_SECTION_RW_ELOG_SIZE 0x3000 +#define FMAP_SECTION_RW_SHARED_START 0x424000 +#define FMAP_SECTION_RW_SHARED_SIZE 0x4000 +#define FMAP_SECTION_SHARED_DATA_START 0x424000 +#define FMAP_SECTION_SHARED_DATA_SIZE 0x2000 +#define FMAP_SECTION_VBLOCK_DEV_START 0x426000 +#define FMAP_SECTION_VBLOCK_DEV_SIZE 0x2000 +#define FMAP_SECTION_RW_VPD_START 0x428000 +#define FMAP_SECTION_RW_VPD_SIZE 0x2000 +#define FMAP_SECTION_RW_NVRAM_START 0x42a000 +#define FMAP_SECTION_RW_NVRAM_SIZE 0x5000 +#define FMAP_SECTION_FPF_STATUS_START 0x42f000 +#define FMAP_SECTION_FPF_STATUS_SIZE 0x1000 +#define FMAP_SECTION_RW_SECTION_A_START 0x430000 +#define FMAP_SECTION_RW_SECTION_A_SIZE 0x480000 +#define FMAP_SECTION_VBLOCK_A_START 0x430000 +#define FMAP_SECTION_VBLOCK_A_SIZE 0x10000 +#define FMAP_SECTION_FW_MAIN_A_START 0x440000 +#define FMAP_SECTION_FW_MAIN_A_SIZE 0x46ffc0 +#define FMAP_SECTION_RW_FWID_A_START 0x8affc0 +#define FMAP_SECTION_RW_FWID_A_SIZE 0x40 +#define FMAP_SECTION_RW_SECTION_B_START 0x8b0000 +#define FMAP_SECTION_RW_SECTION_B_SIZE 0x480000 +#define FMAP_SECTION_VBLOCK_B_START 0x8b0000 +#define FMAP_SECTION_VBLOCK_B_SIZE 0x10000 +#define FMAP_SECTION_FW_MAIN_B_START 0x8c0000 +#define FMAP_SECTION_FW_MAIN_B_SIZE 0x46ffc0 +#define FMAP_SECTION_RW_FWID_B_START 0xd2ffc0 +#define FMAP_SECTION_RW_FWID_B_SIZE 0x40 +#define FMAP_SECTION_SMMSTORE_START 0xd30000 +#define FMAP_SECTION_SMMSTORE_SIZE 0x40000 +#define FMAP_SECTION_RW_LEGACY_START 0xd70000 +#define FMAP_SECTION_RW_LEGACY_SIZE 0x1c0000 +#define FMAP_SECTION_BIOS_UNUSABLE_START 0xf30000 +#define FMAP_SECTION_BIOS_UNUSABLE_SIZE 0x4f000 +#define FMAP_SECTION_DEVICE_EXTENSION_START 0xf7f000 +#define FMAP_SECTION_DEVICE_EXTENSION_SIZE 0x80000 +//#define FMAP_SECTION_UNUSED_HOLE_START 0xfff000 +#define FMAP_SECTION_UNUSED_HOLE_SIZE 0x1000 + +#endif diff --git a/tests/include/lib/fmap/fmap_data.h b/tests/include/lib/fmap/fmap_data.h new file mode 100644 index 0000000..343feef --- /dev/null +++ b/tests/include/lib/fmap/fmap_data.h @@ -0,0 +1,148 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef TESTS_INCLUDE_LIB_FMAP_FMAP_DATA_H_ +#define TESTS_INCLUDE_LIB_FMAP_FMAP_DATA_H_ + +/* + * This file was converted using `xxd -i` from binary output of + * fmaptool from util/cbfstools. Data is based on output generated by + * mentioned tool using src/mainboard/google/octopus/chromeos.fmd file. + */ + +unsigned char tests_fmap_bin[] = { +0x5f, 0x5f, 0x46, 0x4d, 0x41, 0x50, 0x5f, 0x5f, 0x01, 0x01, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x46, 0x4c, +0x41, 0x53, 0x48, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x24, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x40, 0x00, 0x57, 0x50, 0x5f, 0x52, 0x4f, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x53, 0x49, +0x5f, 0x44, 0x45, 0x53, 0x43, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, +0x00, 0xf0, 0x1f, 0x00, 0x49, 0x46, 0x57, 0x49, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x40, 0x00, 0x00, 0x52, 0x4f, +0x5f, 0x56, 0x50, 0x44, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x40, 0x20, 0x00, +0x00, 0xc0, 0x1f, 0x00, 0x52, 0x4f, 0x5f, 0x53, 0x45, 0x43, 0x54, 0x49, +0x4f, 0x4e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x40, 0x20, 0x00, 0x00, 0x08, 0x00, 0x00, 0x46, 0x4d, +0x41, 0x50, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x48, 0x20, 0x00, +0x40, 0x00, 0x00, 0x00, 0x52, 0x4f, 0x5f, 0x46, 0x52, 0x49, 0x44, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x40, 0x48, 0x20, 0x00, 0xc0, 0x07, 0x00, 0x00, 0x52, 0x4f, +0x5f, 0x46, 0x52, 0x49, 0x44, 0x5f, 0x50, 0x41, 0x44, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x20, 0x00, +0x00, 0x80, 0x1f, 0x00, 0x43, 0x4f, 0x52, 0x45, 0x42, 0x4f, 0x4f, 0x54, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0xd0, 0x3f, 0x00, 0x00, 0x30, 0x00, 0x00, 0x47, 0x42, +0x42, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00, +0x00, 0x00, 0x03, 0x00, 0x4d, 0x49, 0x53, 0x43, 0x5f, 0x52, 0x57, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x10, 0x02, 0x00, 0x52, 0x57, +0x5f, 0x50, 0x52, 0x45, 0x53, 0x45, 0x52, 0x56, 0x45, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x40, 0x00, +0x00, 0x10, 0x02, 0x00, 0x55, 0x4e, 0x49, 0x46, 0x49, 0x45, 0x44, 0x5f, +0x4d, 0x52, 0x43, 0x5f, 0x43, 0x41, 0x43, 0x48, 0x45, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x01, 0x00, 0x52, 0x45, +0x43, 0x4f, 0x56, 0x45, 0x52, 0x59, 0x5f, 0x4d, 0x52, 0x43, 0x5f, 0x43, +0x41, 0x43, 0x48, 0x45, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x41, 0x00, +0x00, 0x00, 0x01, 0x00, 0x52, 0x57, 0x5f, 0x4d, 0x52, 0x43, 0x5f, 0x43, +0x41, 0x43, 0x48, 0x45, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x42, 0x00, 0x00, 0x10, 0x00, 0x00, 0x52, 0x57, +0x5f, 0x56, 0x41, 0x52, 0x5f, 0x4d, 0x52, 0x43, 0x5f, 0x43, 0x41, 0x43, +0x48, 0x45, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x42, 0x00, +0x00, 0x30, 0x00, 0x00, 0x52, 0x57, 0x5f, 0x45, 0x4c, 0x4f, 0x47, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x08, 0x00, 0x00, 0x40, 0x42, 0x00, 0x00, 0x40, 0x00, 0x00, 0x52, 0x57, +0x5f, 0x53, 0x48, 0x41, 0x52, 0x45, 0x44, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x42, 0x00, +0x00, 0x20, 0x00, 0x00, 0x53, 0x48, 0x41, 0x52, 0x45, 0x44, 0x5f, 0x44, +0x41, 0x54, 0x41, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x60, 0x42, 0x00, 0x00, 0x20, 0x00, 0x00, 0x56, 0x42, +0x4c, 0x4f, 0x43, 0x4b, 0x5f, 0x44, 0x45, 0x56, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x42, 0x00, +0x00, 0x20, 0x00, 0x00, 0x52, 0x57, 0x5f, 0x56, 0x50, 0x44, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x08, 0x00, 0x00, 0xa0, 0x42, 0x00, 0x00, 0x50, 0x00, 0x00, 0x52, 0x57, +0x5f, 0x4e, 0x56, 0x52, 0x41, 0x4d, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0xf0, 0x42, 0x00, +0x00, 0x10, 0x00, 0x00, 0x46, 0x50, 0x46, 0x5f, 0x53, 0x54, 0x41, 0x54, +0x55, 0x53, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x43, 0x00, 0x00, 0x00, 0x48, 0x00, 0x52, 0x57, +0x5f, 0x53, 0x45, 0x43, 0x54, 0x49, 0x4f, 0x4e, 0x5f, 0x41, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x43, 0x00, +0x00, 0x00, 0x01, 0x00, 0x56, 0x42, 0x4c, 0x4f, 0x43, 0x4b, 0x5f, 0x41, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x44, 0x00, 0xc0, 0xff, 0x46, 0x00, 0x46, 0x57, +0x5f, 0x4d, 0x41, 0x49, 0x4e, 0x5f, 0x41, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0x8a, 0x00, +0x40, 0x00, 0x00, 0x00, 0x52, 0x57, 0x5f, 0x46, 0x57, 0x49, 0x44, 0x5f, +0x41, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x8b, 0x00, 0x00, 0x00, 0x48, 0x00, 0x52, 0x57, +0x5f, 0x53, 0x45, 0x43, 0x54, 0x49, 0x4f, 0x4e, 0x5f, 0x42, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x8b, 0x00, +0x00, 0x00, 0x01, 0x00, 0x56, 0x42, 0x4c, 0x4f, 0x43, 0x4b, 0x5f, 0x42, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x8c, 0x00, 0xc0, 0xff, 0x46, 0x00, 0x46, 0x57, +0x5f, 0x4d, 0x41, 0x49, 0x4e, 0x5f, 0x42, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xd2, 0x00, +0x40, 0x00, 0x00, 0x00, 0x52, 0x57, 0x5f, 0x46, 0x57, 0x49, 0x44, 0x5f, +0x42, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0xd3, 0x00, 0x00, 0x00, 0x04, 0x00, 0x53, 0x4d, +0x4d, 0x53, 0x54, 0x4f, 0x52, 0x45, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0xd7, 0x00, +0x00, 0x00, 0x1c, 0x00, 0x52, 0x57, 0x5f, 0x4c, 0x45, 0x47, 0x41, 0x43, +0x59, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0xf3, 0x00, 0x00, 0xf0, 0x04, 0x00, 0x42, 0x49, +0x4f, 0x53, 0x5f, 0x55, 0x4e, 0x55, 0x53, 0x41, 0x42, 0x4c, 0x45, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xf7, 0x00, +0x00, 0x00, 0x08, 0x00, 0x44, 0x45, 0x56, 0x49, 0x43, 0x45, 0x5f, 0x45, +0x58, 0x54, 0x45, 0x4e, 0x53, 0x49, 0x4f, 0x4e, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0xf0, 0xff, 0x00, 0x00, 0x10, 0x00, 0x00, 0x55, 0x4e, +0x55, 0x53, 0x45, 0x44, 0x5f, 0x48, 0x4f, 0x4c, 0x45, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 +}; +unsigned int tests_fmap_bin_len = 1568; + + +#endif /* TESTS_INCLUDE_LIB_FMAP_FMAP_DATA_H_ */ diff --git a/tests/lib/Makefile.inc b/tests/lib/Makefile.inc index 5783f18..6948588 100644 --- a/tests/lib/Makefile.inc +++ b/tests/lib/Makefile.inc @@ -9,6 +9,7 @@ tests-y += cbmem_console-romstage-test tests-y += cbmem_console-ramstage-test tests-y += list-test +tests-y += fmap-test string-test-srcs += tests/lib/string-test.c string-test-srcs += src/lib/string.c @@ -44,3 +45,10 @@ list-test-srcs += tests/lib/list-test.c list-test-srcs += src/lib/list.c +fmap-test-srcs += tests/lib/fmap-test.c +fmap-test-srcs += src/lib/fmap.c +fmap-test-srcs += tests/stubs/console.c +fmap-test-srcs += src/lib/boot_device.c +fmap-test-srcs += src/commonlib/region.c +fmap-test-cflags += -I tests/include/lib/fmap +fmap-test-cflags += -I 3rdparty/vboot/firmware/include diff --git a/tests/lib/fmap-test.c b/tests/lib/fmap-test.c new file mode 100644 index 0000000..2b7605d --- /dev/null +++ b/tests/lib/fmap-test.c @@ -0,0 +1,320 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <stdlib.h> +#include <string.h> + +#include <fmap.h> +#include <commonlib/region.h> + +#include <tests/test.h> + +#include <lib/fmap/fmap_data.h> +#include <lib/fmap/fmap_config.h> + +static struct region_device *rdev_root = NULL; +static char *flash_buffer = NULL; +static size_t flash_buffer_size = 0; + +static void *local_mmap(const struct region_device *rdev, size_t offset, size_t size) +{ + if (offset >= FMAP_SECTION_FLASH_START + && offset < FMAP_SECTION_FLASH_START + FMAP_SECTION_FLASH_SIZE) + return flash_buffer + offset; + + return NULL; +} + +static int local_unmap(const struct region_device *rdev, void *mapping) +{ + return 0; +} + +static ssize_t local_readat(const struct region_device *rdev, void *buffer, + size_t offset, size_t size) +{ + if (size + offset >= flash_buffer_size) + return -1; + + size = MIN(size, flash_buffer_size - offset); + + memcpy(buffer, flash_buffer + offset, size); + + return size; +} + +static ssize_t local_writeat(const struct region_device *rdev, const void *buffer, + size_t offset, size_t size) +{ + if (size + offset >= flash_buffer_size) + return -1; + + size = MIN(size, flash_buffer_size - offset); + + memcpy(flash_buffer + offset, buffer, size); + + return size; +} + +static ssize_t local_eraseat(const struct region_device *rdev, + size_t offset, size_t size) +{ + if (size + offset >= flash_buffer_size) + return -1; + + size = MIN(size, flash_buffer_size - offset); + + memset(flash_buffer + offset, 0, size); + + return size; +} + +static int setup_fmap_region_device(void **state) +{ + // Setup callbacks + struct region_device_ops *rdev_ops = malloc(sizeof(*rdev_ops)); + rdev_ops->mmap = local_mmap; + rdev_ops->munmap = local_unmap; + rdev_ops->readat = local_readat; + rdev_ops->writeat = local_writeat; + rdev_ops->eraseat = local_eraseat; + + // Prepare root region device + struct region_device rdev_new_root = REGION_DEV_INIT(rdev_ops, + FMAP_SECTION_FLASH_START, FMAP_SECTION_FLASH_SIZE); + rdev_root = malloc(sizeof(rdev_new_root)); + memcpy(rdev_root, &rdev_new_root, sizeof(rdev_new_root)); + + // Prepare fmap region device + struct region_device rdev_fmap = REGION_DEV_INIT(rdev_ops, + FMAP_SECTION_FMAP_START, FMAP_SECTION_FMAP_SIZE); + rdev_fmap.root = rdev_root; + + // Pass fmap region device to tests as state + *state = malloc(sizeof(rdev_fmap)); + memcpy(*state, &rdev_fmap, sizeof(rdev_fmap)); + + // Prepare flash buffer with dummy data and FMAP + flash_buffer = malloc(FMAP_SECTION_FLASH_SIZE); + flash_buffer_size = FMAP_SECTION_FLASH_SIZE; + memset(flash_buffer, 0, FMAP_SECTION_FLASH_SIZE); + for (int i = 0; i < FMAP_SECTION_FMAP_START; ++i) + flash_buffer[i] = 'a' + i % ('z' - 'a'); + memcpy(flash_buffer + FMAP_SECTION_FMAP_START, tests_fmap_bin, FMAP_SIZE); + for (int i = FMAP_SECTION_FMAP_START + FMAP_SECTION_FMAP_SIZE; + i < FMAP_SECTION_FLASH_SIZE; ++i) + flash_buffer[i] = 'a' + i % ('z' - 'a'); + + return 0; +} + +static int teardown_fmap_region_device(void **state) +{ + struct region_device *rdev_fmap = *state; + + free((void *)rdev_fmap->ops); + free(rdev_fmap); + + free(rdev_root); + rdev_root = NULL; + + free(flash_buffer); + flash_buffer = NULL; + flash_buffer_size = 0; + + return 0; +} + +void boot_device_init(void) +{ + // Setup in unit test setup function +} + +const struct region_device *boot_device_ro(void) +{ + return rdev_root; +} + +const struct region_device *boot_device_rw(void) +{ + return rdev_root; +} + +static void test_fmap_locate_area_as_rdev(void **state) +{ + struct region_device *rdev = *state; + + assert_int_not_equal(-1, fmap_locate_area_as_rdev("RO_VPD", rdev)); + + // Check if locating area second time works + assert_int_not_equal(-1, fmap_locate_area_as_rdev("RO_VPD", rdev)); + + assert_int_not_equal(-1, fmap_locate_area_as_rdev("RECOVERY_MRC_CACHE", rdev)); + + // Expect error when looking for non-existent area + assert_int_equal(-1, fmap_locate_area_as_rdev("NONEXISTENT_AREA", rdev)); + + assert_int_equal(-1, fmap_locate_area_as_rdev("", rdev)); + + // Expect error when passing invalid references + assert_int_equal(-1, fmap_locate_area_as_rdev(NULL, rdev)); + assert_int_equal(-1, fmap_locate_area_as_rdev("RW_SECTION_A", NULL)); +} + + +static void test_fmap_locate_area_as_rdev_rw(void **state) +{ + struct region_device *rdev = *state; + + assert_int_not_equal(-1, fmap_locate_area_as_rdev_rw("RW_SECTION_A", rdev)); + + // Check if locating area second time works + assert_int_not_equal(-1, fmap_locate_area_as_rdev_rw("RW_SECTION_A", rdev)); + + assert_int_not_equal(-1, fmap_locate_area_as_rdev_rw("MISC_RW", rdev)); + + // Expect error when looking for non-existent area + assert_int_equal(-1, fmap_locate_area_as_rdev_rw("NONEXISTENT_AREA", rdev)); + assert_int_equal(-1, fmap_locate_area_as_rdev_rw("", rdev)); + + // Expect error when passing invalid references + assert_int_equal(-1, fmap_locate_area_as_rdev_rw(NULL, rdev)); + assert_int_equal(-1, fmap_locate_area_as_rdev_rw("RW_SECTION_A", NULL)); +} + +static void test_fmap_locate_area(void **state) +{ + (void)state; + struct region ar; + + assert_int_not_equal(-1, fmap_locate_area("COREBOOT", &ar)); + + // Check if locating area second time works + assert_int_not_equal(-1, fmap_locate_area("COREBOOT", &ar)); + + assert_int_not_equal(-1, fmap_locate_area("GBB", &ar)); + + // Expect error when looking for non-existent area + assert_int_equal(-1, fmap_locate_area("NONEXISTENT_AREA", &ar)); + assert_int_equal(-1, fmap_locate_area("", &ar)); + + // Expect error when passing invalid references + assert_int_equal(-1, fmap_locate_area(NULL, &ar)); + assert_int_equal(-1, fmap_locate_area("SHARED_DATA", NULL)); +} + +static void test_fmap_find_region_name(void **state) +{ + (void)state; + struct region ar; + char found_area_name[FMAP_STRLEN] = ""; + const char *area_name = "RW_PRESERVE"; + + // Find area by name + assert_int_not_equal(-1, fmap_locate_area(area_name, &ar)); + + // Find name by previously find area + assert_int_not_equal(-1, fmap_find_region_name(&ar, found_area_name)); + assert_string_equal(area_name, found_area_name); + + // Expect error when passing invalid buffer + assert_int_equal(-1, fmap_find_region_name(&ar, NULL)); + + // Try to find non-existent area + ar.offset = 2142037; + ar.size = 636; + assert_int_equal(-1, fmap_find_region_name(&ar, found_area_name)); + + // Expect error when passing invalid region pointer + assert_int_equal(-1, fmap_find_region_name(NULL, found_area_name)); +} + +static void test_fmap_read_area(void **state) +{ + (void)state; + struct region ar; + char *buffer = malloc(FMAP_SECTION_RW_SECTION_A_SIZE); + + fmap_locate_area("RW_SECTION_A", &ar); + assert_int_equal(FMAP_SECTION_RW_SECTION_A_SIZE, + fmap_read_area("RW_SECTION_A", buffer, FMAP_SECTION_RW_SECTION_A_SIZE)); + assert_memory_equal(flash_buffer + FMAP_SECTION_RW_SECTION_A_START, buffer, + FMAP_SECTION_RW_SECTION_A_SIZE); + + assert_int_equal(-1, + fmap_read_area("NONEXISTENT_SECTION", + buffer, + FMAP_SECTION_RW_SECTION_A_SIZE)); + + assert_int_equal(-1, fmap_read_area(NULL, buffer, FMAP_SECTION_RW_SECTION_A_SIZE)); + assert_int_equal(-1, + fmap_read_area("RW_SECTION_A", NULL, FMAP_SECTION_RW_SECTION_A_SIZE)); + + free(buffer); +} + +static void test_fmap_overwrite_area(void **state) +{ + (void)state; + struct region ar; + char *buffer1 = malloc(FMAP_SECTION_FW_MAIN_A_SIZE); + char *buffer2 = malloc(FMAP_SECTION_FW_MAIN_A_SIZE); + char *new_data = malloc(FMAP_SECTION_FW_MAIN_A_SIZE); + + fmap_locate_area("FW_MAIN_A", &ar); + assert_int_equal(FMAP_SECTION_FW_MAIN_A_SIZE, + fmap_read_area("FW_MAIN_A", buffer1, FMAP_SECTION_FW_MAIN_A_SIZE)); + + memset(new_data, 0x42, FMAP_SECTION_FW_MAIN_A_SIZE); + assert_int_equal(FMAP_SECTION_FW_MAIN_A_SIZE, + fmap_overwrite_area("FW_MAIN_A", + new_data, + FMAP_SECTION_FW_MAIN_A_SIZE)); + + assert_int_equal(FMAP_SECTION_FW_MAIN_A_SIZE, + fmap_read_area("FW_MAIN_A", buffer2, FMAP_SECTION_FW_MAIN_A_SIZE)); + + assert_memory_not_equal(buffer1, buffer2, FMAP_SECTION_FW_MAIN_A_SIZE); + assert_memory_equal(buffer2, new_data, FMAP_SECTION_FW_MAIN_A_SIZE); + + assert_int_equal(-1, + fmap_overwrite_area("NONEXISTENT_SECTION", + new_data, + FMAP_SECTION_FW_MAIN_A_SIZE)); + + assert_int_equal(-1, + fmap_overwrite_area(NULL, new_data, FMAP_SECTION_FW_MAIN_A_SIZE)); + + assert_int_equal(-1, + fmap_overwrite_area("FW_MAIN_A", NULL, FMAP_SECTION_FW_MAIN_A_SIZE)); + + + free(buffer1); + free(buffer2); + free(new_data); +} + +int main(void) +{ + const struct CMUnitTest tests[] = { + cmocka_unit_test_setup_teardown(test_fmap_locate_area_as_rdev, + setup_fmap_region_device, + teardown_fmap_region_device), + cmocka_unit_test_setup_teardown(test_fmap_locate_area_as_rdev_rw, + setup_fmap_region_device, + teardown_fmap_region_device), + cmocka_unit_test_setup_teardown(test_fmap_locate_area, + setup_fmap_region_device, + teardown_fmap_region_device), + cmocka_unit_test_setup_teardown(test_fmap_find_region_name, + setup_fmap_region_device, + teardown_fmap_region_device), + cmocka_unit_test_setup_teardown(test_fmap_read_area, + setup_fmap_region_device, + teardown_fmap_region_device), + cmocka_unit_test_setup_teardown(test_fmap_overwrite_area, + setup_fmap_region_device, + teardown_fmap_region_device), + }; + + return cmocka_run_group_tests(tests, NULL, NULL); +} -- To view, visit https://review.coreboot.org/c/coreboot/+/48557 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I885ea05d509d3b1330de7a18531f310d290c6965 Gerrit-Change-Number: 48557 Gerrit-PatchSet: 1 Gerrit-Owner: Name of user not set #1003143 Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/amd/cezanne: Disable Co-op multitasking
by Karthik Ramasubramanian (Code Review) 18 Aug '21

18 Aug '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Felix Held. Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57005 ) Change subject: soc/amd/cezanne: Disable Co-op multitasking ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/57005 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia3143f538a31b5aaaea104aa1d8bcf44e6dcb528 Gerrit-Change-Number: 57005 Gerrit-PatchSet: 1 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 17 Aug 2021 23:46:34 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/cezanne: Disable Co-op multitasking
by Raul Rangel (Code Review) 18 Aug '21

18 Aug '21

Raul Rangel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/57005 ) Change subject: soc/amd/cezanne: Disable Co-op multitasking ...................................................................... soc/amd/cezanne: Disable Co-op multitasking There are gremlins in the system. thread_coop_enable has an assert. This is currently problematic for two reasons. assert(current->can_yield <= 0); When doing smm_do_relocate we are entering a deadlock. The root cause hasn't been quite found yet, but it's related to co-op multi-threading. For some reason the assert in thread_coop_enable is firing when releasing the console_lock spin lock. I'm assuming cpu_info hasn't been initialized yet. The assert tries to perform a printk, but since the console_lock is still held we end up in a dead lock. This dead lock will generally not happen after a warm reset. Again I'm assuming because the cpu_info struct has some valid values at this point. For now disable multi-tasking until we fix the cpu_info initialization. BUG=b:194391185 TEST=Boot guybrush to OS Co-developed-by: nikolai.vyssotski(a)amd.corp-partner.google.com Signed-off-by: Raul E Rangel <rrangel(a)chromium.org> Change-Id: Ia3143f538a31b5aaaea104aa1d8bcf44e6dcb528 --- M src/soc/amd/cezanne/Kconfig 1 file changed, 0 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/57005/1 diff --git a/src/soc/amd/cezanne/Kconfig b/src/soc/amd/cezanne/Kconfig index 306f181..81597d0 100644 --- a/src/soc/amd/cezanne/Kconfig +++ b/src/soc/amd/cezanne/Kconfig @@ -18,7 +18,6 @@ select BOOT_DEVICE_SUPPORTS_WRITES if BOOT_DEVICE_SPI_FLASH select DRIVERS_USB_ACPI select DRIVERS_I2C_DESIGNWARE - select COOP_MULTITASKING select DRIVERS_USB_PCI_XHCI select FSP_COMPRESS_FSP_M_LZMA select FSP_COMPRESS_FSP_S_LZMA @@ -31,7 +30,6 @@ select IDT_IN_EVERY_STAGE select IOAPIC select PARALLEL_MP_AP_WORK - select PAYLOAD_PRELOAD select PLATFORM_USES_FSP2_0 select PROVIDES_ROM_SHARING select RESET_VECTOR_IN_RAM -- To view, visit https://review.coreboot.org/c/coreboot/+/57005 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia3143f538a31b5aaaea104aa1d8bcf44e6dcb528 Gerrit-Change-Number: 57005 Gerrit-PatchSet: 1 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: Add console deinit API, use in SMM handler
by Deomid "rojer" Ryabkov (Code Review) 18 Aug '21

18 Aug '21

Attention is currently required from: Nico Huber, Jonathan Zhang, Johnny Lin, Paul Menzel, Christian Walter, Rocky Phagura, Angel Pons, Arthur Heymans, Kyösti Mälkki. Deomid "rojer" Ryabkov has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56386 ) Change subject: Add console deinit API, use in SMM handler ...................................................................... Patch Set 11: (1 comment) Patchset: PS11: this has been up for a while now. ping? -- To view, visit https://review.coreboot.org/c/coreboot/+/56386 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia5e51f385f83cb998c244ca1d1ffc10339d3a714 Gerrit-Change-Number: 56386 Gerrit-PatchSet: 11 Gerrit-Owner: Deomid "rojer" Ryabkov <rojer9(a)fb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Rocky Phagura Gerrit-Reviewer: Rocky Phagura <rphagura(a)fb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Rocky Phagura <rphagura(a)fb.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Tue, 17 Aug 2021 23:02:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: google/trogdor: Read SKU ID as binary-first base3 strapping
by Shelley Chen (Code Review) 18 Aug '21

18 Aug '21

Attention is currently required from: Philip Chen, Julius Werner. Shelley Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57004 ) Change subject: google/trogdor: Read SKU ID as binary-first base3 strapping ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/57004 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia7f749fa042d3eac76bfe1e74531905c6e279ad2 Gerrit-Change-Number: 57004 Gerrit-PatchSet: 1 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Philip Chen <philipchen(a)google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Philip Chen <philipchen(a)google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Tue, 17 Aug 2021 21:16:14 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: google/trogdor: Read SKU ID as binary-first base3 strapping
by Julius Werner (Code Review) 18 Aug '21

18 Aug '21

Attention is currently required from: Shelley Chen, Philip Chen. Hello Shelley Chen, Philip Chen, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/57004 to review the following change. Change subject: google/trogdor: Read SKU ID as binary-first base3 strapping ...................................................................... google/trogdor: Read SKU ID as binary-first base3 strapping We're running out of SKU IDs in the base2 system, so convert it to binary-first base3. Signed-off-by: Julius Werner <jwerner(a)chromium.org> Change-Id: Ia7f749fa042d3eac76bfe1e74531905c6e279ad2 --- M src/mainboard/google/trogdor/boardid.c 1 file changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/57004/1 diff --git a/src/mainboard/google/trogdor/boardid.c b/src/mainboard/google/trogdor/boardid.c index ddb240a..c972160 100644 --- a/src/mainboard/google/trogdor/boardid.c +++ b/src/mainboard/google/trogdor/boardid.c @@ -51,9 +51,9 @@ if (id == UNDEFINED_STRAPPING_ID) { if (use_old_pins()) - id = gpio_base2_value(old_pins, ARRAY_SIZE(old_pins)); + id = gpio_binary_first_base3_value(old_pins, ARRAY_SIZE(old_pins)); else - id = gpio_base2_value(pins, ARRAY_SIZE(pins)); + id = gpio_binary_first_base3_value(pins, ARRAY_SIZE(pins)); } return id; -- To view, visit https://review.coreboot.org/c/coreboot/+/57004 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia7f749fa042d3eac76bfe1e74531905c6e279ad2 Gerrit-Change-Number: 57004 Gerrit-PatchSet: 1 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Philip Chen <philipchen(a)google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Philip Chen <philipchen(a)google.com> Gerrit-MessageType: newchange

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coreboot-gerrit August 2021