Werner Zeh has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/55991 )
Change subject: Documentation: Remove KASAN from the project ideas list
......................................................................
Documentation: Remove KASAN from the project ideas list
This project is already implemented and therefore should not be
mentioned anymore as a new project idea in the documentation.
Change-Id: I38c6e274e416b98485943d36536a57a14743945b
Signed-off-by: Werner Zeh <werner.zeh(a)siemens.com>
---
M Documentation/contributing/project_ideas.md
1 file changed, 0 insertions(+), 19 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/55991/1
diff --git a/Documentation/contributing/project_ideas.md b/Documentation/contributing/project_ideas.md
index 141023f..2f6f738 100644
--- a/Documentation/contributing/project_ideas.md
+++ b/Documentation/contributing/project_ideas.md
@@ -66,25 +66,6 @@
### Mentors
* Timothy Pearson <tpearson(a)raptorengineering.com>
-## Add Kernel Address Sanitizer functionality to coreboot
-The Kernel Address Sanitizer (KASAN) is a runtime dynamic memory error detector.
-The idea is to check every memory access (variables) for its validity
-during runtime and find bugs like stack overflow or out-of-bounds accesses.
-Implementing this stub into coreboot like "Undefined behavior sanitizer support"
-would help to ensure code quality and make the runtime code more robust.
-
-### Requirements
-* knowledge in the coreboot build system and the concept of stages
-* the KASAN feature can be improved in a way so that the memory space needed
- during runtime is not on a fixed address provided during compile time but
- determined during runtime. For this to achieve a small patch to the GCC will
- be helpful. Therefore minor GCC knowledge would be beneficial.
-* Implementation can be initially done in QEMU and improved on different
- mainboards and platforms
-
-### Mentors
-* Werner Zeh <werner.zeh(a)gmx.net>
-
## Port payloads to ARM, AArch64 or RISC-V
While we have a rather big set of payloads for x86 based platforms, all other
architectures are rather limited. Improve the situation by porting a payload
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I38c6e274e416b98485943d36536a57a14743945b
Gerrit-Change-Number: 55991
Gerrit-PatchSet: 1
Gerrit-Owner: Werner Zeh <werner.zeh(a)siemens.com>
Gerrit-MessageType: newchange
Attention is currently required from: Chen Wisley.
Wisley Chen has uploaded a new patch set (#6) to the change originally created by Chen Wisley. ( https://review.coreboot.org/c/coreboot/+/55885 )
Change subject: mb/google/brya/var/redrix: Generate SPD ID for supported parts
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mb/google/brya/var/redrix: Generate SPD ID for supported parts
Add supported memory parts in mem_parts_used.txt, and generate
SPD id for these parts.
MT53E1G32D2NP-046 WT:A
H9HCNNNBKMMLXR-NEE
K4U6E3S4AA-MGCR
MT53E512M32D2NP-046 WT:E
H9HCNNNCPMMLXR-NEE
K4UBE3D4AA-MGCR
H9HCNNNFAMMLXR-NEE
MT53E2G32D4NQ-046 WT:A
BUG=b:190818098, b:190874372, b:192052098
TEST=build
Change-Id: I62ee401e43bef22b4b09f41ea59bbdbc479f293c
Signed-off-by: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com>
---
M src/mainboard/google/brya/variants/redrix/memory/Makefile.inc
M src/mainboard/google/brya/variants/redrix/memory/dram_id.generated.txt
M src/mainboard/google/brya/variants/redrix/memory/mem_parts_used.txt
3 files changed, 22 insertions(+), 13 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/55885/6
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Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com>
Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
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