coreboot-gerrit June 2021

coreboot-gerrit@coreboot.org

1 participants
7127 discussions

Change in coreboot[master]: Documentation: Add proposal to allow enabling serial console with a flag
by Patrick Georgi (Code Review) 02 Jun '21

02 Jun '21

Attention is currently required from: Stefan Reinauer. Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54385 ) Change subject: Documentation: Add proposal to allow enabling serial console with a flag ...................................................................... Patch Set 2: (1 comment) File Documentation/technotes/2021-05-selectable-serial-console.md: https://review.coreboot.org/c/coreboot/+/54385/comment/bf3e92cb_4898ab9f PS1, Line 112: and change the default to whatever is found there. > The VPD driver is terribly inefficient in pre-RAM stages so I really wouldn't want it used for this. […] I updated the proposal to use a cbfs file (created with cbfstool add-int). -- To view, visit https://review.coreboot.org/c/coreboot/+/54385 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If1b0efc55880095f9d5d6d6e448f2c8677d57ff5 Gerrit-Change-Number: 54385 Gerrit-PatchSet: 2 Gerrit-Owner: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Comment-Date: Wed, 02 Jun 2021 15:03:54 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: console: Allow disabling compiled in slow coreboot consoles
by Patrick Georgi (Code Review) 02 Jun '21

02 Jun '21

Hello build bot (Jenkins), Greg Edelston, Julius Werner, Angel Pons, Dossym Nurmukhanov, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/45208 to look at the new patch set (#5). Change subject: console: Allow disabling compiled in slow coreboot consoles ...................................................................... console: Allow disabling compiled in slow coreboot consoles Allow disabling slow consoles such as the serial output by adding a file "disable-slow-consoles" to CBFS. This allows using an image for both deployment and testing scenarios with only the CBFS entry modified to toggle (the typically slow) serial console. This feature is hidden behind a default-off Kconfig flag and is also transparent in that a lack of the file keeps all consoles enabled like before. BUG=b:151346403 BRANCH=none TEST=Taking a Chrome OS config for google/eve, it behaves as expected with no entry present and both entry states with negligible performance loss. Change-Id: I4f1f5c45e5ea889176d04e0db438ca2aa7c536ee Signed-off-by: Patrick Georgi <pgeorgi(a)google.com> --- M src/console/Kconfig M src/console/init.c 2 files changed, 37 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/45208/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/45208 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4f1f5c45e5ea889176d04e0db438ca2aa7c536ee Gerrit-Change-Number: 45208 Gerrit-PatchSet: 5 Gerrit-Owner: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Dossym Nurmukhanov <dossym(a)google.com> Gerrit-Reviewer: Greg Edelston <gredelston(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: Documentation: Add proposal to allow enabling serial console with a flag
by Patrick Georgi (Code Review) 02 Jun '21

02 Jun '21

Attention is currently required from: Stefan Reinauer. Hello build bot (Jenkins), Stefan Reinauer, Julius Werner, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/54385 to look at the new patch set (#2). Change subject: Documentation: Add proposal to allow enabling serial console with a flag ...................................................................... Documentation: Add proposal to allow enabling serial console with a flag BUG=b:172341184, b:151780766 Change-Id: If1b0efc55880095f9d5d6d6e448f2c8677d57ff5 Signed-off-by: Patrick Georgi <pgeorgi(a)google.com> --- A Documentation/technotes/2021-05-selectable-serial-console.md M Documentation/technotes/index.md 2 files changed, 126 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/54385/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/54385 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If1b0efc55880095f9d5d6d6e448f2c8677d57ff5 Gerrit-Change-Number: 54385 Gerrit-PatchSet: 2 Gerrit-Owner: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: soc/amd/picasso: remove warm reset flag code
by Marshall Dawson (Code Review) 02 Jun '21

02 Jun '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Felix Held. Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55059 ) Change subject: soc/amd/picasso: remove warm reset flag code ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/55059 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4e6df98ffd5d15ca204c9847a76c19c753726737 Gerrit-Change-Number: 55059 Gerrit-PatchSet: 3 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 02 Jun 2021 15:00:03 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in coreboot[master]: [WIP]Allow to build romstage sources inside the bootblock
by Aaron Durbin (Code Review) 02 Jun '21

02 Jun '21

Attention is currently required from: Arthur Heymans, Raul Rangel, Furquan Shaikh, Philipp Hug, ron minnich, Stefan Reinauer, Angel Pons, Subrata Banik, Julius Werner, Andrey Petrov, Patrick Rudolph, Piotr Król, Jason Glenesk, Michał Żygowski, Martin Roth, Marshall Dawson, Ron Minnich, Felix Held. Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55068 ) Change subject: [WIP]Allow to build romstage sources inside the bootblock ...................................................................... Patch Set 4: (1 comment) Patchset: PS4: > > Could you please elaborate on what diligence was done in the analysis w.r.t. semantics of existing code? I know we've built a lot of infrastructure around ENV_x, etc. This change obviously allows previously mutually exclusive settings to coexist. > > So version 1 of this path did the same without touching rules.h. You end up needing a lot of 'ENV_ROMSTAGE || ENV_BOOTBLOCK && !CONFIG(SEPARATE_ROMSTAGE)' in the code which makes maintaining it a lot harder. As you generally want to take the paths romstage took in bootblock, like init cbmem, run ramstage/postcar , ... this seemed like a good idea. > > There are places where this is weird or where things might break, a few I could think of: > - ASAS is only initialized inside the romstage entry stub > - the Kconfig flag NO_BOOTBLOCK_CONSOLE or !BOOTBLOCK_CONSOLE possibly breaks things as console is likely not optional in romstage. > > I don't have a strong opinion on redefining ENV_ROMSTAGE, but it looks to me as the easiest way to achieve this setup. I was thinking of similar stanzas like this: https://review.coreboot.org/plugins/gitiles/coreboot/+/refs/heads/master/sr… While the cbmem hooks don't necessarily apply here as problematic, I was thinking there are other places where there's if/else assuming mutual exclusion for the ENV_* macros. I wasn't suggesting a change to the approach. I wanted to hear about what was uncovered in the existing code base w.r.t. implicit assumptions. -- To view, visit https://review.coreboot.org/c/coreboot/+/55068 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id68390edc1ba228b121cca89b80c64a92553e284 Gerrit-Change-Number: 55068 Gerrit-PatchSet: 4 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Ron Minnich <rminnich(a)gmail.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ron minnich <rminnich(a)chromium.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Branden Waldner <scruffy99(a)gmail.com> Gerrit-CC: Keith Hui <buurin(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Philipp Hug <philipp(a)hug.cx> Gerrit-Attention: ron minnich <rminnich(a)chromium.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Ron Minnich <rminnich(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 02 Jun 2021 14:53:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Comment-In-Reply-To: Aaron Durbin <adurbin(a)chromium.org> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: src/intel/xeon_sp: add hardware error support (HEST)
by Arthur Heymans (Code Review) 02 Jun '21

02 Jun '21

Attention is currently required from: Marc Jones, Anjaneya "Reddy" Chagam, Jonathan Zhang, Johnny Lin, Rocky Phagura, Tim Wawrzynczak, David Hendricks, Angel Pons, Morgan Jang, Patrick Rudolph, Tim Chu. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52090 ) Change subject: src/intel/xeon_sp: add hardware error support (HEST) ...................................................................... Patch Set 21: Code-Review+2 (1 comment) File src/soc/intel/xeon_sp/uncore.c: https://review.coreboot.org/c/coreboot/+/52090/comment/85ee2378_5fe1a460 PS19, Line 96: const uintptr_t cbmem_top_mb = ALIGN_UP((uintptr_t)cbmem_top(), MiB) / MiB; > It will conflict with DPR. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/52090 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If76b2af153616182cc053ca878f30fe056e9c8bd Gerrit-Change-Number: 52090 Gerrit-PatchSet: 21 Gerrit-Owner: Rocky Phagura Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Anjaneya "Reddy" Chagam <anjaneya.chagam(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Morgan Jang <Morgan_Jang(a)wiwynn.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rocky Phagura <rphagura(a)fb.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Attention: Anjaneya "Reddy" Chagam <anjaneya.chagam(a)intel.com> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Rocky Phagura <rphagura(a)fb.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Rocky Phagura Gerrit-Attention: Morgan Jang <Morgan_Jang(a)wiwynn.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Wed, 02 Jun 2021 14:53:14 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: FSP2.0 platforms: Use bootloader reserved memory for BERT
by build bot (Jenkins) (Code Review) 02 Jun '21

02 Jun '21

Attention is currently required from: Andrey Petrov, Patrick Rudolph. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55142 ) Change subject: FSP2.0 platforms: Use bootloader reserved memory for BERT ...................................................................... Patch Set 1: (1 comment) File src/drivers/intel/fsp2_0/bert.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120544): https://review.coreboot.org/c/coreboot/+/55142/comment/1d22cd49_b700ea2f PS1, Line 11: bootmem_add_range((uint64_t)((uintptr_t)cbmem_top()), CONFIG_ACPI_BERT_SIZE, BM_MEM_RESERVED); line over 96 characters -- To view, visit https://review.coreboot.org/c/coreboot/+/55142 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibd99fc4a89d559be32be69f8fc73c30782e6ae97 Gerrit-Change-Number: 55142 Gerrit-PatchSet: 1 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 02 Jun 2021 14:49:33 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in coreboot[master]: include/smbios.h: Add SMBIOS_FEATURE_FLAG_HOSTING_BOARD
by Sean Rhodes (Code Review) 02 Jun '21

02 Jun '21

Attention is currently required from: Nico Huber, Angel Pons. Sean Rhodes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52795 ) Change subject: include/smbios.h: Add SMBIOS_FEATURE_FLAG_HOSTING_BOARD ...................................................................... Patch Set 5: Code-Review+1 (1 comment) Patchset: PS5: Afternoon I've removed the LOCKDIS patch for now, presuming that will take a while to get the bottom of. Would you mind reviewing the others? Many thanks -- To view, visit https://review.coreboot.org/c/coreboot/+/52795 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I75492a70cfd69d92828622fcf6ab2b690e4c3081 Gerrit-Change-Number: 52795 Gerrit-PatchSet: 5 Gerrit-Owner: Sean Rhodes <admin(a)starlabs.systems> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Sean Rhodes <admin(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Wed, 02 Jun 2021 14:49:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in coreboot[master]: FSP2.0 platforms: Use bootloader reserved memory for BERT
by Tim Wawrzynczak (Code Review) 02 Jun '21

02 Jun '21

Tim Wawrzynczak has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/55142 ) Change subject: FSP2.0 platforms: Use bootloader reserved memory for BERT ...................................................................... FSP2.0 platforms: Use bootloader reserved memory for BERT Currently, a cbmem entry is used to store the BERT data, but when ACPI_BERT is defined, the FSP will save some memory in its reserved area above TOLUM to store the ACPI BERT. This patch moves the area BERT data is stored from cbmem to this reserved region. TEST=1) Trigger an event which will create a BERT 2) Verify BERT contents look valid 3) Ensure reserved region is covered by an e820 entry marked RESERVED 4) Ensure cbmem contents are still valid Signed-off-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Change-Id: Ibd99fc4a89d559be32be69f8fc73c30782e6ae97 --- M src/drivers/intel/fsp2_0/Makefile.inc A src/drivers/intel/fsp2_0/bert.c M src/soc/intel/common/block/acpi/Kconfig M src/soc/intel/common/block/systemagent/memmap.c 4 files changed, 32 insertions(+), 10 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/55142/1 diff --git a/src/drivers/intel/fsp2_0/Makefile.inc b/src/drivers/intel/fsp2_0/Makefile.inc index 3bbc722..6a98c8a 100644 --- a/src/drivers/intel/fsp2_0/Makefile.inc +++ b/src/drivers/intel/fsp2_0/Makefile.inc @@ -27,6 +27,7 @@ ramstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c ramstage-y += util.c ramstage-$(CONFIG_MMA) += mma_core.c +ramstage-$(CONFIG_ACPI_BERT) += bert.c ifneq ($(CONFIG_NO_FSP_TEMP_RAM_EXIT),y) postcar-$(CONFIG_FSP_CAR) += temp_ram_exit.c diff --git a/src/drivers/intel/fsp2_0/bert.c b/src/drivers/intel/fsp2_0/bert.c new file mode 100644 index 0000000..85bbc53 --- /dev/null +++ b/src/drivers/intel/fsp2_0/bert.c @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <arch/bert_storage.h> +#include <bootmem.h> +#include <cbmem.h> +#include <console/console.h> +#include <types.h> + +void bootmem_platform_add_ranges(void) +{ + bootmem_add_range((uint64_t)((uintptr_t)cbmem_top()), CONFIG_ACPI_BERT_SIZE, BM_MEM_RESERVED); +} + +void bert_reserved_region(void **start, size_t *size) +{ + *start = cbmem_top(); + *size = CONFIG_ACPI_BERT_SIZE; + printk(BIOS_DEBUG, "Using FSP reserved memory for ACPI BERT, start %lx, size %zx\n", + (uintptr_t)*start, *size); +} diff --git a/src/soc/intel/common/block/acpi/Kconfig b/src/soc/intel/common/block/acpi/Kconfig index 6aa3abc..5b2b48a 100644 --- a/src/soc/intel/common/block/acpi/Kconfig +++ b/src/soc/intel/common/block/acpi/Kconfig @@ -21,6 +21,17 @@ help Generate crash data for BERT table +if SOC_INTEL_COMMON_BLOCK_CRASHLOG + +config ACPI_BERT_SIZE + hex + default 0x10000 if ACPI_BERT + default 0x0 + help + Specify the amount of DRAM reserved for gathering the data used to + generate the ACPI table. +endif + if SOC_INTEL_COMMON_BLOCK_ACPI config SOC_INTEL_COMMON_BLOCK_ACPI_CPPC diff --git a/src/soc/intel/common/block/systemagent/memmap.c b/src/soc/intel/common/block/systemagent/memmap.c index a67d050..09d13fc 100644 --- a/src/soc/intel/common/block/systemagent/memmap.c +++ b/src/soc/intel/common/block/systemagent/memmap.c @@ -50,22 +50,12 @@ * +---------------------------+ 0 */ -#define BERT_REGION_MAX_SIZE 0x10000 - void smm_region(uintptr_t *start, size_t *size) { *start = sa_get_tseg_base(); *size = sa_get_tseg_size(); } -void bert_reserved_region(void **start, size_t *size) -{ - *start = cbmem_add(CBMEM_ID_ACPI_BERT, BERT_REGION_MAX_SIZE); - *size = BERT_REGION_MAX_SIZE; - - printk(BIOS_DEBUG, "Reserving BERT start %lx, size %zx\n", (uintptr_t)*start, *size); -} - void fill_postcar_frame(struct postcar_frame *pcf) { /* FSP does not seem to bother w.r.t. alignment when asked to place cbmem_top() */ -- To view, visit https://review.coreboot.org/c/coreboot/+/55142 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibd99fc4a89d559be32be69f8fc73c30782e6ae97 Gerrit-Change-Number: 55142 Gerrit-PatchSet: 1 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: newchange

1 0

Change in coreboot[master]: src/intel/xeon_sp: add hardware error support (HEST)
by Rocky Phagura (Code Review) 02 Jun '21

02 Jun '21

Attention is currently required from: Marc Jones, Anjaneya "Reddy" Chagam, Jonathan Zhang, Johnny Lin, Rocky Phagura, Tim Wawrzynczak, David Hendricks, Angel Pons, Arthur Heymans, Morgan Jang, Patrick Rudolph, Tim Chu. Rocky Phagura has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52090 ) Change subject: src/intel/xeon_sp: add hardware error support (HEST) ...................................................................... Patch Set 21: (1 comment) File src/soc/intel/xeon_sp/ras/hest.c: https://review.coreboot.org/c/coreboot/+/52090/comment/0d57db56_e8115202 PS20, Line 80: gnvs = acpi_get_gnvs(); > nit: check for NULL Done... -- To view, visit https://review.coreboot.org/c/coreboot/+/52090 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If76b2af153616182cc053ca878f30fe056e9c8bd Gerrit-Change-Number: 52090 Gerrit-PatchSet: 21 Gerrit-Owner: Rocky Phagura Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Anjaneya "Reddy" Chagam <anjaneya.chagam(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Morgan Jang <Morgan_Jang(a)wiwynn.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rocky Phagura <rphagura(a)fb.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Attention: Anjaneya "Reddy" Chagam <anjaneya.chagam(a)intel.com> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Rocky Phagura <rphagura(a)fb.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Morgan Jang <Morgan_Jang(a)wiwynn.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Wed, 02 Jun 2021 14:43:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

1 0

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit June 2021