Attention is currently required from: Rex-BC Chen.
Hello Hung-Te Lin, build bot (Jenkins), Yu-Ping Wu, DAWEI CHIEN,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/55140
to look at the new patch set (#5).
Change subject: soc/mediatek/mt8195: add SPM loader
......................................................................
soc/mediatek/mt8195: add SPM loader
This patch adds support for loading SPM firmware from CBFS to SPM SRAM.
SPM needs its own firmware to enable SPM suspend/resume function which
turns off several resources such as DRAM/mainpll/26M clk when linux
system suspend.
This adds 43ms to the boot time.
TEST=program counter of SPM is correct value after booting up.
Change-Id: Ia0f9b9f86e44b293c1cc47213946304c64aea75e
Signed-off-by: Dawei Chien <dawei.chien(a)mediatek.com>
Signed-off-by: Edward-JW Yang <edward-jw.yang(a)mediatek.corp-partner.google.com>
---
M src/soc/mediatek/mt8195/Kconfig
M src/soc/mediatek/mt8195/Makefile.inc
M src/soc/mediatek/mt8195/include/soc/spm.h
A src/soc/mediatek/mt8195/spm.c
4 files changed, 1,155 insertions(+), 14 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/55140/5
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Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54966 )
Change subject: drivers/pcie/rtd3/device: Add PCIe RTD3 driver
......................................................................
Patch Set 4:
(1 comment)
File src/soc/amd/common/block/rtd3/rtd3.c:
https://review.coreboot.org/c/coreboot/+/54966/comment/4082459f_75ca444f
PS1, Line 210: pci_dev_read_resources
> So with this approach, the rtd3 driver doesn't write the actual Device node, but just writes a Power […]
We don't really define downstream PCI devices in DSDT or SSDT (https://www.kernel.org/doc/html/latest/PCI/acpi-info.html). Since those are discoverable by the OS, we don't really expose them in ACPI. In this case, I think the rtd3 driver will have to generate the device node i.e. call acpi_device_write_pci_dev and then add the power resource since that falls under "However, ACPI may describe PCI devices if it provides power management or hotplug functionality for them or if the device has INTx interrupts connected by platform interrupt controllers and a _PRT is needed to describe those connections."
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Gerrit-MessageType: comment
Hello Hung-Te Lin, build bot (Jenkins), Yu-Ping Wu, DAWEI CHIEN,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/55140
to look at the new patch set (#4).
Change subject: soc/mediatek/mt8195: add SPM loader
......................................................................
soc/mediatek/mt8195: add SPM loader
This patch adds support for loading SPM firmware from CBFS to SPM SRAM.
SPM needs its own firmware to enable SPM suspend/resume function which
turns off several resources such as DRAM/mainpll/26M clk when linux
system suspend.
This adds 43ms to the boot time.
TEST=program counter of SPM is correct value after booting up.
Change-Id: Ia0f9b9f86e44b293c1cc47213946304c64aea75e
Signed-off-by: Dawei Chien <dawei.chien(a)mediatek.com>
Signed-off-by: Edward-JW Yang <edward-jw.yang(a)mediatek.corp-partner.google.com>
---
M src/soc/mediatek/mt8195/Kconfig
M src/soc/mediatek/mt8195/Makefile.inc
M src/soc/mediatek/mt8195/include/soc/spm.h
A src/soc/mediatek/mt8195/spm.c
4 files changed, 1,155 insertions(+), 14 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/55140/4
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Gerrit-Change-Number: 55140
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Rex-BC Chen has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/55139 )
Change subject: soc/mediatek: Extract spm_parse_firmware to common
......................................................................
soc/mediatek: Extract spm_parse_firmware to common
spm_parse_firmware can be shared by MT8192 and MT8195.
TEST=emerge-asurada coreboot;
Signed-off-by: Rex-BC Chen <rex-bc.chen(a)mediatek.com>
Change-Id: I54d9672aa9ee9078ec9fe3fa4f2e9fe860a50636
---
A src/soc/mediatek/common/include/soc/spm_common.h
A src/soc/mediatek/common/spm.c
M src/soc/mediatek/mt8192/Makefile.inc
M src/soc/mediatek/mt8192/spm.c
4 files changed, 66 insertions(+), 46 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/55139/2
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Attention is currently required from: Tim Wawrzynczak.
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55147 )
Change subject: mb/google/brya/brya0: Fix irq and CS lines for FPMCU
......................................................................
Patch Set 2:
(1 comment)
File src/mainboard/google/brya/variants/brya0/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/55147/comment/183cdc2e_baacb376
PS2, Line 333: device spi 0 on end
> Ack
For SPI, the # actually means CS # --> https://review.coreboot.org/plugins/gitiles/coreboot/+/refs/heads/master/ut…
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