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Change subject: nb/intel: Don't select VBOOT_SEPARATE_VERSTAGE
......................................................................
Patch Set 3:
(2 comments)
Patchset:
PS3:
> Should this change be advertised in the release notes?
Functionally not much changes.
File src/mainboard/emulation/qemu-i440fx/Kconfig:
https://review.coreboot.org/c/coreboot/+/52787/comment/4f5ef3f4_324b5b71
PS1, Line 22: VBOOT_SEPARATE_VERSTAGE
> maybe this one is not too smart as the bootblock size is limited to 64K by the SOUTHBRIDGE_INTEL_I82371EB. I'll check on the sizes
With a lot of options selected it remains far off from 64K.
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Hello Hung-Te Lin, build bot (Jenkins), Yu-Ping Wu, Yidi Lin,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/52668
to look at the new patch set (#6).
Change subject: soc/mediatek/mt8195: add pmif/spmi/pmic driver
......................................................................
soc/mediatek/mt8195: add pmif/spmi/pmic driver
MT8195 also uses mt6359p so we can reuse most drivers.
The only differences are IO configuaration, clock setting, and PMIC
internal setting related to soc.
Reference datasheet: MT6315 datasheet v1.4.2.pdf, RH-D-2019-0616.
Reference datasheet: MT6359_PMIC_Data_Sheet_V1.5.docx, RH-D-2018-0205.
Change-Id: I73f9c9bf92837f262c15758f16dacf52261dd3a3
Signed-off-by: Henry Chen <henryc.chen(a)mediatek.com>
Signed-off-by: Yidi Lin <yidi.lin(a)mediatek.com>
Signed-off-by: Rex-BC Chen <rex-bc.chen(a)mediatek.com>
---
M src/soc/mediatek/common/include/soc/pmif_spmi.h
M src/soc/mediatek/mt8195/Makefile.inc
M src/soc/mediatek/mt8195/include/soc/addressmap.h
A src/soc/mediatek/mt8195/include/soc/iocfg.h
A src/soc/mediatek/mt8195/include/soc/pmif.h
A src/soc/mediatek/mt8195/mt6315.c
A src/soc/mediatek/mt8195/mt6359p.c
A src/soc/mediatek/mt8195/pmif_clk.c
A src/soc/mediatek/mt8195/pmif_spi.c
A src/soc/mediatek/mt8195/pmif_spmi.c
10 files changed, 929 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/52668/6
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Change subject: console: CONSOLE_SPI_FLASH depends on BOOT_DEVICE_SPI_FLASH
......................................................................
Patch Set 2: Code-Review+2
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Change subject: security/tpm/crtm: Measure FMAP into TPM
......................................................................
Patch Set 2: Code-Review+2
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Change subject: soc/mediatek/mt8195: add pmif/spmi/pmic driver
......................................................................
Patch Set 5:
(4 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/52668/comment/b52a0da0_ad982748
PS3, Line 9: MT8195
> The IO pins, clock setting and PMIC setting related to SoC are difference from MT8192. […]
Ack
File src/soc/mediatek/mt8195/mt6315.c:
https://review.coreboot.org/c/coreboot/+/52668/comment/974788ef_5bde3a26
PS3, Line 6: /* disable magic key protection */
> The setting is the PMIC internal setting. […]
Ack
File src/soc/mediatek/mt8195/pmif_clk.c:
PS3:
> The clock register and bit definition are different to mt8192 even though it looks very similar to ` […]
Maybe at least we can extract pmif_ulposc_cali() to a common file, since the binary search should be independent of platforms, right?
File src/soc/mediatek/mt8195/pmif_clk.c:
https://review.coreboot.org/c/coreboot/+/52668/comment/2cff5b96_de6fc02a
PS5, Line 114: printk(BIOS_ERR, "[%s] calibration fail: cur_val=%d, TOL_RATE=%d, target_val=%dM\n",
Line too long
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Change subject: soc/mediatek/mt8195: Add SPI driver support
......................................................................
Patch Set 6:
(1 comment)
File src/soc/mediatek/mt8195/spi.c:
https://review.coreboot.org/c/coreboot/+/52669/comment/67f09c39_be6f20ab
PS5, Line 106: (
> No need for extra parentheses
code is modified.
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