coreboot-gerrit May 2021

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Change in coreboot[master]: mb/google/dedede/var/magolor: Select elan hidi2c address based on SSF...
by David Wu (Code Review) 03 May '21

03 May '21

Attention is currently required from: David Wu. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/52851 to look at the new patch set (#2). Change subject: mb/google/dedede/var/magolor: Select elan hidi2c address based on SSFC value ...................................................................... mb/google/dedede/var/magolor: Select elan hidi2c address based on SSFC value Select elan hidi2c address 0x10 or 0x15, based on the value set in the SSFC_CONFIG. BUG=b:186609348 TEST=build and boot to OS. Change-Id: I087ea677a8865fc8c5b3f7c9773bd7f97924dbb3 Signed-off-by: David Wu <david_wu(a)quanta.corp-partner.google.com> --- M src/mainboard/google/dedede/variants/magolor/overridetree.cb 1 file changed, 33 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/52851/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/52851 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I087ea677a8865fc8c5b3f7c9773bd7f97924dbb3 Gerrit-Change-Number: 52851 Gerrit-PatchSet: 2 Gerrit-Owner: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/dedede/var/magolor: Select elan hidi2c address based on SSF...
by David Wu (Code Review) 03 May '21

03 May '21

David Wu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/52851 ) Change subject: mb/google/dedede/var/magolor: Select elan hidi2c address based on SSFC value ...................................................................... mb/google/dedede/var/magolor: Select elan hidi2c address based on SSFC value Select elan hidi2c address 0x10 or 0x15, based on the value set in the SSFC_CONFIG. BUG=b:186609348 TEST=build and boot to OS. Change-Id: I087ea677a8865fc8c5b3f7c9773bd7f97924dbb3 --- M src/mainboard/google/dedede/variants/magolor/overridetree.cb 1 file changed, 33 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/52851/1 diff --git a/src/mainboard/google/dedede/variants/magolor/overridetree.cb b/src/mainboard/google/dedede/variants/magolor/overridetree.cb index 841f7d6..799d808 100644 --- a/src/mainboard/google/dedede/variants/magolor/overridetree.cb +++ b/src/mainboard/google/dedede/variants/magolor/overridetree.cb @@ -4,6 +4,11 @@ option CAMERA_OVTI5675 1 option CAMERA_OVTI8856 2 end + field ELAN_HID_ADD 41 42 + option ELAN_NONE 0 + option ELAN_ADD10 1 + option ELAN_ADD15 2 + end end chip soc/intel/jasperlake @@ -181,7 +186,30 @@ register "generic.has_power_resource" = "1" register "generic.disable_gpio_export_in_crs" = "1" register "hid_desc_reg_offset" = "0x01" - device i2c 15 on end + device i2c 15 on + probe ELAN_HID_ADD ELAN_NONE + probe ELAN_HID_ADD ELAN_ADD15 + end + end + chip drivers/i2c/hid + register "generic.hid" = ""ELAN9004"" + register "generic.desc" = ""ELAN Touchscreen"" + register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_D4_IRQ)" + register "generic.probed" = "1" + register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D5)" + register "generic.reset_delay_ms" = "20" + register "generic.reset_off_delay_ms" = "2" + register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A11)" + register "generic.stop_delay_ms" = "280" + register "generic.stop_off_delay_ms" = "2" + register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D6)" + register "generic.enable_delay_ms" = "1" + register "generic.has_power_resource" = "1" + register "generic.disable_gpio_export_in_crs" = "1" + register "hid_desc_reg_offset" = "0x01" + device i2c 10 on + probe ELAN_HID_ADD ELAN_ADD10 + end end chip drivers/i2c/generic register "hid" = ""ELAN0001"" @@ -193,7 +221,10 @@ register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D6)" register "enable_delay_ms" = "1" register "has_power_resource" = "1" - device i2c 10 on end + device i2c 10 on + probe ELAN_HID_ADD ELAN_NONE + probe ELAN_HID_ADD ELAN_ADD15 + end end chip drivers/i2c/generic register "hid" = ""RAYD0001"" -- To view, visit https://review.coreboot.org/c/coreboot/+/52851 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I087ea677a8865fc8c5b3f7c9773bd7f97924dbb3 Gerrit-Change-Number: 52851 Gerrit-PatchSet: 1 Gerrit-Owner: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/mediatek/mt8195: add pmif/spmi/pmic driver
by Rex-BC Chen (Code Review) 03 May '21

03 May '21

Attention is currently required from: Hung-Te Lin, Paul Menzel. Rex-BC Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52668 ) Change subject: soc/mediatek/mt8195: add pmif/spmi/pmic driver ...................................................................... Patch Set 5: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/52668/comment/9cf9765a_e7ad0813 PS3, Line 11: > Reference datasheet: MT6315 datasheet v1.4.2.pdf, RH-D-2019-0616. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/52668 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I73f9c9bf92837f262c15758f16dacf52261dd3a3 Gerrit-Change-Number: 52668 Gerrit-PatchSet: 5 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidi.lin(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Georgi <pgeorgi(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Mon, 03 May 2021 09:17:27 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: console: CONSOLE_SPI_FLASH depends on BOOT_DEVICE_SPI_FLASH
by Angel Pons (Code Review) 03 May '21

03 May '21

Attention is currently required from: Arthur Heymans. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52793 ) Change subject: console: CONSOLE_SPI_FLASH depends on BOOT_DEVICE_SPI_FLASH ...................................................................... Patch Set 2: Code-Review+1 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/52793/comment/0f83f4a4_f2e8a4c0 PS2, Line 7: CONSOLE_SPI_FLASH depends on BOOT_DEVICE_SPI_FLASH Add a verb? Make CONSOLE_SPI_FLASH depend on BOOT_DEVICE_SPI_FLASH -- To view, visit https://review.coreboot.org/c/coreboot/+/52793 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibfdbca02259a723029260dfea9f36b325414b7d3 Gerrit-Change-Number: 52793 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Mon, 03 May 2021 09:14:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: sb/intel/{i82371eb/i82801dx}: select BOOT_DEVICE_NOT_SPI_FLASH
by Angel Pons (Code Review) 03 May '21

03 May '21

Attention is currently required from: Arthur Heymans. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52792 ) Change subject: sb/intel/{i82371eb/i82801dx}: select BOOT_DEVICE_NOT_SPI_FLASH ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/52792 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7cce5787e1241403e86c287273627b1c359ec94e Gerrit-Change-Number: 52792 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Mon, 03 May 2021 09:14:02 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: emulation/qemu-x86: Select BOOT_DEVICE_NOT_SPI_FLASH
by Angel Pons (Code Review) 03 May '21

03 May '21

Attention is currently required from: Nico Huber, Arthur Heymans. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52791 ) Change subject: emulation/qemu-x86: Select BOOT_DEVICE_NOT_SPI_FLASH ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/52791 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If29a87441cb26e53c9814ed10ddcfe14752c3965 Gerrit-Change-Number: 52791 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Mon, 03 May 2021 09:13:44 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: sb/intel/lynxpoint: Fix VBOOT with !CONFIG_INTEL_LYNXPOINT_LP
by Angel Pons (Code Review) 03 May '21

03 May '21

Attention is currently required from: Arthur Heymans. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52790 ) Change subject: sb/intel/lynxpoint: Fix VBOOT with !CONFIG_INTEL_LYNXPOINT_LP ...................................................................... Patch Set 2: Code-Review+2 (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/52790/comment/91bbce02_23c753fa PS2, Line 9: CRB PCH https://review.coreboot.org/c/coreboot/+/52790/comment/9b15425d_0a8ce7c1 PS2, Line 10: intel/southbridge/common southbridge/intel/common -- To view, visit https://review.coreboot.org/c/coreboot/+/52790 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I775d3dc3540fbd8a939701d873183dd016e24ba4 Gerrit-Change-Number: 52790 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Mon, 03 May 2021 09:12:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/intel/fsp2_0: Fix the FSP_T position
by Arthur Heymans (Code Review) 03 May '21

03 May '21

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/52850 ) Change subject: drivers/intel/fsp2_0: Fix the FSP_T position ...................................................................... drivers/intel/fsp2_0: Fix the FSP_T position The only use case for FSP-T in coreboot is for 'Intel Bootguard' support at the moment. Bootguard can do verification FSP-T there is no verification on whether the FSP found by walkcbfs_asm is the one actually verified as an IBB by Bootguard. A fixed pointer needs to be used. TESTED on OCP/Deltalake, still boots. Change-Id: I1ec8b238384684dccf39e5da902d426d3a32b9db Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/drivers/intel/fsp2_0/Kconfig M src/drivers/intel/fsp2_0/Makefile.inc M src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S 3 files changed, 8 insertions(+), 10 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/52850/1 diff --git a/src/drivers/intel/fsp2_0/Kconfig b/src/drivers/intel/fsp2_0/Kconfig index 63394dd4..ca3287c 100644 --- a/src/drivers/intel/fsp2_0/Kconfig +++ b/src/drivers/intel/fsp2_0/Kconfig @@ -74,6 +74,12 @@ depends on FSP_CAR default "fspt.bin" +config FSP_T_LOCATION + hex + default 0xffff0000 + help + The location for FSP-T. + config FSP_S_CBFS string "Name of FSP-S in CBFS" default "fsps.bin" diff --git a/src/drivers/intel/fsp2_0/Makefile.inc b/src/drivers/intel/fsp2_0/Makefile.inc index 92f6711..3bbc722 100644 --- a/src/drivers/intel/fsp2_0/Makefile.inc +++ b/src/drivers/intel/fsp2_0/Makefile.inc @@ -48,6 +48,7 @@ $(FSP_T_CBFS)-type := fsp ifeq ($(CONFIG_FSP_T_XIP),y) $(FSP_T_CBFS)-options := --xip $(TXTIBB) +$(FSP_T_CBFS)-position = $(CONFIG_FSP_T_LOCATION) endif cbfs-files-$(CONFIG_ADD_FSP_BINARIES) += $(FSP_M_CBFS) diff --git a/src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S b/src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S index a2e85b9..173ebf7 100644 --- a/src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S +++ b/src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S @@ -21,16 +21,7 @@ cache_as_ram: post_code(0x21) - /* find fsp in cbfs */ - lea fsp_name, %esi - mov $1f, %esp - jmp walkcbfs_asm -1: - cmp $0, %eax - jz .halt_forever - mov CBFS_FILE_OFFSET(%eax), %ebx - bswap %ebx - add %eax, %ebx + movl $(CONFIG_FSP_T_LOCATION), %ebx add $0x94, %ebx /* -- To view, visit https://review.coreboot.org/c/coreboot/+/52850 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1ec8b238384684dccf39e5da902d426d3a32b9db Gerrit-Change-Number: 52850 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/puff/var/dooly: enable touchscreen wakeup
by Tony Huang (Code Review) 03 May '21

03 May '21

Attention is currently required from: Sam McNally, Furquan Shaikh, Tony Huang, Tim Wawrzynczak, Edward O'Callaghan, Keith Tzeng, Wisley Chen. Hello Sam McNally, build bot (Jenkins), Furquan Shaikh, Tim Wawrzynczak, Edward O'Callaghan, Keith Tzeng, Wisley Chen, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/52725 to look at the new patch set (#9). Change subject: mb/google/puff/var/dooly: enable touchscreen wakeup ...................................................................... mb/google/puff/var/dooly: enable touchscreen wakeup Follow touchpad to set interrupt gpio to PAD_CFG_GPI_IRQ_WAKE. Add fake touchscreen enable_pin GPP_D9 to ensure meet power sequence T11 in spec v0.8. GPP_D9 is an empty pin, didn't connect to any device. BUG=b:186070097 BRANCH=puff TEST=Build and make sure TS works to wakeup suspend/resume. Change-Id: I2bbaab56924849a22a4d05ce53bf5bdcf00265dd Signed-off-by: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> --- M src/mainboard/google/hatch/variants/dooly/gpio.c M src/mainboard/google/hatch/variants/dooly/overridetree.cb 2 files changed, 4 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/52725/9 -- To view, visit https://review.coreboot.org/c/coreboot/+/52725 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2bbaab56924849a22a4d05ce53bf5bdcf00265dd Gerrit-Change-Number: 52725 Gerrit-PatchSet: 9 Gerrit-Owner: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Keith Tzeng <keith.tzeng(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Sam McNally <sammc(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sam McNally <sammc(a)google.com> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Keith Tzeng <keith.tzeng(a)quanta.corp-partner.google.com> Gerrit-Attention: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/cherry: add pmif/spmi/pmic init in romstage
by Rex-BC Chen (Code Review) 03 May '21

03 May '21

Attention is currently required from: Hung-Te Lin, Yu-Ping Wu, Yidi Lin. Rex-BC Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52849 ) Change subject: mb/google/cherry: add pmif/spmi/pmic init in romstage ...................................................................... Patch Set 2: (1 comment) Patchset: PS1: > src/mainboard/google/cherry/romstage.c:6:10: fatal error: soc/pmif.h: No such file or directory […] adjust order of patches. -- To view, visit https://review.coreboot.org/c/coreboot/+/52849 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2eeddb44b5495d05602c995a6103a56b09cf126a Gerrit-Change-Number: 52849 Gerrit-PatchSet: 2 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidi.lin(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Yidi Lin <yidi.lin(a)mediatek.com> Gerrit-Comment-Date: Mon, 03 May 2021 08:56:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Hung-Te Lin <hungte(a)chromium.org> Gerrit-MessageType: comment

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coreboot-gerrit May 2021