coreboot-gerrit May 2021

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Change in coreboot[master]: sc7280: Add PCIe RC driver in Coreboot
by build bot (Jenkins) (Code Review) 11 May '21

11 May '21

Attention is currently required from: Ravi kumar. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/53902 ) Change subject: sc7280: Add PCIe RC driver in Coreboot ...................................................................... Patch Set 2: (26 comments) File src/soc/qualcomm/sc7280/include/soc/addressmap.h: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119033): https://review.coreboot.org/c/coreboot/+/53902/comment/e875c0e6_a1d043d9 PS2, Line 68: #define PCIE1_MEM_SIZE 0x1fd00000 please, no space before tabs Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119033): https://review.coreboot.org/c/coreboot/+/53902/comment/f3670553_8c3e3a92 PS2, Line 69: #define PCIE_MEM_END 0x404fffff please, no space before tabs Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119033): https://review.coreboot.org/c/coreboot/+/53902/comment/ab256a3c_b24efe4a PS2, Line 72: #define PCIE_1_QMP_PHY 0x01C0E000 please, no space before tabs Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119033): https://review.coreboot.org/c/coreboot/+/53902/comment/74f09455_abfa3908 PS2, Line 76: #define PCE1_QPHY_SERDES 0x01C0E000 please, no space before tabs File src/soc/qualcomm/sc7280/include/soc/pcie.h: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119033): https://review.coreboot.org/c/coreboot/+/53902/comment/0285f8a6_ef20bc47 PS2, Line 18: #define DEV_ID_SZ 16 please, no space before tabs Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119033): https://review.coreboot.org/c/coreboot/+/53902/comment/0d511555_dfef4211 PS2, Line 19: #define CLASS_SZ 16 please, no space before tabs Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119033): https://review.coreboot.org/c/coreboot/+/53902/comment/4f220ecd_eb2783a3 PS2, Line 20: #define HEADER_SZ 8 please, no space before tabs Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119033): https://review.coreboot.org/c/coreboot/+/53902/comment/a37c91a1_109b3790 PS2, Line 21: #define VEND_ID_SZ 16 please, no space before tabs Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119033): https://review.coreboot.org/c/coreboot/+/53902/comment/15622355_b47e60de PS2, Line 25: #define PCIE_CLASS 0x0a please, no space before tabs Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119033): https://review.coreboot.org/c/coreboot/+/53902/comment/70c3f0b8_d7ebf153 PS2, Line 26: #define PCI_MAX_DEV_FN 0x100 please, no space before tabs Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119033): https://review.coreboot.org/c/coreboot/+/53902/comment/0fc19be1_8ef1adf9 PS2, Line 41: #define PCIE1_3x2_NUM_LANES 2 please, no space before tabs Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119033): https://review.coreboot.org/c/coreboot/+/53902/comment/c3d163d6_04fde7c1 PS2, Line 57: #define PERST_DELAY_US 1000 please, no space before tabs Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119033): https://review.coreboot.org/c/coreboot/+/53902/comment/e505b1a0_3111e3cf PS2, Line 58: #define PCIE_MAX_BARS 6 please, no space before tabs Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119033): https://review.coreboot.org/c/coreboot/+/53902/comment/1f05f43e_77e492d2 PS2, Line 154: #define PCIE1_QMP_PHY_PCS_COM 0x01C0EA00 please, no space before tabs Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119033): https://review.coreboot.org/c/coreboot/+/53902/comment/a9cc2992_9bad9917 PS2, Line 155: #define PCE1_QPHY_SERDES 0x01C0E000 please, no space before tabs Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119033): https://review.coreboot.org/c/coreboot/+/53902/comment/23bf460f_6616b056 PS2, Line 156: #define PCE1_QPHY_TX0 0x01C0E200 please, no space before tabs Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119033): https://review.coreboot.org/c/coreboot/+/53902/comment/a5d42af5_2a24b423 PS2, Line 157: #define PCE1_QPHY_RX0 0x01C0E400 please, no space before tabs Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119033): https://review.coreboot.org/c/coreboot/+/53902/comment/9aad10b3_da63ee73 PS2, Line 169: #define PCIE_DEV_FUNC (dev,func) PCI_SLOT(devfn) | PCI_FUNC(devfn) space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119033): https://review.coreboot.org/c/coreboot/+/53902/comment/0406ea69_6f3d86bc PS2, Line 169: #define PCIE_DEV_FUNC (dev,func) PCI_SLOT(devfn) | PCI_FUNC(devfn) Macros with complex values should be enclosed in parentheses Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119033): https://review.coreboot.org/c/coreboot/+/53902/comment/67bc2b70_eb8589b4 PS2, Line 188: #define PCIE_DEV(_bus, _dev, _fn) (0x80000000 | \ Macros with complex values should be enclosed in parentheses File src/soc/qualcomm/sc7280/pcie_host.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119033): https://review.coreboot.org/c/coreboot/+/53902/comment/3318ffee_b682c3f5 PS2, Line 303: pci_ep_cfg_info.config_base = (void*)PCIE1_GEN3x2_CONF; "(foo*)" should be "(foo *)" Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119033): https://review.coreboot.org/c/coreboot/+/53902/comment/961fe9ae_a0b63a7c PS2, Line 459: printk(BIOS_INFO,"pcie ep PERST asserted \n"); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119033): https://review.coreboot.org/c/coreboot/+/53902/comment/2edf56e1_3419f2b0 PS2, Line 459: printk(BIOS_INFO,"pcie ep PERST asserted \n"); unnecessary whitespace before a quoted newline Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119033): https://review.coreboot.org/c/coreboot/+/53902/comment/d26f5122_f7df754b PS2, Line 468: printk(BIOS_NOTICE,"pcie ep PERST desserted\n"); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119033): https://review.coreboot.org/c/coreboot/+/53902/comment/73d0dfc9_8acd9d2a PS2, Line 773: if (vend_id == 0xffff || vend_id == 0x0000) { braces {} are not necessary for single statement blocks Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119033): https://review.coreboot.org/c/coreboot/+/53902/comment/dd903dad_da228daa PS2, Line 1140: if(!ret) space required before the open parenthesis '(' -- To view, visit https://review.coreboot.org/c/coreboot/+/53902 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iccf60aa56541f5230fa9c3f821d7709615c36631 Gerrit-Change-Number: 53902 Gerrit-PatchSet: 2 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Comment-Date: Tue, 11 May 2021 16:43:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/prodrive/hermes: Disable ACPI S3 and S4 with SPS
by Michael Niewöhner (Code Review) 11 May '21

11 May '21

Attention is currently required from: wouter.eckhardt(a)prodrive-technologies.com, Guido Beyer @ Prodrive Technologies, Justin van Son, Patrick Rudolph, Christian Walter, Angel Pons, Stef van Os. Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54058 ) Change subject: mb/prodrive/hermes: Disable ACPI S3 and S4 with SPS ...................................................................... Patch Set 1: Code-Review+2 (1 comment) Patchset: PS1: > Does S3 resume work on the X11 boards with ME instead of SPS? Something you could check is whether the RAM can ever stay powered on in S3, where only the +5VSB rail remains powered on. Damn, thanks for reminding me. IIRC that was the problem, why S3 doesn't work on these server boards... may be different on the desktop / workstation boards, though. > Ideally, coreboot would detect the ME/SPS firmware SKU and report supported sleep states accordingly. However, this involves more work. Thought about that, too, but we can't detect if S3 is supported by the hardware so we still need a Kconfig for S3/S5 hardware support. -- To view, visit https://review.coreboot.org/c/coreboot/+/54058 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9d0fa8530e198e86415f92da6719d2fb0d2401ec Gerrit-Change-Number: 54058 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Guido Beyer @ Prodrive Technologies <guido.beyer(a)prodrive-technologies.com> Gerrit-Reviewer: Justin van Son <justin.van.son(a)prodrive-technologies.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Stef van Os <stef.van.os(a)prodrive-technologies.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: wouter.eckhardt(a)prodrive-technologies.com Gerrit-Attention: wouter.eckhardt(a)prodrive-technologies.com Gerrit-Attention: Guido Beyer @ Prodrive Technologies <guido.beyer(a)prodrive-technologies.com> Gerrit-Attention: Justin van Son <justin.van.son(a)prodrive-technologies.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Stef van Os <stef.van.os(a)prodrive-technologies.com> Gerrit-Comment-Date: Tue, 11 May 2021 16:42:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-MessageType: comment

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Change in coreboot[master]: sc7280: Add GSI FW download support
by build bot (Jenkins) (Code Review) 11 May '21

11 May '21

Attention is currently required from: Ravi kumar, Martin Roth. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52371 ) Change subject: sc7280: Add GSI FW download support ...................................................................... Patch Set 7: (11 comments) File src/soc/qualcomm/sc7280/include/soc/qupv3_config.h: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119029): https://review.coreboot.org/c/coreboot/+/52371/comment/1aa97b0f_6edb4bf6 PS7, Line 77: { open brace '{' following struct go on the same line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119029): https://review.coreboot.org/c/coreboot/+/52371/comment/fce4d50d_3e818d57 PS7, Line 79: uint32_t iram_dword1; /* word 1 of a single IRAM firmware entry */ please, no space before tabs Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119029): https://review.coreboot.org/c/coreboot/+/52371/comment/5d98e2cf_6c548e75 PS7, Line 83: { open brace '{' following struct go on the same line File src/soc/qualcomm/sc7280/qupv3_config.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119029): https://review.coreboot.org/c/coreboot/+/52371/comment/a5c16ee5_351fe030 PS7, Line 204: write32(&regs->gsi_periph_base_lsb,0); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119029): https://review.coreboot.org/c/coreboot/+/52371/comment/42749e88_991e7424 PS7, Line 205: write32(&regs->gsi_periph_base_msb,0); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119029): https://review.coreboot.org/c/coreboot/+/52371/comment/4884980b_0a37f4df PS7, Line 210: if (fwIep[i].offset < GSI_REG_BASE_SIZE) { braces {} are not necessary for single statement blocks Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119029): https://review.coreboot.org/c/coreboot/+/52371/comment/0b65ddc3_87b5e72e PS7, Line 221: memcpy((&regs->gsi_inst_ramn),(void *)fwIRam, space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119029): https://review.coreboot.org/c/coreboot/+/52371/comment/7b6d65f6_f17ae42a PS7, Line 223: setbits_le32(&regs->gsi_mcs_cfg, GSI_MCS_CFG_MCS_ENABLE_BMSK ); space prohibited before that close parenthesis ')' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119029): https://review.coreboot.org/c/coreboot/+/52371/comment/fb316384_dace6959 PS7, Line 224: setbits_le32(&regs->gsi_cfg, GSI_CFG_DOUBLE_MCS_CLK_FREQ_BMSK | GSI_CFG_GSI_ENABLE_BMSK); line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119029): https://review.coreboot.org/c/coreboot/+/52371/comment/9c9d5dec_95a2de2b PS7, Line 226: write32(&regs->gsi_ee_n_scratch_0_addr,0x0); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119029): https://review.coreboot.org/c/coreboot/+/52371/comment/fcfb8798_f2da9660 PS7, Line 227: write32(&regs->ee_n_gsi_ee_generic_cmd,0x81); space required after that ',' (ctx:VxV) -- To view, visit https://review.coreboot.org/c/coreboot/+/52371 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8b966a6a074fc43c62d2639da9cf68b083cc7319 Gerrit-Change-Number: 52371 Gerrit-PatchSet: 7 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Comment-Date: Tue, 11 May 2021 16:41:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: sc7280: cpucp loading changes
by build bot (Jenkins) (Code Review) 11 May '21

11 May '21

Attention is currently required from: Ravi kumar, Shelley Chen, Martin Roth, Julius Werner. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49768 ) Change subject: sc7280: cpucp loading changes ...................................................................... Patch Set 34: (42 comments) File src/soc/qualcomm/sc7280/cpucp_load_reset.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119021): https://review.coreboot.org/c/coreboot/+/49768/comment/40da4d35_5b5c2a63 PS34, Line 15: uint32_t val = read32(EPSSTOP_SECURE_ACCESS_OVERRIDE); code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119021): https://review.coreboot.org/c/coreboot/+/49768/comment/c90c78a0_a38e23a1 PS34, Line 15: uint32_t val = read32(EPSSTOP_SECURE_ACCESS_OVERRIDE); please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119021): https://review.coreboot.org/c/coreboot/+/49768/comment/4c0eab46_1c2a2665 PS34, Line 16: val |= 0x1; code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119021): https://review.coreboot.org/c/coreboot/+/49768/comment/26eb9f11_544be18a PS34, Line 16: val |= 0x1; please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119021): https://review.coreboot.org/c/coreboot/+/49768/comment/ad5361cd_f8384df0 PS34, Line 18: /* allow NS access to EPSS memory*/ code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119021): https://review.coreboot.org/c/coreboot/+/49768/comment/53d19d3c_7e2fac77 PS34, Line 19: write32(EPSSTOP_SECURE_ACCESS_OVERRIDE, val); code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119021): https://review.coreboot.org/c/coreboot/+/49768/comment/4c2a34af_ee4beb08 PS34, Line 19: write32(EPSSTOP_SECURE_ACCESS_OVERRIDE, val); please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119021): https://review.coreboot.org/c/coreboot/+/49768/comment/588dec4b_28ce73d8 PS34, Line 21: val = read32(EPSSFAST_EPSS_MUC_CLK_CTRL); code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119021): https://review.coreboot.org/c/coreboot/+/49768/comment/33a7d689_bccd8208 PS34, Line 21: val = read32(EPSSFAST_EPSS_MUC_CLK_CTRL); please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119021): https://review.coreboot.org/c/coreboot/+/49768/comment/f1d1f40b_617169d6 PS34, Line 22: val |= 0x1; code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119021): https://review.coreboot.org/c/coreboot/+/49768/comment/1b7687e4_1f97cd9f PS34, Line 22: val |= 0x1; please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119021): https://review.coreboot.org/c/coreboot/+/49768/comment/70673fbb_143eff98 PS34, Line 24: /* Enable subsystem clock. Required for CPUCP PDMEM access*/ code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119021): https://review.coreboot.org/c/coreboot/+/49768/comment/3a090e72_d5a81476 PS34, Line 25: write32(EPSSFAST_EPSS_MUC_CLK_CTRL, val); code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119021): https://review.coreboot.org/c/coreboot/+/49768/comment/3f21eb27_1dff6974 PS34, Line 25: write32(EPSSFAST_EPSS_MUC_CLK_CTRL, val); please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119021): https://review.coreboot.org/c/coreboot/+/49768/comment/f68e37b1_81cf76fb PS34, Line 27: while((read32(EPSSFAST_EPSS_MUC_CLK_CTRL) & 0x1) != 0x1); code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119021): https://review.coreboot.org/c/coreboot/+/49768/comment/258b66b7_076b00cd PS34, Line 27: while((read32(EPSSFAST_EPSS_MUC_CLK_CTRL) & 0x1) != 0x1); please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119021): https://review.coreboot.org/c/coreboot/+/49768/comment/4d9b39eb_cc1fbbbe PS34, Line 27: while((read32(EPSSFAST_EPSS_MUC_CLK_CTRL) & 0x1) != 0x1); space required before the open parenthesis '(' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119021): https://review.coreboot.org/c/coreboot/+/49768/comment/7082da3d_bbce6d00 PS34, Line 27: while((read32(EPSSFAST_EPSS_MUC_CLK_CTRL) & 0x1) != 0x1); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119021): https://review.coreboot.org/c/coreboot/+/49768/comment/14701422_f093aa5c PS34, Line 32: bool cpucp_fw_entry; code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119021): https://review.coreboot.org/c/coreboot/+/49768/comment/d4966a62_d323ba0c PS34, Line 32: bool cpucp_fw_entry; please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119021): https://review.coreboot.org/c/coreboot/+/49768/comment/b1886b3a_1c472b9e PS34, Line 33: printk(BIOS_DEBUG, "\nSOC:CPUCP image loading.\n"); code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119021): https://review.coreboot.org/c/coreboot/+/49768/comment/584fdc55_ab8bab8f PS34, Line 33: printk(BIOS_DEBUG, "\nSOC:CPUCP image loading.\n"); please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119021): https://review.coreboot.org/c/coreboot/+/49768/comment/519ff007_b65ea7ad PS34, Line 35: struct prog cpucp_fw_prog = code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119021): https://review.coreboot.org/c/coreboot/+/49768/comment/dfcd9bd3_3c903ecb PS34, Line 35: struct prog cpucp_fw_prog = please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119021): https://review.coreboot.org/c/coreboot/+/49768/comment/671a2634_5f2cc3ab PS34, Line 36: PROG_INIT(PROG_PAYLOAD, CONFIG_CBFS_PREFIX "/cpucp"); code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119021): https://review.coreboot.org/c/coreboot/+/49768/comment/68f511db_f9ab632e PS34, Line 36: PROG_INIT(PROG_PAYLOAD, CONFIG_CBFS_PREFIX "/cpucp"); please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119021): https://review.coreboot.org/c/coreboot/+/49768/comment/ac89087d_03ec561f PS34, Line 38: cpucp_prepare(); code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119021): https://review.coreboot.org/c/coreboot/+/49768/comment/cef6b380_7c0c2a86 PS34, Line 38: cpucp_prepare(); please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119021): https://review.coreboot.org/c/coreboot/+/49768/comment/f01d11bd_209eb4de PS34, Line 40: if (prog_locate(&cpucp_fw_prog)) code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119021): https://review.coreboot.org/c/coreboot/+/49768/comment/19763bbb_e0d536cf PS34, Line 40: if (prog_locate(&cpucp_fw_prog)) please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119021): https://review.coreboot.org/c/coreboot/+/49768/comment/abce24a5_36a97c7d PS34, Line 41: die("SOC imagpe: CPUCP_FW not found"); code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119021): https://review.coreboot.org/c/coreboot/+/49768/comment/d35903c7_b259bcbb PS34, Line 41: die("SOC imagpe: CPUCP_FW not found"); please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119021): https://review.coreboot.org/c/coreboot/+/49768/comment/b2d3bb34_39569009 PS34, Line 43: cpucp_fw_entry = selfload(&cpucp_fw_prog); code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119021): https://review.coreboot.org/c/coreboot/+/49768/comment/8940a898_03798cd8 PS34, Line 43: cpucp_fw_entry = selfload(&cpucp_fw_prog); please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119021): https://review.coreboot.org/c/coreboot/+/49768/comment/5d4c0ad3_ba2eec41 PS34, Line 44: if (!cpucp_fw_entry) code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119021): https://review.coreboot.org/c/coreboot/+/49768/comment/2c7c2917_47c41601 PS34, Line 44: if (!cpucp_fw_entry) please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119021): https://review.coreboot.org/c/coreboot/+/49768/comment/26b9257f_92a5fe72 PS34, Line 45: die("SOC image: CPUCP load failed"); code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119021): https://review.coreboot.org/c/coreboot/+/49768/comment/0de8b524_d396d30a PS34, Line 45: die("SOC image: CPUCP load failed"); please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119021): https://review.coreboot.org/c/coreboot/+/49768/comment/0193db1b_c11288f1 PS34, Line 47: printk(BIOS_DEBUG, "\nSOC:CPUCP image loaded successfully.\n"); code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119021): https://review.coreboot.org/c/coreboot/+/49768/comment/5ac42a79_74bc330d PS34, Line 47: printk(BIOS_DEBUG, "\nSOC:CPUCP image loaded successfully.\n"); please, no spaces at the start of a line File src/soc/qualcomm/sc7280/soc.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119021): https://review.coreboot.org/c/coreboot/+/49768/comment/1f88d330_bb5943f9 PS34, Line 20: REGION_SIZE(dram_cpucp) / KiB); code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119021): https://review.coreboot.org/c/coreboot/+/49768/comment/05a8d27c_efdae3ce PS34, Line 20: REGION_SIZE(dram_cpucp) / KiB); please, no spaces at the start of a line -- To view, visit https://review.coreboot.org/c/coreboot/+/49768 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idac22c8cb231658616999bc577bdf49f9aa7ae74 Gerrit-Change-Number: 49768 Gerrit-PatchSet: 34 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Tue, 11 May 2021 16:37:24 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: sc7280: aop loading changes
by build bot (Jenkins) (Code Review) 11 May '21

11 May '21

1 0

Change in coreboot[master]: sc7280: shrm.elf loading changes
by build bot (Jenkins) (Code Review) 11 May '21

11 May '21

Attention is currently required from: Ravi kumar, Shelley Chen, Martin Roth, mturney mturney, Julius Werner. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49392 ) Change subject: sc7280: shrm.elf loading changes ...................................................................... Patch Set 35: (1 comment) File src/soc/qualcomm/sc7280/shrm_load_reset.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119019): https://review.coreboot.org/c/coreboot/+/49392/comment/164e94f2_769eb2d9 PS35, Line 9: void shrm_fw_load_reset() Bad function definition - void shrm_fw_load_reset() should probably be void shrm_fw_load_reset(void) -- To view, visit https://review.coreboot.org/c/coreboot/+/49392 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I44484573a829eaefbd34907c6fe78d427506a762 Gerrit-Change-Number: 49392 Gerrit-PatchSet: 35 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: mturney mturney <mturney(a)codeaurora.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Tue, 11 May 2021 16:36:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: tests: Enable config override for tests
by Patrick Georgi (Code Review) 11 May '21

11 May '21

Attention is currently required from: Jakub Czapiga, Julius Werner, Jan Dabros. Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52937 ) Change subject: tests: Enable config override for tests ...................................................................... Patch Set 2: Code-Review+2 (3 comments) Patchset: PS2: Just some minor things, looking good otherwise. File tests/Makefile.inc: https://review.coreboot.org/c/coreboot/+/52937/comment/f572b572_3bf1aa23 PS2, Line 89: $(TEST_KCONFIG_AUTOHEADER) The rule doesn't seem to have any inputs except the variables, so I don't think that dependency is necessary https://review.coreboot.org/c/coreboot/+/52937/comment/30e56883_1ec24860 PS2, Line 92: config.src.h should we generate this programmatically: $(notdir $(TEST_KCONFIG_AUTOHEADER))? -- To view, visit https://review.coreboot.org/c/coreboot/+/52937 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1aeb78362c2609fbefbfd91c0f58ec19ed258ee1 Gerrit-Change-Number: 52937 Gerrit-PatchSet: 2 Gerrit-Owner: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Jan Dabros <jsd(a)semihalf.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Fagerburg <pfagerburg(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Jan Dabros <jsd(a)semihalf.com> Gerrit-Comment-Date: Tue, 11 May 2021 16:35:54 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/dedede/var/metaknight: Remove TSR2
by Evan Green (Code Review) 11 May '21

11 May '21

Evan Green has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/54021 ) Change subject: mb/google/dedede/var/metaknight: Remove TSR2 ...................................................................... Abandoned The official fix is out at https://review.coreboot.org/c/coreboot/+/54046 -- To view, visit https://review.coreboot.org/c/coreboot/+/54021 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia032212948434a56119701340c0d87f91acdab53 Gerrit-Change-Number: 54021 Gerrit-PatchSet: 2 Gerrit-Owner: Evan Green <evgreen(a)chromium.org> Gerrit-Reviewer: Brian Nemec <bnemec(a)google.com> Gerrit-Reviewer: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Reviewer: Raymond Wong <wongraymond(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

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Change in coreboot[master]: mb/google/dedede/var/metaknight: Update DPTF parameters
by Karthik Ramasubramanian (Code Review) 11 May '21

11 May '21

Attention is currently required from: David Wu, Evan Green, Brian Nemec, Karthikeyan Ramasubramanian. Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54046 ) Change subject: mb/google/dedede/var/metaknight: Update DPTF parameters ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/54046 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If0ec1ec48b8971efe87f1f8d10332a9c16352122 Gerrit-Change-Number: 54046 Gerrit-PatchSet: 2 Gerrit-Owner: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Brian Nemec <bnemec(a)google.com> Gerrit-Reviewer: Evan Green <evgreen(a)chromium.org> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Reviewer: Raymond Wong <wongraymond(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Attention: Evan Green <evgreen(a)chromium.org> Gerrit-Attention: Brian Nemec <bnemec(a)google.com> Gerrit-Attention: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Comment-Date: Tue, 11 May 2021 16:29:42 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: sc7280: Reserve wlan & wpss dram memory regions
by build bot (Jenkins) (Code Review) 11 May '21

11 May '21

Attention is currently required from: Ravi kumar, Shelley Chen, Paul Menzel, mturney mturney, Julius Werner. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50587 ) Change subject: sc7280: Reserve wlan & wpss dram memory regions ...................................................................... Patch Set 32: (4 comments) File src/soc/qualcomm/sc7280/soc.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119007): https://review.coreboot.org/c/coreboot/+/50587/comment/7e96041d_270d5695 PS32, Line 16: REGION_SIZE(dram_wlan) / KiB); code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119007): https://review.coreboot.org/c/coreboot/+/50587/comment/2602053b_05c531c2 PS32, Line 16: REGION_SIZE(dram_wlan) / KiB); please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119007): https://review.coreboot.org/c/coreboot/+/50587/comment/d3e078ff_530c6569 PS32, Line 18: REGION_SIZE(dram_wpss) / KiB); code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119007): https://review.coreboot.org/c/coreboot/+/50587/comment/868d03b8_73ba89e6 PS32, Line 18: REGION_SIZE(dram_wpss) / KiB); please, no spaces at the start of a line -- To view, visit https://review.coreboot.org/c/coreboot/+/50587 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic98b5d08a0a7b3f772582bf85d94f901a7c53010 Gerrit-Change-Number: 50587 Gerrit-PatchSet: 32 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: mturney mturney <mturney(a)codeaurora.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Tue, 11 May 2021 16:24:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit May 2021