coreboot-gerrit March 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: mb/intel/sm: Add Cr50 support
by Angel Pons (Code Review) 01 Mar '21

01 Mar '21

Attention is currently required from: Aamir Bohra. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51086 ) Change subject: mb/intel/sm: Add Cr50 support ...................................................................... Patch Set 2: Code-Review+1 (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/51086/comment/176493cf_9f0c57a8 PS2, Line 7: sm nit: I would not shorten `shadowmountain` File src/mainboard/intel/shadowmountain/variants/baseboard/early_gpio.c: https://review.coreboot.org/c/coreboot/+/51086/comment/f8ee8792_f730fc68 PS2, Line 26: H1_PCH_INT_ODL Should these comments be updated? -- To view, visit https://review.coreboot.org/c/coreboot/+/51086 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I33f7427d1675190f65acf14679be93546e6db69a Gerrit-Change-Number: 51086 Gerrit-PatchSet: 2 Gerrit-Owner: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Comment-Date: Mon, 01 Mar 2021 09:55:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: src/mediatek/mt8192: use Mediatek mt8192 vendor code(CB:50294)
by build bot (Jenkins) (Code Review) 01 Mar '21

01 Mar '21

Attention is currently required from: Hung-Te Lin, Martin Roth. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51125 ) Change subject: src/mediatek/mt8192: use Mediatek mt8192 vendor code(CB:50294) ...................................................................... Patch Set 2: (22 comments) File src/soc/mediatek/common/dram_init.c: https://review.coreboot.org/c/coreboot/+/51125/comment/76aaccaa_b1ad2ad5 PS2, Line 33: print("dram_init: start\n"); Prefer using '"%s...", __func__' to using 'dram_init', this function's name, in a string https://review.coreboot.org/c/coreboot/+/51125/comment/9a45d393_8fc2fb63 PS2, Line 49: print("dram_init: dram init end (result: %d)\n", hdr->status); Prefer using '"%s...", __func__' to using 'dram_init', this function's name, in a string File src/soc/mediatek/mt8192/include/soc/dramc_mt8192.h: https://review.coreboot.org/c/coreboot/+/51125/comment/600e717f_c2931bdc PS2, Line 7: { open brace '{' following enum go on the same line https://review.coreboot.org/c/coreboot/+/51125/comment/0545d59e_9a209f4f PS2, Line 8: CHANNEL_A = 0, please, no spaces at the start of a line https://review.coreboot.org/c/coreboot/+/51125/comment/b67b9bb1_170d6d35 PS2, Line 9: CHANNEL_B, please, no spaces at the start of a line https://review.coreboot.org/c/coreboot/+/51125/comment/c418fae6_cca5bc93 PS2, Line 10: CHANNEL_MAX please, no spaces at the start of a line https://review.coreboot.org/c/coreboot/+/51125/comment/4613f171_3c0026b6 PS2, Line 14: { open brace '{' following enum go on the same line https://review.coreboot.org/c/coreboot/+/51125/comment/6d5545aa_e01ccf71 PS2, Line 15: RANK_0 = 0, please, no spaces at the start of a line https://review.coreboot.org/c/coreboot/+/51125/comment/423d6623_3c64d738 PS2, Line 16: RANK_1, please, no spaces at the start of a line https://review.coreboot.org/c/coreboot/+/51125/comment/4d247003_c4e7197a PS2, Line 17: RANK_MAX please, no spaces at the start of a line https://review.coreboot.org/c/coreboot/+/51125/comment/f3895853_3a6e94db PS2, Line 21: { open brace '{' following enum go on the same line https://review.coreboot.org/c/coreboot/+/51125/comment/34fc3467_b332459b PS2, Line 22: DRAM_DFS_SHUFFLE_1 = 0, please, no spaces at the start of a line https://review.coreboot.org/c/coreboot/+/51125/comment/f2454f57_485aee5a PS2, Line 23: DRAM_DFS_SHUFFLE_2, please, no spaces at the start of a line https://review.coreboot.org/c/coreboot/+/51125/comment/11595161_874bad53 PS2, Line 24: DRAM_DFS_SHUFFLE_3, please, no spaces at the start of a line https://review.coreboot.org/c/coreboot/+/51125/comment/72a17e92_6962871a PS2, Line 25: DRAM_DFS_SHUFFLE_4, please, no spaces at the start of a line https://review.coreboot.org/c/coreboot/+/51125/comment/36824b57_cffdc027 PS2, Line 26: DRAM_DFS_SHUFFLE_5, please, no spaces at the start of a line https://review.coreboot.org/c/coreboot/+/51125/comment/ab80dc79_c21aa909 PS2, Line 27: DRAM_DFS_SHUFFLE_6, please, no spaces at the start of a line https://review.coreboot.org/c/coreboot/+/51125/comment/e51539b3_169ed2c3 PS2, Line 28: DRAM_DFS_SHUFFLE_7, please, no spaces at the start of a line https://review.coreboot.org/c/coreboot/+/51125/comment/852e261d_6dbbf8e8 PS2, Line 29: DRAM_DFS_SHUFFLE_MAX please, no spaces at the start of a line https://review.coreboot.org/c/coreboot/+/51125/comment/1e19749e_4072bda3 PS2, Line 40: { open brace '{' following enum go on the same line https://review.coreboot.org/c/coreboot/+/51125/comment/9f22fe39_41027812 PS2, Line 41: CBT_NORMAL_MODE = 0, please, no spaces at the start of a line https://review.coreboot.org/c/coreboot/+/51125/comment/24ad5804_bd8ba534 PS2, Line 42: CBT_BYTE_MODE1 please, no spaces at the start of a line -- To view, visit https://review.coreboot.org/c/coreboot/+/51125 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2b2f41d774c6b85f106867144fb0b29a4a1bdfcf Gerrit-Change-Number: 51125 Gerrit-PatchSet: 2 Gerrit-Owner: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Comment-Date: Mon, 01 Mar 2021 09:54:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: src/mediatek/mt8192: use Mediatek mt8192 vendor code(CB:50294)
by Xi Chen (Code Review) 01 Mar '21

01 Mar '21

Attention is currently required from: Hung-Te Lin, Martin Roth. Hello Hung-Te Lin, build bot (Jenkins), Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/51125 to look at the new patch set (#2). Change subject: src/mediatek/mt8192: use Mediatek mt8192 vendor code(CB:50294) ...................................................................... src/mediatek/mt8192: use Mediatek mt8192 vendor code(CB:50294) Mediatek maintains the DRAM initialization code, the coding style is different from coreboot, when CB:50294 is ready, soc/mediatek/mt8192 will not be used. Signed-off-by: Xi Chen <xixi.chen(a)mediatek.com> Change-Id: I2b2f41d774c6b85f106867144fb0b29a4a1bdfcf --- R src/soc/mediatek/common/dpm.c A src/soc/mediatek/common/dram_init.c R src/soc/mediatek/common/dramc_param.c R src/soc/mediatek/common/include/soc/dpm.h R src/soc/mediatek/common/include/soc/dramc_param.h R src/soc/mediatek/common/include/soc/emi.h R src/soc/mediatek/common/memory.c M src/soc/mediatek/mt8192/Kconfig M src/soc/mediatek/mt8192/Makefile.inc D src/soc/mediatek/mt8192/dramc_ana_init_config.c D src/soc/mediatek/mt8192/dramc_dig_config.c D src/soc/mediatek/mt8192/dramc_dvfs.c D src/soc/mediatek/mt8192/dramc_pi_basic_api.c D src/soc/mediatek/mt8192/dramc_pi_calibration_api.c D src/soc/mediatek/mt8192/dramc_pi_main.c D src/soc/mediatek/mt8192/dramc_power.c D src/soc/mediatek/mt8192/dramc_subsys_config.c D src/soc/mediatek/mt8192/dramc_tracking.c D src/soc/mediatek/mt8192/dramc_utility.c D src/soc/mediatek/mt8192/emi.c D src/soc/mediatek/mt8192/include/soc/dramc_ac_timing.h D src/soc/mediatek/mt8192/include/soc/dramc_common_mt8192.h A src/soc/mediatek/mt8192/include/soc/dramc_mt8192.h D src/soc/mediatek/mt8192/include/soc/dramc_pi_api.h D src/soc/mediatek/mt8192/include/soc/dramc_power.h D src/soc/mediatek/mt8192/include/soc/dramc_register.h D src/soc/mediatek/mt8192/include/soc/dramc_register_bits_def.h M src/vendorcode/Makefile.inc 28 files changed, 197 insertions(+), 19,568 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/51125/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/51125 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2b2f41d774c6b85f106867144fb0b29a4a1bdfcf Gerrit-Change-Number: 51125 Gerrit-PatchSet: 2 Gerrit-Owner: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: vendor: mediatek: Add mediatek mt8192 dram initialization codes
by Xi Chen (Code Review) 01 Mar '21

01 Mar '21

Attention is currently required from: Xi Chen, Hung-Te Lin, Nico Huber, Martin Roth, Paul Menzel, Yu-Ping Wu. Hello Hung-Te Lin, build bot (Jenkins), Patrick Georgi, Martin Roth, Paul Menzel, Yu-Ping Wu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/50294 to look at the new patch set (#12). Change subject: vendor: mediatek: Add mediatek mt8192 dram initialization codes ...................................................................... vendor: mediatek: Add mediatek mt8192 dram initialization codes Add the DRAM initialization code based on Mediatek reference implementation. Mediatek internally maintains the DRAM initialization code, following different coding style. To prevent maintaining a different branch for coreboot (which may lead to typo or errors which switching between different coding style), we want to directly use the reference implementation as vendor code. Signed-off-by: Xi Chen <xixi.chen(a)mediatek.com> Change-Id: I3853204578069c6abf52689ea6f5d88841414bd4 --- M src/vendorcode/Makefile.inc A src/vendorcode/mediatek/Kconfig A src/vendorcode/mediatek/Makefile.inc A src/vendorcode/mediatek/mt8192/Makefile.inc A src/vendorcode/mediatek/mt8192/dramc/ANA_init_config.c A src/vendorcode/mediatek/mt8192/dramc/DIG_NONSHUF_config.c A src/vendorcode/mediatek/mt8192/dramc/DIG_SHUF_config.c A src/vendorcode/mediatek/mt8192/dramc/DRAMC_SUBSYS_config.c A src/vendorcode/mediatek/mt8192/dramc/DRAM_config_collctioin.c A src/vendorcode/mediatek/mt8192/dramc/Hal_io.c A src/vendorcode/mediatek/mt8192/dramc/LP4_dram_init.c A src/vendorcode/mediatek/mt8192/dramc/Makefile.inc A src/vendorcode/mediatek/mt8192/dramc/dramc_actiming.c A src/vendorcode/mediatek/mt8192/dramc/dramc_dv_freq_related.c A src/vendorcode/mediatek/mt8192/dramc/dramc_dvfs.c A src/vendorcode/mediatek/mt8192/dramc/dramc_lowpower.c A src/vendorcode/mediatek/mt8192/dramc/dramc_pi_basic_api.c A src/vendorcode/mediatek/mt8192/dramc/dramc_pi_calibration_api.c A src/vendorcode/mediatek/mt8192/dramc/dramc_pi_main.c A src/vendorcode/mediatek/mt8192/dramc/dramc_top.c A src/vendorcode/mediatek/mt8192/dramc/dramc_tracking.c A src/vendorcode/mediatek/mt8192/dramc/dramc_utility.c A src/vendorcode/mediatek/mt8192/dramc/emi.c A src/vendorcode/mediatek/mt8192/driver/Makefile.inc A src/vendorcode/mediatek/mt8192/driver/pmic_wrap.c A src/vendorcode/mediatek/mt8192/driver/timer.c A src/vendorcode/mediatek/mt8192/driver/uart.c A src/vendorcode/mediatek/mt8192/include/Margaux_Register_DDRPHY_AO.h A src/vendorcode/mediatek/mt8192/include/Margaux_Register_DDRPHY_MD32.h A src/vendorcode/mediatek/mt8192/include/Margaux_Register_DDRPHY_NAO.h A src/vendorcode/mediatek/mt8192/include/Margaux_Register_DRAMC_AO.h A src/vendorcode/mediatek/mt8192/include/Margaux_Register_DRAMC_NAO.h A src/vendorcode/mediatek/mt8192/include/addressmap.h A src/vendorcode/mediatek/mt8192/include/custom_emi.h A src/vendorcode/mediatek/mt8192/include/ddrphy_nao_reg.h A src/vendorcode/mediatek/mt8192/include/ddrphy_pll_reg.h A src/vendorcode/mediatek/mt8192/include/ddrphy_wo_pll_reg.h A src/vendorcode/mediatek/mt8192/include/dramc_actiming.h A src/vendorcode/mediatek/mt8192/include/dramc_ch0_nao_reg.h A src/vendorcode/mediatek/mt8192/include/dramc_ch0_reg.h A src/vendorcode/mediatek/mt8192/include/dramc_common.h A src/vendorcode/mediatek/mt8192/include/dramc_dv_init.h A src/vendorcode/mediatek/mt8192/include/dramc_int_global.h A src/vendorcode/mediatek/mt8192/include/dramc_int_slt.h A src/vendorcode/mediatek/mt8192/include/dramc_pi_api.h A src/vendorcode/mediatek/mt8192/include/dramc_reg_base_addr.h A src/vendorcode/mediatek/mt8192/include/dramc_register.h A src/vendorcode/mediatek/mt8192/include/dramc_top.h A src/vendorcode/mediatek/mt8192/include/dramc_typedefs.h A src/vendorcode/mediatek/mt8192/include/emi.h A src/vendorcode/mediatek/mt8192/include/emi_hw.h A src/vendorcode/mediatek/mt8192/include/emi_mpu_mt.h A src/vendorcode/mediatek/mt8192/include/emi_mpu_v1.h A src/vendorcode/mediatek/mt8192/include/memory.h A src/vendorcode/mediatek/mt8192/include/pmic_wrap_init.h A src/vendorcode/mediatek/mt8192/include/print.h A src/vendorcode/mediatek/mt8192/include/reg.h A src/vendorcode/mediatek/mt8192/include/stdint.h A src/vendorcode/mediatek/mt8192/include/sv_c_data_traffic.h A src/vendorcode/mediatek/mt8192/include/sys/types.h A src/vendorcode/mediatek/mt8192/include/uart.h A src/vendorcode/mediatek/mt8192/include/x_hal_io.h A src/vendorcode/mediatek/mt8192/lib/Makefile.inc A src/vendorcode/mediatek/mt8192/lib/print.c 64 files changed, 87,260 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/50294/12 -- To view, visit https://review.coreboot.org/c/coreboot/+/50294 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3853204578069c6abf52689ea6f5d88841414bd4 Gerrit-Change-Number: 50294 Gerrit-PatchSet: 12 Gerrit-Owner: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Cindy Ching <cindy.ching(a)mediatek.corp-partner.google.com> Gerrit-CC: Joel Kitching <kitching(a)google.com> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Stefan Reinauer <reinauer(a)chromium.org> Gerrit-CC: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-CC: Yidi Lin <yidi.lin(a)mediatek.com> Gerrit-CC: Yidi Lin <yidi.lin(a)mediatek.corp-partner.google.com> Gerrit-Attention: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: util/inteltool: Add support for GLK
by Name of user not set (Code Review) 01 Mar '21

01 Mar '21

Attention is currently required from: Igor Bagnucki, Stefan Reinauer, Piotr Król. Hello build bot (Jenkins), Michał Żygowski, Igor Bagnucki, Stefan Reinauer, Piotr Król, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/51130 to look at the new patch set (#3). Change subject: util/inteltool: Add support for GLK ...................................................................... util/inteltool: Add support for GLK Signed-off-by: Igor Bagnucki <igor.bagnucki(a)3mdeb.com> Change-Id: I017789c9e23e355214deced29efcb3532c449981 --- M util/inteltool/gpio_groups.c A util/inteltool/gpio_names/geminilake.h M util/inteltool/inteltool.c M util/inteltool/inteltool.h M util/inteltool/pcr.c 5 files changed, 320 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/51130/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/51130 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I017789c9e23e355214deced29efcb3532c449981 Gerrit-Change-Number: 51130 Gerrit-PatchSet: 3 Gerrit-Owner: Name of user not set #1003165 Gerrit-Reviewer: Igor Bagnucki <igor.bagnucki(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Igor Bagnucki <igor.bagnucki(a)3mdeb.com> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/intel/shadowmountain: Enable Type-C subsystem
by Aamir Bohra (Code Review) 01 Mar '21

01 Mar '21

Attention is currently required from: V Sowmya, Subrata Banik. Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51026 ) Change subject: mb/intel/shadowmountain: Enable Type-C subsystem ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/51026 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ieaf1170ca718a14d24b773a4a85516e0bbfbb569 Gerrit-Change-Number: 51026 Gerrit-PatchSet: 5 Gerrit-Owner: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: V Sowmya <v.sowmya(a)intel.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Comment-Date: Mon, 01 Mar 2021 09:40:21 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: util/inteltool: Add support for GLK
by Name of user not set (Code Review) 01 Mar '21

01 Mar '21

Attention is currently required from: Igor Bagnucki, Stefan Reinauer, Name of user not set #1003165, Piotr Król. Hello build bot (Jenkins), Michał Żygowski, Igor Bagnucki, Stefan Reinauer, Piotr Król, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/51130 to look at the new patch set (#2). Change subject: util/inteltool: Add support for GLK ...................................................................... util/inteltool: Add support for GLK Signed-off-by: Igor Bagnucki <igor.bagnucki(a)3mdeb.com> Change-Id: I017789c9e23e355214deced29efcb3532c449981 --- M util/inteltool/gpio_groups.c A util/inteltool/gpio_names/geminilake.h M util/inteltool/inteltool.h M util/inteltool/pcr.c 4 files changed, 319 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/51130/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/51130 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I017789c9e23e355214deced29efcb3532c449981 Gerrit-Change-Number: 51130 Gerrit-PatchSet: 2 Gerrit-Owner: Name of user not set #1003165 Gerrit-Reviewer: Igor Bagnucki <igor.bagnucki(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Igor Bagnucki <igor.bagnucki(a)3mdeb.com> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Name of user not set #1003165 Gerrit-Attention: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: util/inteltool/pcr.c: Add P2SB for GLK
by Name of user not set (Code Review) 01 Mar '21

01 Mar '21

Name of user not set #1003165 has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/51132 ) Change subject: util/inteltool/pcr.c: Add P2SB for GLK ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/51132 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id173f5b6934ff094b409afd785ed2228e95d3c0f Gerrit-Change-Number: 51132 Gerrit-PatchSet: 1 Gerrit-Owner: Name of user not set #1003165 Gerrit-Reviewer: Igor Bagnucki <igor.bagnucki(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-MessageType: abandon

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Change in coreboot[master]: util/inteltool/pcr.c: Add P2SB for GLK
by Name of user not set (Code Review) 01 Mar '21

01 Mar '21

Name of user not set #1003165 has restored this change. ( https://review.coreboot.org/c/coreboot/+/51132 ) Change subject: util/inteltool/pcr.c: Add P2SB for GLK ...................................................................... Restored -- To view, visit https://review.coreboot.org/c/coreboot/+/51132 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id173f5b6934ff094b409afd785ed2228e95d3c0f Gerrit-Change-Number: 51132 Gerrit-PatchSet: 1 Gerrit-Owner: Name of user not set #1003165 Gerrit-Reviewer: Igor Bagnucki <igor.bagnucki(a)3mdeb.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-MessageType: restore

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Change in coreboot[master]: util/inteltool/pcr.c: Add P2SB for GLK
by Name of user not set (Code Review) 01 Mar '21

01 Mar '21

Name of user not set #1003165 has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/51132 ) Change subject: util/inteltool/pcr.c: Add P2SB for GLK ...................................................................... Abandoned Incorrect change id -- To view, visit https://review.coreboot.org/c/coreboot/+/51132 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id173f5b6934ff094b409afd785ed2228e95d3c0f Gerrit-Change-Number: 51132 Gerrit-PatchSet: 1 Gerrit-Owner: Name of user not set #1003165 Gerrit-Reviewer: Igor Bagnucki <igor.bagnucki(a)3mdeb.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-MessageType: abandon

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