coreboot-gerrit March 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: soc/rockchip/rk3399/sdram: Move pwrup_srefresh_exit to array
by Paul Menzel (Code Review) 01 Mar '21

01 Mar '21

Attention is currently required from: Julius Werner, Moritz Fischer. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51128 ) Change subject: soc/rockchip/rk3399/sdram: Move pwrup_srefresh_exit to array ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/51128 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I84fe0bc2dbc9874facfa35534b871ec049cb26bb Gerrit-Change-Number: 51128 Gerrit-PatchSet: 1 Gerrit-Owner: Moritz Fischer <moritzf(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Moritz Fischer <moritzf(a)google.com> Gerrit-Comment-Date: Mon, 01 Mar 2021 10:36:37 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/rockchip/rk3399/sdram: Add channel to error message
by Paul Menzel (Code Review) 01 Mar '21

01 Mar '21

Attention is currently required from: Julius Werner, Moritz Fischer. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51127 ) Change subject: soc/rockchip/rk3399/sdram: Add channel to error message ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/51127 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If4109bd0573e3d9f90d699d89350ddbcc48714d3 Gerrit-Change-Number: 51127 Gerrit-PatchSet: 1 Gerrit-Owner: Moritz Fischer <moritzf(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Moritz Fischer <moritzf(a)google.com> Gerrit-Comment-Date: Mon, 01 Mar 2021 10:36:15 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/rockchip/rk3399/sdram: Simplify error condition
by Paul Menzel (Code Review) 01 Mar '21

01 Mar '21

Attention is currently required from: Julius Werner, Moritz Fischer. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51126 ) Change subject: soc/rockchip/rk3399/sdram: Simplify error condition ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/51126 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I72612af4108a616b6247ee68c8ac2a53242b0853 Gerrit-Change-Number: 51126 Gerrit-PatchSet: 1 Gerrit-Owner: Moritz Fischer <moritzf(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Moritz Fischer <moritzf(a)google.com> Gerrit-Comment-Date: Mon, 01 Mar 2021 10:35:54 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/lenovo/x200: Fix docking events
by Arthur Heymans (Code Review) 01 Mar '21

01 Mar '21

Attention is currently required from: Bill XIE, Nico Huber, Alexander Couzens, Patrick Rudolph, Kevin Keijzer. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51118 ) Change subject: mb/lenovo/x200: Fix docking events ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/51118 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I561e7ae81f2e096a091868ce51daa1c8f66af067 Gerrit-Change-Number: 51118 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-Reviewer: Kevin Keijzer Gerrit-Reviewer: Kevin Keijzer <kevin(a)quietlife.nl> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Kevin Keijzer <kevin(a)quietlife.nl> Gerrit-Comment-Date: Mon, 01 Mar 2021 10:09:58 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: vendor: mediatek: Add mediatek mt8192 dram initialization codes
by Xi Chen (Code Review) 01 Mar '21

01 Mar '21

Attention is currently required from: Hung-Te Lin, Nico Huber, Martin Roth, Paul Menzel, Yu-Ping Wu. Xi Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50294 ) Change subject: vendor: mediatek: Add mediatek mt8192 dram initialization codes ...................................................................... Patch Set 13: (1 comment) File src/vendorcode/mediatek/mt8192/dram_init.c: https://review.coreboot.org/c/coreboot/+/50294/comment/18cf4f68_549e86e2 PS9, Line 59: void _start(void *config) __attribute__((section(".text.start"))); : void _start(void *config) : { : dram_init(config); : } : > I think we should remove this if you don't have a plan to build blob here. Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/50294 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3853204578069c6abf52689ea6f5d88841414bd4 Gerrit-Change-Number: 50294 Gerrit-PatchSet: 13 Gerrit-Owner: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Cindy Ching <cindy.ching(a)mediatek.corp-partner.google.com> Gerrit-CC: Joel Kitching <kitching(a)google.com> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Stefan Reinauer <reinauer(a)chromium.org> Gerrit-CC: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-CC: Yidi Lin <yidi.lin(a)mediatek.com> Gerrit-CC: Yidi Lin <yidi.lin(a)mediatek.corp-partner.google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Mon, 01 Mar 2021 10:03:56 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Hung-Te Lin <hungte(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: src/mediatek/mt8192: use Mediatek mt8192 vendor code(CB:50294)
by Xi Chen (Code Review) 01 Mar '21

01 Mar '21

Attention is currently required from: Xi Chen, Hung-Te Lin, Martin Roth. Hello Hung-Te Lin, build bot (Jenkins), Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/51125 to look at the new patch set (#3). Change subject: src/mediatek/mt8192: use Mediatek mt8192 vendor code(CB:50294) ...................................................................... src/mediatek/mt8192: use Mediatek mt8192 vendor code(CB:50294) Mediatek maintains the DRAM initialization code, the coding style is different from coreboot, when CB:50294 is ready, soc/mediatek/mt8192 will not be used. Signed-off-by: Xi Chen <xixi.chen(a)mediatek.com> Change-Id: I2b2f41d774c6b85f106867144fb0b29a4a1bdfcf --- R src/soc/mediatek/common/dpm.c A src/soc/mediatek/common/dram_init.c R src/soc/mediatek/common/dramc_param.c R src/soc/mediatek/common/include/soc/dpm.h R src/soc/mediatek/common/include/soc/dramc_param.h R src/soc/mediatek/common/include/soc/emi.h R src/soc/mediatek/common/memory.c M src/soc/mediatek/mt8192/Kconfig M src/soc/mediatek/mt8192/Makefile.inc D src/soc/mediatek/mt8192/dramc_ana_init_config.c D src/soc/mediatek/mt8192/dramc_dig_config.c D src/soc/mediatek/mt8192/dramc_dvfs.c D src/soc/mediatek/mt8192/dramc_pi_basic_api.c D src/soc/mediatek/mt8192/dramc_pi_calibration_api.c D src/soc/mediatek/mt8192/dramc_pi_main.c D src/soc/mediatek/mt8192/dramc_power.c D src/soc/mediatek/mt8192/dramc_subsys_config.c D src/soc/mediatek/mt8192/dramc_tracking.c D src/soc/mediatek/mt8192/dramc_utility.c D src/soc/mediatek/mt8192/emi.c D src/soc/mediatek/mt8192/include/soc/dramc_ac_timing.h D src/soc/mediatek/mt8192/include/soc/dramc_common_mt8192.h A src/soc/mediatek/mt8192/include/soc/dramc_mt8192.h D src/soc/mediatek/mt8192/include/soc/dramc_pi_api.h D src/soc/mediatek/mt8192/include/soc/dramc_power.h D src/soc/mediatek/mt8192/include/soc/dramc_register.h D src/soc/mediatek/mt8192/include/soc/dramc_register_bits_def.h M src/vendorcode/Makefile.inc 28 files changed, 165 insertions(+), 19,568 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/51125/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/51125 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2b2f41d774c6b85f106867144fb0b29a4a1bdfcf Gerrit-Change-Number: 51125 Gerrit-PatchSet: 3 Gerrit-Owner: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/intel/shadowmountain: Add Cr50 support
by Angel Pons (Code Review) 01 Mar '21

01 Mar '21

Attention is currently required from: Aamir Bohra. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51086 ) Change subject: mb/intel/shadowmountain: Add Cr50 support ...................................................................... Patch Set 3: (1 comment) File src/mainboard/intel/shadowmountain/variants/baseboard/early_gpio.c: https://review.coreboot.org/c/coreboot/+/51086/comment/ac10a206_3c7b60f0 PS2, Line 26: H1_PCH_INT_ODL > the functionality remains same.. […] Ack. I can't check as I don't have the schematics for Shadow Mountain -- To view, visit https://review.coreboot.org/c/coreboot/+/51086 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I33f7427d1675190f65acf14679be93546e6db69a Gerrit-Change-Number: 51086 Gerrit-PatchSet: 3 Gerrit-Owner: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Comment-Date: Mon, 01 Mar 2021 09:59:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: vendor: mediatek: Add mediatek mt8192 dram initialization codes
by Hung-Te Lin (Code Review) 01 Mar '21

01 Mar '21

Attention is currently required from: Xi Chen, Nico Huber, Martin Roth, Paul Menzel, Yu-Ping Wu. Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50294 ) Change subject: vendor: mediatek: Add mediatek mt8192 dram initialization codes ...................................................................... Patch Set 11: (1 comment) File src/vendorcode/Makefile.inc: https://review.coreboot.org/c/coreboot/+/50294/comment/541715f2_39aee0fd PS8, Line 7: # > For build pass because coreboot soc dram calibration code already exists, will enable when vendorcod […] If that's the case, I'd prefer adding a new Kconfig, say MEDIATEK_VENDOR_DRAM_CALIBRATION or MEDIATE_EMI_TIMING_TUNING, and turn on that option later when we remove SOC code. Or, you can postpone adding the Makefile in mt8192 folder. -- To view, visit https://review.coreboot.org/c/coreboot/+/50294 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3853204578069c6abf52689ea6f5d88841414bd4 Gerrit-Change-Number: 50294 Gerrit-PatchSet: 11 Gerrit-Owner: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Cindy Ching <cindy.ching(a)mediatek.corp-partner.google.com> Gerrit-CC: Joel Kitching <kitching(a)google.com> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Stefan Reinauer <reinauer(a)chromium.org> Gerrit-CC: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-CC: Yidi Lin <yidi.lin(a)mediatek.com> Gerrit-CC: Yidi Lin <yidi.lin(a)mediatek.corp-partner.google.com> Gerrit-Attention: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Mon, 01 Mar 2021 09:58:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Xi Chen <xixi.chen(a)mediatek.com> Comment-In-Reply-To: Hung-Te Lin <hungte(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/intel/shadowmountain: Add Cr50 support
by Aamir Bohra (Code Review) 01 Mar '21

01 Mar '21

Attention is currently required from: Angel Pons. Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51086 ) Change subject: mb/intel/shadowmountain: Add Cr50 support ...................................................................... Patch Set 3: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/51086/comment/aefea88e_9360251f PS2, Line 7: sm > nit: I would not shorten `shadowmountain` Done File src/mainboard/intel/shadowmountain/variants/baseboard/early_gpio.c: https://review.coreboot.org/c/coreboot/+/51086/comment/ef484e9c_e9befcbb PS2, Line 26: H1_PCH_INT_ODL > Should these comments be updated? the functionality remains same..just added a pull up -- To view, visit https://review.coreboot.org/c/coreboot/+/51086 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I33f7427d1675190f65acf14679be93546e6db69a Gerrit-Change-Number: 51086 Gerrit-PatchSet: 3 Gerrit-Owner: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Mon, 01 Mar 2021 09:58:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/intel/shadowmountain: Add Cr50 support
by Aamir Bohra (Code Review) 01 Mar '21

01 Mar '21

Attention is currently required from: Aamir Bohra. Hello build bot (Jenkins), Angel Pons, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/51086 to look at the new patch set (#3). Change subject: mb/intel/shadowmountain: Add Cr50 support ...................................................................... mb/intel/shadowmountain: Add Cr50 support Add Cr50 support over GSPI0. Change-Id: I33f7427d1675190f65acf14679be93546e6db69a Signed-off-by: Aamir Bohra <aamir.bohra(a)intel.com> --- M src/mainboard/intel/shadowmountain/Kconfig M src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb M src/mainboard/intel/shadowmountain/variants/baseboard/early_gpio.c M src/mainboard/intel/shadowmountain/variants/baseboard/gpio.c 4 files changed, 19 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/51086/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/51086 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I33f7427d1675190f65acf14679be93546e6db69a Gerrit-Change-Number: 51086 Gerrit-PatchSet: 3 Gerrit-Owner: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-MessageType: newpatchset

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coreboot-gerrit March 2021