coreboot-gerrit March 2021

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Change in coreboot[master]: tests: Add lib/compute_ip_checksum-test test case
by Name of user not set (Code Review) 01 Mar '21

01 Mar '21

Attention is currently required from: Martin Roth. Hello build bot (Jenkins), Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/51089 to look at the new patch set (#2). Change subject: tests: Add lib/compute_ip_checksum-test test case ...................................................................... tests: Add lib/compute_ip_checksum-test test case Signed-off-by: Jakub Czapiga <jacz(a)semihalf.com> Change-Id: I61c578ec93837cb2581a1ab9e2f3db2a0dd69f3d --- M tests/lib/Makefile.inc A tests/lib/compute_ip_checksum-test.c 2 files changed, 106 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/51089/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/51089 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I61c578ec93837cb2581a1ab9e2f3db2a0dd69f3d Gerrit-Change-Number: 51089 Gerrit-PatchSet: 2 Gerrit-Owner: jacz(a)semihalf.com Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: tests: Add lib/crc_byte-test test case
by Name of user not set (Code Review) 01 Mar '21

01 Mar '21

Attention is currently required from: Martin Roth. Hello build bot (Jenkins), Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/51088 to look at the new patch set (#2). Change subject: tests: Add lib/crc_byte-test test case ...................................................................... tests: Add lib/crc_byte-test test case Signed-off-by: Jakub Czapiga <jacz(a)semihalf.com> Change-Id: I9016cd7825cb681fd200b23dd362ca24acf69192 --- M tests/lib/Makefile.inc A tests/lib/crc_byte-test.c 2 files changed, 301 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/51088/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/51088 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9016cd7825cb681fd200b23dd362ca24acf69192 Gerrit-Change-Number: 51088 Gerrit-PatchSet: 2 Gerrit-Owner: jacz(a)semihalf.com Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: vendor: mediatek: Add mediatek mt8192 dram initialization codes
by Paul Menzel (Code Review) 01 Mar '21

01 Mar '21

Attention is currently required from: Xi Chen, Hung-Te Lin, Nico Huber, Martin Roth, Yu-Ping Wu. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50294 ) Change subject: vendor: mediatek: Add mediatek mt8192 dram initialization codes ...................................................................... Patch Set 13: (1 comment) Patchset: PS13: Please also update the file `MAINTAINERS`. -- To view, visit https://review.coreboot.org/c/coreboot/+/50294 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3853204578069c6abf52689ea6f5d88841414bd4 Gerrit-Change-Number: 50294 Gerrit-PatchSet: 13 Gerrit-Owner: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Cindy Ching <cindy.ching(a)mediatek.corp-partner.google.com> Gerrit-CC: Joel Kitching <kitching(a)google.com> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Stefan Reinauer <reinauer(a)chromium.org> Gerrit-CC: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-CC: Yidi Lin <yidi.lin(a)mediatek.com> Gerrit-CC: Yidi Lin <yidi.lin(a)mediatek.corp-partner.google.com> Gerrit-Attention: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Mon, 01 Mar 2021 10:49:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: src/mediatek/mt8192: use Mediatek mt8192 vendor code(CB:50294)
by Paul Menzel (Code Review) 01 Mar '21

01 Mar '21

Attention is currently required from: Xi Chen, Hung-Te Lin, Martin Roth. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51125 ) Change subject: src/mediatek/mt8192: use Mediatek mt8192 vendor code(CB:50294) ...................................................................... Patch Set 3: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/51125/comment/53422ae1_79d8ee48 PS3, Line 7: src/mediatek/mt8192: use Mediatek mt8192 vendor code(CB:50294) Please add a space before the (. -- To view, visit https://review.coreboot.org/c/coreboot/+/51125 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2b2f41d774c6b85f106867144fb0b29a4a1bdfcf Gerrit-Change-Number: 51125 Gerrit-PatchSet: 3 Gerrit-Owner: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Comment-Date: Mon, 01 Mar 2021 10:47:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: fix: gemini lake device id is LPC
by Name of user not set (Code Review) 01 Mar '21

01 Mar '21

coreboot(a)s.paape.io has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/40755 ) Change subject: fix: gemini lake device id is LPC ...................................................................... fix: gemini lake device id is LPC Change-Id: If6a22a28f2a4ca1f984b669b00bc0c07f5588328 --- M util/inteltool/gpio.c M util/inteltool/inteltool.c M util/inteltool/inteltool.h M util/inteltool/pcr.c 4 files changed, 4 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/40755/1 diff --git a/util/inteltool/gpio.c b/util/inteltool/gpio.c index 471485c..e11d848 100644 --- a/util/inteltool/gpio.c +++ b/util/inteltool/gpio.c @@ -1035,7 +1035,7 @@ case PCI_DEVICE_ID_INTEL_QM170: case PCI_DEVICE_ID_INTEL_HM170: case PCI_DEVICE_ID_INTEL_CM236: - case PCI_DEVICE_ID_INTEL_GLK: + case PCI_DEVICE_ID_INTEL_GLK_LPC: case PCI_DEVICE_ID_INTEL_APL_LPC: case PCI_DEVICE_ID_INTEL_DNV_LPC: case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_PRE: diff --git a/util/inteltool/inteltool.c b/util/inteltool/inteltool.c index a4bfdcb..475f701 100644 --- a/util/inteltool/inteltool.c +++ b/util/inteltool/inteltool.c @@ -316,7 +316,7 @@ { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_C224, "C224"}, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_C226, "C226"}, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_H81, "H81"}, - { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_GLK, "Gemini Lake" }, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_GLK_LPC, "Gemini Lake" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_APL_LPC, "Apollo Lake" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_DNV_LPC, "Denverton" }, /* Intel GPUs */ diff --git a/util/inteltool/inteltool.h b/util/inteltool/inteltool.h index 9f5d8aa..9eff45d 100644 --- a/util/inteltool/inteltool.h +++ b/util/inteltool/inteltool.h @@ -267,7 +267,7 @@ #define PCI_DEVICE_ID_INTEL_BAYTRAIL_GFX 0x0f31 #define CPUID_BAYTRAIL 0x30670 -#define PCI_DEVICE_ID_INTEL_GLK 0x31e8 +#define PCI_DEVICE_ID_INTEL_GLK_LPC 0x31e8 #define PCI_DEVICE_ID_INTEL_APL_LPC 0x5ae8 #define PCI_DEVICE_ID_INTEL_DNV_LPC 0x19dc diff --git a/util/inteltool/pcr.c b/util/inteltool/pcr.c index 963a8b4..4733458 100644 --- a/util/inteltool/pcr.c +++ b/util/inteltool/pcr.c @@ -120,7 +120,7 @@ p2sb = pci_get_dev(sb->access, 0, 0, 0x1f, 1); break; case PCI_DEVICE_ID_INTEL_APL_LPC: - case PCI_DEVICE_ID_INTEL_GLK: + case PCI_DEVICE_ID_INTEL_GLK_LPC: p2sb = pci_get_dev(sb->access, 0, 0, 0x0d, 0); break; case PCI_DEVICE_ID_INTEL_H310: -- To view, visit https://review.coreboot.org/c/coreboot/+/40755 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If6a22a28f2a4ca1f984b669b00bc0c07f5588328 Gerrit-Change-Number: 40755 Gerrit-PatchSet: 1 Gerrit-Owner: coreboot(a)s.paape.io Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: util/inteltool: Add support for GLK
by Paul Menzel (Code Review) 01 Mar '21

01 Mar '21

Attention is currently required from: Igor Bagnucki, Stefan Reinauer, Name of user not set #1003165, Piotr Król. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51130 ) Change subject: util/inteltool: Add support for GLK ...................................................................... Patch Set 3: Code-Review+1 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/51130/comment/0b502c51_97ffb32a PS3, Line 8: Nice. Thank you. 1. Please add the datasheet name and revision you used for this. 2. Could you also please add the board you tested this on? -- To view, visit https://review.coreboot.org/c/coreboot/+/51130 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I017789c9e23e355214deced29efcb3532c449981 Gerrit-Change-Number: 51130 Gerrit-PatchSet: 3 Gerrit-Owner: Name of user not set #1003165 Gerrit-Reviewer: Igor Bagnucki <igor.bagnucki(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Igor Bagnucki <igor.bagnucki(a)3mdeb.com> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Name of user not set #1003165 Gerrit-Attention: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Comment-Date: Mon, 01 Mar 2021 10:46:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/intel/shadowmountain: Add Cr50 support
by Paul Menzel (Code Review) 01 Mar '21

01 Mar '21

Attention is currently required from: Aamir Bohra. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51086 ) Change subject: mb/intel/shadowmountain: Add Cr50 support ...................................................................... Patch Set 3: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/51086/comment/37283b16_f69d5c68 PS3, Line 9: Add Cr50 support over GSPI0. Maybe also mention the GPIO here. https://review.coreboot.org/c/coreboot/+/51086/comment/c0936f4a_638e7ff4 PS3, Line 10: Tested how? -- To view, visit https://review.coreboot.org/c/coreboot/+/51086 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I33f7427d1675190f65acf14679be93546e6db69a Gerrit-Change-Number: 51086 Gerrit-PatchSet: 3 Gerrit-Owner: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Comment-Date: Mon, 01 Mar 2021 10:44:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/intel/shadowmountain: Enable Type-C subsystem
by Paul Menzel (Code Review) 01 Mar '21

01 Mar '21

Attention is currently required from: V Sowmya, Subrata Banik. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51026 ) Change subject: mb/intel/shadowmountain: Enable Type-C subsystem ...................................................................... Patch Set 5: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/51026/comment/00cbfac4_d076eda9 PS5, Line 12: verify the TCSS functionality It’d be great, if you were more specific. What devices, what commands? -- To view, visit https://review.coreboot.org/c/coreboot/+/51026 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ieaf1170ca718a14d24b773a4a85516e0bbfbb569 Gerrit-Change-Number: 51026 Gerrit-PatchSet: 5 Gerrit-Owner: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: V Sowmya <v.sowmya(a)intel.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Comment-Date: Mon, 01 Mar 2021 10:42:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/i2c: sx9310: Use open source variables
by Paul Menzel (Code Review) 01 Mar '21

01 Mar '21

Attention is currently required from: Tim Wawrzynczak, Angel Pons, Julius Werner, Gwendal Grignou. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50210 ) Change subject: drivers/i2c: sx9310: Use open source variables ...................................................................... Patch Set 4: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/50210/comment/7a52ac80_5bfd5f8c PS4, Line 7: drivers/i2c: sx9310: Use open source variables Maybe: > Replace register map with descriptive names -- To view, visit https://review.coreboot.org/c/coreboot/+/50210 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8d1c81b56eaeef1dbb0f73c1d74c3a20e8b2fd7b Gerrit-Change-Number: 50210 Gerrit-PatchSet: 4 Gerrit-Owner: Gwendal Grignou <gwendal(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Gwendal Grignou <gwendal(a)chromium.org> Gerrit-Comment-Date: Mon, 01 Mar 2021 10:41:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/rockchip/rk3399/sdram: Introduce pctl_start
by Paul Menzel (Code Review) 01 Mar '21

01 Mar '21

Attention is currently required from: Julius Werner, Moritz Fischer. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51129 ) Change subject: soc/rockchip/rk3399/sdram: Introduce pctl_start ...................................................................... Patch Set 1: Code-Review+1 (2 comments) File src/soc/rockchip/rk3399/sdram.c: https://review.coreboot.org/c/coreboot/+/51129/comment/a6f7004e_36b2d4d2 PS1, Line 355: channel); It’d be great if you added, that it failed after 100 ms. https://review.coreboot.org/c/coreboot/+/51129/comment/0235cb4f_b8146240 PS1, Line 358: } When stopping the time, I find it always nice to also add a debug or spew message, printing the time after the operation was completed. -- To view, visit https://review.coreboot.org/c/coreboot/+/51129 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idcea403218ba96ec48c889709b73df4e8882d825 Gerrit-Change-Number: 51129 Gerrit-PatchSet: 1 Gerrit-Owner: Moritz Fischer <moritzf(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Moritz Fischer <moritzf(a)google.com> Gerrit-Comment-Date: Mon, 01 Mar 2021 10:38:15 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit March 2021