coreboot-gerrit February 2021

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Change in coreboot[master]: soc/amd/picasso/fch.c: Remove unused <acpi/acpi_pm.h>
by Felix Held (Code Review) 01 Feb '21

01 Feb '21

Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50165 ) Change subject: soc/amd/picasso/fch.c: Remove unused <acpi/acpi_pm.h> ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: you made sure that removing this won't cause issues with Kyösti's ACPI rework that's only partially landed in upstream coreboot? -- To view, visit https://review.coreboot.org/c/coreboot/+/50165 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5fea31f5893227a3e076c83a1759d3795b68c943 Gerrit-Change-Number: 50165 Gerrit-PatchSet: 2 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 01 Feb 2021 17:53:32 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/picasso/fch.c: Remove unused <acpi/acpi_pm.h>
by Martin Roth (Code Review) 01 Feb '21

01 Feb '21

Martin Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/50165 ) Change subject: soc/amd/picasso/fch.c: Remove unused <acpi/acpi_pm.h> ...................................................................... soc/amd/picasso/fch.c: Remove unused <acpi/acpi_pm.h> Change-Id: I5fea31f5893227a3e076c83a1759d3795b68c943 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50165 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Raul Rangel <rrangel(a)chromium.org> --- M src/soc/amd/picasso/fch.c 1 file changed, 0 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Raul Rangel: Looks good to me, approved diff --git a/src/soc/amd/picasso/fch.c b/src/soc/amd/picasso/fch.c index 22fa2ed..fa99db8 100644 --- a/src/soc/amd/picasso/fch.c +++ b/src/soc/amd/picasso/fch.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <acpi/acpi_pm.h> #include <console/console.h> #include <device/mmio.h> #include <bootstate.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/50165 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5fea31f5893227a3e076c83a1759d3795b68c943 Gerrit-Change-Number: 50165 Gerrit-PatchSet: 2 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: hatch: Update fan and thermal settings for ambassador
by Neill Corlett (Code Review) 01 Feb '21

01 Feb '21

Attention is currently required from: Furquan Shaikh. Neill Corlett has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50100 ) Change subject: hatch: Update fan and thermal settings for ambassador ...................................................................... Patch Set 3: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/50100/comment/3d7896d6_af8c3d2b PS2, Line 7: hatch: Update fan and thermal settings for ambassador, per recommendations from Quanta. > Commit message guidelines: https://www.coreboot. […] Updated word wrapping; please let me know if I need to remove the CrOS-specific metadata as well -- To view, visit https://review.coreboot.org/c/coreboot/+/50100 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I080859f872caf696f0c085defb8372de658da58a Gerrit-Change-Number: 50100 Gerrit-PatchSet: 3 Gerrit-Owner: Neill Corlett <corlett(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Joe Tessler <jrt(a)google.com> Gerrit-CC: Matthew Ziegelbaum <ziegs(a)google.com> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Comment-Date: Mon, 01 Feb 2021 17:37:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: hatch: Update fan and thermal settings for ambassador
by Neill Corlett (Code Review) 01 Feb '21

01 Feb '21

Attention is currently required from: Neill Corlett. Hello build bot (Jenkins), Furquan Shaikh, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/50100 to look at the new patch set (#3). Change subject: hatch: Update fan and thermal settings for ambassador ...................................................................... hatch: Update fan and thermal settings for ambassador Update fan and thermal settings for ambassador, per recommendations from Quanta. BUG=b:177765580 TEST=Built AP firmware Change-Id: I080859f872caf696f0c085defb8372de658da58a Signed-off-by: Neill Corlett <corlett(a)google.com> --- M src/mainboard/google/hatch/variants/ambassador/overridetree.cb 1 file changed, 8 insertions(+), 9 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/50100/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/50100 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I080859f872caf696f0c085defb8372de658da58a Gerrit-Change-Number: 50100 Gerrit-PatchSet: 3 Gerrit-Owner: Neill Corlett <corlett(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Joe Tessler <jrt(a)google.com> Gerrit-CC: Matthew Ziegelbaum <ziegs(a)google.com> Gerrit-Attention: Neill Corlett <corlett(a)google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: hatch: Modify genesis PcieClkSrc settings
by Neill Corlett (Code Review) 01 Feb '21

01 Feb '21

Attention is currently required from: Furquan Shaikh. Neill Corlett has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50101 ) Change subject: hatch: Modify genesis PcieClkSrc settings ...................................................................... Patch Set 2: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/50101/comment/1af6d09d_cff95bd4 PS1, Line 7: Modify genesis PcieClkSrc settings to work around issue with Longsys SSD, per recommendations from Quanta. > Commit message guidelines: https://www.coreboot. […] Updated word wrapping; please let me know if I need to remove the CrOS-specific metadata as well File src/mainboard/google/hatch/variants/genesis/overridetree.cb: https://review.coreboot.org/c/coreboot/+/50101/comment/711eb6b4_40a1ee20 PS1, Line 217: #register "PcieClkSrcUsage[1]" = "10" : #register "PcieClkSrcClkReq[1]" = "1" > Is there an external clock being used? The comment on line 216 isn't correct anymore. […] Presumably there's an external clock. I'm relaying this patch from Quanta, who were able to get a Longsys SSD working on the NVMe port with this change plus another change to ME firmware. I've dropped the lines and the inaccurate comment. -- To view, visit https://review.coreboot.org/c/coreboot/+/50101 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I30c2179be9b9ddd50168a7f35be800e969800e10 Gerrit-Change-Number: 50101 Gerrit-PatchSet: 2 Gerrit-Owner: Neill Corlett <corlett(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Joe Tessler <jrt(a)google.com> Gerrit-CC: Matthew Ziegelbaum <ziegs(a)google.com> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Comment-Date: Mon, 01 Feb 2021 17:33:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: hatch: Modify genesis PcieClkSrc settings
by Neill Corlett (Code Review) 01 Feb '21

01 Feb '21

Attention is currently required from: Neill Corlett. Hello build bot (Jenkins), Furquan Shaikh, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/50101 to look at the new patch set (#2). Change subject: hatch: Modify genesis PcieClkSrc settings ...................................................................... hatch: Modify genesis PcieClkSrc settings Modify PcieClkSrc settings to work around issue with Longsys SSD, per recommendations from Quanta. BUG=b:177752570 TEST=emerge-ambassador coreboot Change-Id: I30c2179be9b9ddd50168a7f35be800e969800e10 Signed-off-by: Neill Corlett <corlett(a)google.com> --- M src/mainboard/google/hatch/variants/genesis/overridetree.cb 1 file changed, 0 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/50101/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/50101 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I30c2179be9b9ddd50168a7f35be800e969800e10 Gerrit-Change-Number: 50101 Gerrit-PatchSet: 2 Gerrit-Owner: Neill Corlett <corlett(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Joe Tessler <jrt(a)google.com> Gerrit-CC: Matthew Ziegelbaum <ziegs(a)google.com> Gerrit-Attention: Neill Corlett <corlett(a)google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: drivers/aspeed: Fix some issues
by Arthur Heymans (Code Review) 01 Feb '21

01 Feb '21

Attention is currently required from: Patrick Rudolph. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50195 ) Change subject: drivers/aspeed: Fix some issues ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/50195 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2a99712a562a57c65f1cd0df7b1d7606681afe9b Gerrit-Change-Number: 50195 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Comment-Date: Mon, 01 Feb 2021 17:03:38 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/picasso/fch.c: Remove unused <acpi/acpi_pm.h>
by Raul Rangel (Code Review) 01 Feb '21

01 Feb '21

Attention is currently required from: Jason Glenesk, Marshall Dawson, HAOUAS Elyes, Felix Held. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50165 ) Change subject: soc/amd/picasso/fch.c: Remove unused <acpi/acpi_pm.h> ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/50165 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5fea31f5893227a3e076c83a1759d3795b68c943 Gerrit-Change-Number: 50165 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 01 Feb 2021 16:37:57 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: [WIP]soc/amd/cezanne: Add an function to select eSPI channel
by Raul Rangel (Code Review) 01 Feb '21

01 Feb '21

Attention is currently required from: Bao Zheng, Jason Glenesk, Marshall Dawson, Zheng Bao, Felix Held. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50187 ) Change subject: [WIP]soc/amd/cezanne: Add an function to select eSPI channel ...................................................................... Patch Set 1: (1 comment) File src/soc/amd/cezanne/early_fch.c: https://review.coreboot.org/c/coreboot/+/50187/comment/6b028473_98cf397d PS1, Line 19: espi_mux_chan0 not sure how I feel about hiding GPIO pin definitions in source files. I feel like these should be defined in the mainboard gpio.c file. Maybe you can provide a macro to include in the bootblock GPIO table that sets up the eSPI pins? -- To view, visit https://review.coreboot.org/c/coreboot/+/50187 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic110971051a25ab129608b80f8bd3395397e74ae Gerrit-Change-Number: 50187 Gerrit-PatchSet: 1 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Zheng Bao Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 01 Feb 2021 16:34:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/cezanne: Enable early LPC support in bootblock stage
by Felix Held (Code Review) 01 Feb '21

01 Feb '21

Attention is currently required from: Bao Zheng, Jason Glenesk, Marshall Dawson, Zheng Bao. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49929 ) Change subject: soc/amd/cezanne: Enable early LPC support in bootblock stage ...................................................................... Patch Set 9: (1 comment) Patchset: PS9: please address the remaining comments -- To view, visit https://review.coreboot.org/c/coreboot/+/49929 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I739d97ddc5afd84a4bbc7e505b423158eb820767 Gerrit-Change-Number: 49929 Gerrit-PatchSet: 9 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Zheng Bao Gerrit-Comment-Date: Mon, 01 Feb 2021 16:31:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit February 2021