coreboot-gerrit February 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: mb/google/volteer: Change cTDP level to level 2 (15W)
by Derek Huang (Code Review) 03 Feb '21

03 Feb '21

Attention is currently required from: Tim Wawrzynczak, Nick Vaccaro, Patrick Rudolph. Derek Huang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50105 ) Change subject: mb/google/volteer: Change cTDP level to level 2 (15W) ...................................................................... Patch Set 2: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/50105/comment/a5834665_f5d40cb5 PS2, Line 12: 4-2 > I dont' see Table 4-2, looks like Table 2? Not sure if I am referring to the latest version of EDS, I am referring to rev1.4, page 87. Table 4-2. TDP Specifications Patchset: PS2: > Derek, is there a bug for this? There is no bug for this, shall I create a bug? -- To view, visit https://review.coreboot.org/c/coreboot/+/50105 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4420a6a2e463b0a6bd7eb4b81f6a4fb975895ea3 Gerrit-Change-Number: 50105 Gerrit-PatchSet: 2 Gerrit-Owner: Derek Huang <derek.huang(a)intel.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 03 Feb 2021 06:37:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: coreboot_table: Drop <vboot/misc.h> include
by Kyösti Mälkki (Code Review) 03 Feb '21

03 Feb '21

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/50249 ) Change subject: coreboot_table: Drop <vboot/misc.h> include ...................................................................... coreboot_table: Drop <vboot/misc.h> include Could have been removed with commit 63b9700b2c already. Change-Id: Ie1083bce1794613c7dc683ae533e42fb5af39adf Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/lib/coreboot_table.c 1 file changed, 0 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/50249/1 diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c index e00c2a4..86e0606 100644 --- a/src/lib/coreboot_table.c +++ b/src/lib/coreboot_table.c @@ -20,7 +20,6 @@ #include <bootmem.h> #include <bootsplash.h> #include <spi_flash.h> -#include <security/vboot/misc.h> #include <security/vboot/vbnv_layout.h> #include <smmstore.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/50249 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie1083bce1794613c7dc683ae533e42fb5af39adf Gerrit-Change-Number: 50249 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: vc/../chromeos.asl: Drop CHROMEOS guard
by Kyösti Mälkki (Code Review) 03 Feb '21

03 Feb '21

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/50248 ) Change subject: vc/../chromeos.asl: Drop CHROMEOS guard ...................................................................... vc/../chromeos.asl: Drop CHROMEOS guard Coreboot proper now has a single include for this file with the guard around it already. Change-Id: Ice48a6af391170232a0319cc894bdb6c465c5143 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/vendorcode/google/chromeos/acpi/chromeos.asl 1 file changed, 0 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/50248/1 diff --git a/src/vendorcode/google/chromeos/acpi/chromeos.asl b/src/vendorcode/google/chromeos/acpi/chromeos.asl index 7642676..3f20662 100644 --- a/src/vendorcode/google/chromeos/acpi/chromeos.asl +++ b/src/vendorcode/google/chromeos/acpi/chromeos.asl @@ -2,8 +2,6 @@ #include <security/vboot/vbnv_layout.h> -#if CONFIG(CHROMEOS) - /* GPIO package generated at run time. */ External (OIPG) @@ -100,4 +98,3 @@ } #include "ramoops.asl" -#endif -- To view, visit https://review.coreboot.org/c/coreboot/+/50248 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ice48a6af391170232a0319cc894bdb6c465c5143 Gerrit-Change-Number: 50248 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/kukui: kakadu: update the initial code for BOE LCD
by Yu-Ping Wu (Code Review) 03 Feb '21

03 Feb '21

Attention is currently required from: Hung-Te Lin, Sunwei Li. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50215 ) Change subject: mb/google/kukui: kakadu: update the initial code for BOE LCD ...................................................................... Patch Set 3: Code-Review+2 (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/50215/comment/8b3f3806_4a15d994 PS1, Line 11: BUG=None : BRANCH=kukui : TEST=Update the initial code to fix BOE LCD image stricking. > Sounds like we'll have image issues without this patch. […] Done https://review.coreboot.org/c/coreboot/+/50215/comment/381a34d9_65ea7188 PS1, Line 13: Update the initial code to fix BOE LCD image stricking. > This field should describe how you tested the CL. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/50215 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibc1bd5147dbda4e3b94023e7ba52ff6a18abba0c Gerrit-Change-Number: 50215 Gerrit-PatchSet: 3 Gerrit-Owner: Sunwei Li <lisunwei(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Tao Xia <xiatao5(a)huaqin.corp-partner.google.com> Gerrit-CC: Xuxin Xiong <xuxinxiong(a)huaqin.corp-partner.google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Sunwei Li <lisunwei(a)huaqin.corp-partner.google.com> Gerrit-Comment-Date: Wed, 03 Feb 2021 06:19:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Hung-Te Lin <hungte(a)chromium.org> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/picasso: clean up and re-sort UPD table
by chris wang (Code Review) 03 Feb '21

03 Feb '21

Attention is currently required from: Frank Wu, Jason Glenesk, Raul Rangel, Marshall Dawson, Chris Wang, EricR Lai. chris wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50212 ) Change subject: soc/amd/picasso: clean up and re-sort UPD table ...................................................................... Patch Set 6: (1 comment) File src/soc/amd/picasso/chip.h: https://review.coreboot.org/c/coreboot/+/50212/comment/8bc25943_0ad04837 PS6, Line 257: /* bit vector of phy, bit0=1: DP0, bit1=1: DP1, bit2=1: DP2 bit3=1: DP3 */ : uint8_t edp_physel; > Not needed for this commit, but why not turn this into a macro? […] yea, it's more readable. add into task list. -- To view, visit https://review.coreboot.org/c/coreboot/+/50212 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I655af08e2f86398d088e30d330f49e71cf7e1275 Gerrit-Change-Number: 50212 Gerrit-PatchSet: 6 Gerrit-Owner: chris wang <Chris.Wang(a)amd.com> Gerrit-Reviewer: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-CC: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Attention: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Wed, 03 Feb 2021 06:12:15 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Martin Roth <martinroth(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/picasso: add UPD for USB3 phy setting adjust
by chris wang (Code Review) 03 Feb '21

03 Feb '21

Attention is currently required from: Martin Roth. chris wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50240 ) Change subject: soc/amd/picasso: add UPD for USB3 phy setting adjust ...................................................................... Patch Set 5: (4 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/50240/comment/247d5254_a8cbb92d PS4, Line 7: adjsut > *adjust* Done https://review.coreboot.org/c/coreboot/+/50240/comment/3d2578d5_88e118ec PS4, Line 12: 1. RX_EQ_DELTA_IQ_OVRD_VAL- Override value for rx_eq_delta_iq. Range 0-0xF : 2. RX_EQ_DELTA_IQ_OVRD_EN - Enable override value for rx_eq_delta_iq. Range 0-0x1 > Nit: Split these to 2 lines each? Done File src/soc/amd/picasso/fsp_params.c: https://review.coreboot.org/c/coreboot/+/50240/comment/c04f18c7_a5047a96 PS4, Line 130: cfg->usb3_phy_en > Don't you want to copy this too? It's in the UPD. Yes, I missed this one. https://review.coreboot.org/c/coreboot/+/50240/comment/921250da_22f9ce6d PS4, Line 131: memcpy(&scfg->usb_3_port0_phy_tune, &cfg->usb3_phy_tune_params[0], : sizeof(scfg->usb_3_port0_phy_tune[0])); > Is there a case where we might want to set the values for only one port or is it required that all 4 […] For the RX_EQ_DELTA_IQ_OVRD_VAL and RX_EQ_DELTA_IQ_OVRD_EN. it should able to set the values by port. but others will apply to all. The usb3_phy_en is a switch to enable the usb3 phy setting override. -- To view, visit https://review.coreboot.org/c/coreboot/+/50240 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1d5f69e840952cc5171af1ce8597628d1bede5cb Gerrit-Change-Number: 50240 Gerrit-PatchSet: 5 Gerrit-Owner: chris wang <Chris.Wang(a)amd.com> Gerrit-Reviewer: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Comment-Date: Wed, 03 Feb 2021 06:10:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Martin Roth <martinroth(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/picasso: add UPD for USB3 phy setting adjust
by chris wang (Code Review) 03 Feb '21

03 Feb '21

Attention is currently required from: chris wang. Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Marshall Dawson, Chris Wang, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/50240 to look at the new patch set (#5). Change subject: soc/amd/picasso: add UPD for USB3 phy setting adjust ...................................................................... soc/amd/picasso: add UPD for USB3 phy setting adjust add UPD for USB3 phy setting adjust Usb 3.1 PHY Parameters: 1. RX_EQ_DELTA_IQ_OVRD_VAL -Override value for rx_eq_delta_iq. Range 0-0xF 2. RX_EQ_DELTA_IQ_OVRD_EN -Enable override value for rx_eq_delta_iq. Range 0-0x1 3. Override value for rx_vref_ctrl. Range 0 - 0x1F 4. Enable override value for rx_vref_ctrl. Range 0 - 0x1 5. Override value for tx_vboost_lvl: 0 - 0x7. 6. Enable override value for tx_vboost_lvl. Range: 0 - 0x1 7. Override value for rx_vref_ctrl. Range 0 - 0x1F 8. Enable override value for rx_vref_ctrl. Range 0 - 0x1 9. Override value for tx_vboost_lvl: 0 - 0x7. 10. Enable override value for tx_vboost_lvl. Range: 0 - 0x1 BUG=b:175192931 TEST=Build Change-Id: I1d5f69e840952cc5171af1ce8597628d1bede5cb Signed-off-by: Chris Wang <chris.wang(a)amd.corp-partner.google.com> --- M src/soc/amd/picasso/chip.h M src/soc/amd/picasso/fsp_params.c M src/vendorcode/amd/fsp/picasso/FspsUpd.h 3 files changed, 65 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/50240/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/50240 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1d5f69e840952cc5171af1ce8597628d1bede5cb Gerrit-Change-Number: 50240 Gerrit-PatchSet: 5 Gerrit-Owner: chris wang <Chris.Wang(a)amd.com> Gerrit-Reviewer: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin Roth <martinroth(a)google.com> Gerrit-Attention: chris wang <Chris.Wang(a)amd.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: drivers/generic/bayhub_lv2: Add driver for BayHub lv2
by John Su (Code Review) 03 Feb '21

03 Feb '21

Attention is currently required from: Frank Wu, Furquan Shaikh, Martin Roth, Alan Lee, Angel Pons, Ivy Jian. John Su has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49783 ) Change subject: drivers/generic/bayhub_lv2: Add driver for BayHub lv2 ...................................................................... Patch Set 9: (3 comments) File src/drivers/generic/bayhub_lv2/chip.h: https://review.coreboot.org/c/coreboot/+/49783/comment/803319a8_02ff816a PS8, Line 5: PCI > PCIe? Done https://review.coreboot.org/c/coreboot/+/49783/comment/e3f067c6_64c2777f PS8, Line 7: /* 1 to enable power-saving mode, 0 to disable */ : bool power_saving; > I would rename the option to `enable_power_saving`, and drop the comment Done File src/drivers/generic/bayhub_lv2/lv2.h: https://review.coreboot.org/c/coreboot/+/49783/comment/b2ec8371_88d77bb3 PS8, Line 3: PCI > PCIe? Done -- To view, visit https://review.coreboot.org/c/coreboot/+/49783 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idc1340b1a6fe7063d16c8ea16488d6e2b8b308cc Gerrit-Change-Number: 49783 Gerrit-PatchSet: 9 Gerrit-Owner: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Reviewer: Alan Lee <alan_lee(a)compal.corp-partner.google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Ivy Jian <ivy_jian(a)compal.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Peichao Wang <pwang12(a)lenovo.corp-partner.google.com> Gerrit-Attention: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Alan Lee <alan_lee(a)compal.corp-partner.google.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Ivy Jian <ivy_jian(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Wed, 03 Feb 2021 05:37:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/zork/variants/vilboz: Enable BayHub lv2 driver
by John Su (Code Review) 03 Feb '21

03 Feb '21

Attention is currently required from: Frank Wu, John Su, Paul Menzel. Hello Frank Wu, build bot (Jenkins), Martin Roth, EricR Lai, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/49822 to look at the new patch set (#11). Change subject: mb/google/zork/variants/vilboz: Enable BayHub lv2 driver ...................................................................... mb/google/zork/variants/vilboz: Enable BayHub lv2 driver Enable this driver along with power saving. BUG=b:177955523 BRANCH=zork TEST=boot and see this message: BayHub LV2: Power-saving enabled 110102 Signed-off-by: John Su <john_su(a)compal.corp-partner.google.com> Change-Id: Icd87ea585dfaa2185abf1f7bf803e9c9a6e63972 --- M src/mainboard/google/zork/Kconfig M src/mainboard/google/zork/variants/vilboz/overridetree.cb 2 files changed, 7 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/49822/11 -- To view, visit https://review.coreboot.org/c/coreboot/+/49822 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icd87ea585dfaa2185abf1f7bf803e9c9a6e63972 Gerrit-Change-Number: 49822 Gerrit-PatchSet: 11 Gerrit-Owner: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Alan Lee <alan_lee(a)compal.corp-partner.google.com> Gerrit-CC: Ivy Jian <ivy_jian(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-Attention: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: drivers/generic/bayhub_lv2: Add driver for BayHub lv2
by John Su (Code Review) 03 Feb '21

03 Feb '21

Attention is currently required from: Frank Wu, John Su, Furquan Shaikh, Martin Roth, Alan Lee, Ivy Jian. Hello Frank Wu, build bot (Jenkins), Alan Lee, Patrick Georgi, Martin Roth, Angel Pons, Ivy Jian, EricR Lai, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/49783 to look at the new patch set (#9). Change subject: drivers/generic/bayhub_lv2: Add driver for BayHub lv2 ...................................................................... drivers/generic/bayhub_lv2: Add driver for BayHub lv2 Add a driver which puts the device into power-saving mode. BUG=b:177955523 BRANCH=zork TEST=boot and see this message: BayHub LV2: Power-saving enabled 110102 Signed-off-by: John Su <john_su(a)compal.corp-partner.google.com> Change-Id: Idc1340b1a6fe7063d16c8ea16488d6e2b8b308cc --- A src/drivers/generic/bayhub_lv2/Kconfig A src/drivers/generic/bayhub_lv2/Makefile.inc A src/drivers/generic/bayhub_lv2/chip.h A src/drivers/generic/bayhub_lv2/lv2.c A src/drivers/generic/bayhub_lv2/lv2.h M src/include/device/pci_ids.h 6 files changed, 124 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/49783/9 -- To view, visit https://review.coreboot.org/c/coreboot/+/49783 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idc1340b1a6fe7063d16c8ea16488d6e2b8b308cc Gerrit-Change-Number: 49783 Gerrit-PatchSet: 9 Gerrit-Owner: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Reviewer: Alan Lee <alan_lee(a)compal.corp-partner.google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Ivy Jian <ivy_jian(a)compal.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Peichao Wang <pwang12(a)lenovo.corp-partner.google.com> Gerrit-Attention: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-Attention: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Alan Lee <alan_lee(a)compal.corp-partner.google.com> Gerrit-Attention: Ivy Jian <ivy_jian(a)compal.corp-partner.google.com> Gerrit-MessageType: newpatchset

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coreboot-gerrit February 2021