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Change subject: soc/intel/braswell,skylake: Drop logo parameters from devicetree
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Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/50361/comment/bea6dfb0_e861fa58
PS1, Line 10:
nit: "at runtime"
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Change subject: soc/intel/braswell,skylake: Drop logo parameters from devicetree
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Patch Set 1: Code-Review+2
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Change subject: soc/amd/common/memmap: add comment about types in memmap_early_dram
......................................................................
Patch Set 2:
(1 comment)
File src/soc/amd/common/block/include/amdblocks/memmap.h:
https://review.coreboot.org/c/coreboot/+/50370/comment/28d679dc_b36462c0
PS1, Line 12: uintptr_t base;
> Interesting, noted.
i added a comment to the struct and kept is as it was before
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Change subject: [UNTESTED] soc/amd/common/gpio: add PAD_NF_SCI pad type
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
this is completely untested, but this should be the way to go to to get rid of the soc gpio hook doing unexpected things without breaking functionality
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Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/50373 )
Change subject: [UNTESTED] soc/amd/common/gpio: add PAD_NF_SCI pad type
......................................................................
[UNTESTED] soc/amd/common/gpio: add PAD_NF_SCI pad type
This is some preparation for CB:43049 to get rid of soc_gpio_hook.
Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de>
Change-Id: If0da5c010f35fd902f6b8857368daec93c12394a
---
M src/soc/amd/common/block/include/amdblocks/gpio_defs.h
1 file changed, 13 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/50373/1
diff --git a/src/soc/amd/common/block/include/amdblocks/gpio_defs.h b/src/soc/amd/common/block/include/amdblocks/gpio_defs.h
index f0c6f66..7dcbb43 100644
--- a/src/soc/amd/common/block/include/amdblocks/gpio_defs.h
+++ b/src/soc/amd/common/block/include/amdblocks/gpio_defs.h
@@ -166,11 +166,16 @@
* PAD_SCI The pin is a SCI source
* pin the pin to be programmed
* pull pull up, pull down or no pull
- * event trigger LEVEL_LOW, LEVEL_HIGH, EDGE_LOW, EDGE_HIGH
+ * event trigger LEVEL_LOW, LEVEL_HIGH, EDGE_LOW, EDGE_HIGH
* PAD_SMI The pin is a SMI source
* pin the pin to be programmed
* pull pull up, pull down or no pull
- * event trigger LEVEL_LOW, LEVEL_HIGH
+ * event trigger LEVEL_LOW, LEVEL_HIGH
+ * PAD_NF_SCI Define native alternate function and confiure SCI source
+ * pin the pin to be programmed
+ * function the native function
+ * pull pull up, pull down or no pull
+ * event trigger LEVEL_LOW, LEVEL_HIGH, EDGE_LOW, EDGE_HIGH
* PAD_WAKE The pin can wake, use after PAD_INT or PAD_SCI
* pin the pin to be programmed
* pull pull up, pull down or no pull
@@ -231,6 +236,12 @@
PAD_PULL(pull) | PAD_TRIGGER(LEVEL_HIGH), \
PAD_FLAG_EVENT_TRIGGER(trigger) | GPIO_FLAG_SMI)
+/* Native function + SCI pad configuration */
+#define PAD_NF_SCI(pin, func, pull, trigger) \
+ PAD_CFG_STRUCT_FLAGS(pin, pin ## _IOMUX_ ## func, \
+ PAD_PULL(pull), \
+ PAD_FLAG_EVENT_TRIGGER(trigger) | GPIO_FLAG_SCI)
+
/* WAKE pad configuration */
#define PAD_WAKE(pin, pull, trigger, type) \
PAD_CFG_STRUCT(pin, pin ## _IOMUX_GPIOxx, \
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