coreboot-gerrit December 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: mb/google/guybrush: Configure EN_SPKR GPIO in PSP verstage
by Raul Rangel (Code Review) 01 Dec '21

01 Dec '21

Attention is currently required from: Jon Murphy, Rob Barnes, Karthik Ramasubramanian. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59813 ) Change subject: mb/google/guybrush: Configure EN_SPKR GPIO in PSP verstage ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/59813 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9a52a167da9c7040731da5d355ec345fd9b13762 Gerrit-Change-Number: 59813 Gerrit-PatchSet: 1 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jon Murphy <jpmurphy(a)google.com> Gerrit-Attention: Rob Barnes <robbarnes(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Wed, 01 Dec 2021 21:14:14 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/gfx/generic: Add optional _HID for gfx devices
by Felix Held (Code Review) 01 Dec '21

01 Dec '21

Attention is currently required from: Tim Wawrzynczak, Rajat Jain. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59730 ) Change subject: drivers/gfx/generic: Add optional _HID for gfx devices ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/59730 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I32be4abf5c60be1f94aabaa2e9c734215c4e291e Gerrit-Change-Number: 59730 Gerrit-PatchSet: 2 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Rajat Jain <rajatja(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Rajat Jain <rajatja(a)google.com> Gerrit-Comment-Date: Wed, 01 Dec 2021 21:09:54 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: Documentation/coding_style.md: Avoid weakly linked symbols
by Julius Werner (Code Review) 01 Dec '21

01 Dec '21

Attention is currently required from: Paul Menzel, Angel Pons, Arthur Heymans. Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58934 ) Change subject: Documentation/coding_style.md: Avoid weakly linked symbols ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: > In case you're curious, CB:59768 is an example where using weak stubs is a bad idea. I'm not sure I really agree with your concerns there. You're just worried that someone would forget to override the weak symbol when they should have? But how does adding a Kconfig fix that? They might just as well forget to set that Kconfig and get the same result. I don't really think this poses any more of a risk than "someone might put the wrong bus number into Kconfig and then it's broken". At some point, you can't really prevent people from doing the wrong thing (and in this case, presumably someone would notice very quickly that their TPM communication doesn't work if that's a feature they care about... it doesn't really look like the silent, insidious kind of bug). I would say this is a gray area where either version works, but I don't think it's really an example of weak symbols having terrible consequences. -- To view, visit https://review.coreboot.org/c/coreboot/+/58934 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If70d38c5c646c1e8365bb16d3292cebb2787eba2 Gerrit-Change-Number: 58934 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Hung-Te Lin <hungte(a)chromium.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Wed, 01 Dec 2021 21:02:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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Change in coreboot[master]: rules.h, thread.h, lib/cbfs: Add ENV_STAGE_SUPPORTS_COOP
by Julius Werner (Code Review) 01 Dec '21

01 Dec '21

Attention is currently required from: Raul Rangel. Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59550 ) Change subject: rules.h, thread.h, lib/cbfs: Add ENV_STAGE_SUPPORTS_COOP ...................................................................... Patch Set 1: (1 comment) File src/include/rules.h: https://review.coreboot.org/c/coreboot/+/59550/comment/cb5fc146_9247d43f PS1, Line 306: ENV_ROMSTAGE > I just had another thought. This ENV_ is for COOP and not CBFS. […] I don't think it's a good idea to try to check if it was still the same device afterwards... that would just turn into a mess. It's also not really helpful, we don't want anything to preload data that it needs to throw away later, that's just a waste of time, we'd want to ensure it doesn't try to preload anything to begin with in that case. I agree it doesn't really belong here though, putting it in cbfs_preload() sounds good. -- To view, visit https://review.coreboot.org/c/coreboot/+/59550 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1197406d1d36391998b08e3076146bb2fff59d00 Gerrit-Change-Number: 59550 Gerrit-PatchSet: 1 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Comment-Date: Wed, 01 Dec 2021 20:44:02 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/guybrush: Configure EN_SPKR GPIO in PSP verstage
by Karthik Ramasubramanian (Code Review) 01 Dec '21

01 Dec '21

Karthik Ramasubramanian has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/59813 ) Change subject: mb/google/guybrush: Configure EN_SPKR GPIO in PSP verstage ...................................................................... mb/google/guybrush: Configure EN_SPKR GPIO in PSP verstage EN_SPKR GPIO is used as a multiplexer select signal between RAM_ID straps and Developer Mode Beep signals. During boot up it is LOW and selects RAM_ID straps. When the system enters OS, it is driven HIGH and selects DEV BEEP signals. Since in some boards, the GPIO chosen is in S5 domain it does not reset until the system enters mechanical off(G3) state. On scenarios where the power button is pressed when the system is in S5, incorrect RAM_ID strap is being read because the EN_SPKR is still selecting DEV BEEP signal. This causes boot up failures. Fix this by configuring the EN_SPKR GPIO(in S5 domain) explicitly in PSP verstage. BUG=b:204450368 TEST=Build and boot to OS in Guybrush. Perform suspend-resume cycle followed by a S5 -> S0 boot cycle for 2 iterations successfully. Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com> Change-Id: I9a52a167da9c7040731da5d355ec345fd9b13762 --- M src/mainboard/google/guybrush/variants/guybrush/gpio.c M src/mainboard/google/guybrush/variants/nipperkin/gpio.c 2 files changed, 4 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/59813/1 diff --git a/src/mainboard/google/guybrush/variants/guybrush/gpio.c b/src/mainboard/google/guybrush/variants/guybrush/gpio.c index fe2dcd1..0ebee22 100644 --- a/src/mainboard/google/guybrush/variants/guybrush/gpio.c +++ b/src/mainboard/google/guybrush/variants/guybrush/gpio.c @@ -42,6 +42,8 @@ }; static const struct soc_amd_gpio override_early_gpio_table[] = { + /* BID>=2: EN_SPKR to select RAM_ID input, BID < 2: Unused in later stages */ + PAD_GPO(GPIO_31, LOW), /* BID == 1: SD_AUX_RESET_L */ PAD_GPO(GPIO_70, LOW), }; diff --git a/src/mainboard/google/guybrush/variants/nipperkin/gpio.c b/src/mainboard/google/guybrush/variants/nipperkin/gpio.c index 00fd964..887be83 100644 --- a/src/mainboard/google/guybrush/variants/nipperkin/gpio.c +++ b/src/mainboard/google/guybrush/variants/nipperkin/gpio.c @@ -40,6 +40,8 @@ static const struct soc_amd_gpio override_early_gpio_table[] = { PAD_NC(GPIO_18), + /* BID==1: EN_SPKR to select RAM_ID input, BID >= 1: Unused in later stages */ + PAD_GPO(GPIO_31, LOW), }; static const struct soc_amd_gpio override_pcie_gpio_table[] = { -- To view, visit https://review.coreboot.org/c/coreboot/+/59813 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9a52a167da9c7040731da5d355ec345fd9b13762 Gerrit-Change-Number: 59813 Gerrit-PatchSet: 1 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: src/security/vboot: Set up secure counter space in TPM NVRAM
by Raul Rangel (Code Review) 01 Dec '21

01 Dec '21

Attention is currently required from: Andrey Pronin, Paul Menzel, Julius Werner, Yu-Ping Wu, Karthik Ramasubramanian. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59476 ) Change subject: src/security/vboot: Set up secure counter space in TPM NVRAM ...................................................................... Patch Set 7: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/59476 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I915fbdada60e242d911b748ad5dc28028de9b657 Gerrit-Change-Number: 59476 Gerrit-PatchSet: 7 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Andrey Pronin <apronin(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Andrey Pronin <apronin(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Andrey Pronin <apronin(a)google.com> Gerrit-Attention: Andrey Pronin <apronin(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Wed, 01 Dec 2021 19:41:57 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya: Update camera NVM parameters
by Bernardo Salvador Perez Priego (Code Review) 01 Dec '21

01 Dec '21

Attention is currently required from: Selma Bensaid, Paul Menzel, Bernardo Perez Priego, Andy Yeh, kiran2.kumar(a)intel.com, ShawnX Tu. Bernardo Salvador Perez Priego has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58374 ) Change subject: mb/google/brya: Update camera NVM parameters ...................................................................... Patch Set 7: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/58374/comment/5e435637_182e2d43 PS5, Line 9: Change HID name from INT3499 to PRP0001 along with size and : address width. > (I am denied access to that URL.) […] Done https://review.coreboot.org/c/coreboot/+/58374/comment/23554139_8d50cb39 PS5, Line 13: Test=Boot board, camera nvm parameters should be as expected. > Please amend the commit message. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/58374 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib2366ba4c8bb70d8cc82e64ca585b118a96260c0 Gerrit-Change-Number: 58374 Gerrit-PatchSet: 7 Gerrit-Owner: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Reviewer: Andy Yeh <andy.yeh(a)intel.com> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: ShawnX Tu <shawnx.tu(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: kiran2.kumar(a)intel.com Gerrit-CC: Bernardo Salvador Perez Priego <bernardospp(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Attention: Andy Yeh <andy.yeh(a)intel.com> Gerrit-Attention: kiran2.kumar(a)intel.com Gerrit-Attention: ShawnX Tu <shawnx.tu(a)intel.com> Gerrit-Comment-Date: Wed, 01 Dec 2021 19:09:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: ShawnX Tu <shawnx.tu(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya: Update camera NVM parameters
by Bernardo Perez Priego (Code Review) 01 Dec '21

01 Dec '21

Attention is currently required from: Selma Bensaid, Andy Yeh, kiran2.kumar(a)intel.com, ShawnX Tu. Hello build bot (Jenkins), Selma Bensaid, Tim Wawrzynczak, Andy Yeh, kiran2.kumar(a)intel.com, ShawnX Tu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/58374 to look at the new patch set (#7). Change subject: mb/google/brya: Update camera NVM parameters ...................................................................... mb/google/brya: Update camera NVM parameters Change HID name from INT3499 to PRP0001 along with size and address width. Size decreased from 10K to 2K, address width decreased from 14 to 8. BUG=b:203014972 Test= Boot board and issue commands: `cat /sys/bus/i2c/devices/i2c-PRP0001:01/eeprom > ./ov8856_eeprom_test.bin` `hexdump -C ov8856_eeprom_test.bin > ov8856_eeprom_dump.log` You should see the result in ov8856_eeprom_dump.log to be same as module nvm file by vendor provided or meet the Intel nvm calibration format. (e.g. first 4 bytes be 0x01, 0x03, 0x01, 0x00) Signed-off-by: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Change-Id: Ib2366ba4c8bb70d8cc82e64ca585b118a96260c0 --- M src/mainboard/google/brya/variants/brya0/overridetree.cb 1 file changed, 4 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/58374/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/58374 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib2366ba4c8bb70d8cc82e64ca585b118a96260c0 Gerrit-Change-Number: 58374 Gerrit-PatchSet: 7 Gerrit-Owner: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Reviewer: Andy Yeh <andy.yeh(a)intel.com> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: ShawnX Tu <shawnx.tu(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: kiran2.kumar(a)intel.com Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Attention: Andy Yeh <andy.yeh(a)intel.com> Gerrit-Attention: kiran2.kumar(a)intel.com Gerrit-Attention: ShawnX Tu <shawnx.tu(a)intel.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/brya: Update camera NVM parameters
by Bernardo Perez Priego (Code Review) 01 Dec '21

01 Dec '21

Attention is currently required from: Selma Bensaid, Bernardo Perez Priego, Andy Yeh, kiran2.kumar(a)intel.com, ShawnX Tu. Hello build bot (Jenkins), Selma Bensaid, Tim Wawrzynczak, Andy Yeh, kiran2.kumar(a)intel.com, ShawnX Tu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/58374 to look at the new patch set (#6). Change subject: mb/google/brya: Update camera NVM parameters ...................................................................... mb/google/brya: Update camera NVM parameters Change HID name from INT3499 to PRP0001 along with size and address width. BUG=b:203014972 Test= Boot board and issue commands: `cat /sys/bus/i2c/devices/i2c-PRP0001:01/eeprom > ./ov8856_eeprom_test.bin` `hexdump -C ov8856_eeprom_test.bin > ov8856_eeprom_dump.log` You should see the result in ov8856_eeprom_dump.log to be same as module nvm file by vendor provided or meet the Intel nvm calibration format. (e.g. first 4 bytes be 0x01, 0x03, 0x01, 0x00) Signed-off-by: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Change-Id: Ib2366ba4c8bb70d8cc82e64ca585b118a96260c0 --- M src/mainboard/google/brya/variants/brya0/overridetree.cb 1 file changed, 4 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/58374/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/58374 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib2366ba4c8bb70d8cc82e64ca585b118a96260c0 Gerrit-Change-Number: 58374 Gerrit-PatchSet: 6 Gerrit-Owner: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Reviewer: Andy Yeh <andy.yeh(a)intel.com> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: ShawnX Tu <shawnx.tu(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: kiran2.kumar(a)intel.com Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Attention: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Attention: Andy Yeh <andy.yeh(a)intel.com> Gerrit-Attention: kiran2.kumar(a)intel.com Gerrit-Attention: ShawnX Tu <shawnx.tu(a)intel.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/common: Add support for CSE IOM/NPHY sub-parition update
by Krishna P Bhat D (Code Review) 01 Dec '21

01 Dec '21

Attention is currently required from: Tim Wawrzynczak, Julius Werner, Sridhar Siricilla. Krishna P Bhat D has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59685 ) Change subject: soc/intel/common: Add support for CSE IOM/NPHY sub-parition update ...................................................................... Patch Set 13: (8 comments) Patchset: PS11: > Please be aware that the cbfs_locate_file_in_region() API is about to be deprecated (CB:59682) and s […] Do to urgency of this feature, we would like to update this in a subsequent patch, as it would require more testing. File src/soc/intel/common/block/cse/Makefile.inc: https://review.coreboot.org/c/coreboot/+/59685/comment/754b5eec_8e56b813 PS11, Line 110: > I think we should hash the IOM and NPHY binaries as well, just like we do for cse_rw These blobs are part of FW_MAIN_A/FW_MAIN_B/COREBOOT, they are verified by vboot. File src/soc/intel/common/block/cse/cse_lite.c: https://review.coreboot.org/c/coreboot/+/59685/comment/79a56568_a836511d PS11, Line 15: #define BPDT_HEADER_SZ sizeof(struct bpdt_header) : #define BPDT_ENTRY_SZ sizeof(struct bpdt_entry) : #define SUBPART_HEADER_SZ sizeof(struct subpart_hdr) : #define SUBPART_ENTRY_SZ sizeof(struct subpart_entry) : #define SUBPART_MANIFEST_HDR_SZ sizeof(struct subpart_entry_manifest_header) > line up the right sides please Done https://review.coreboot.org/c/coreboot/+/59685/comment/3283e37f_bef8c2b6 PS11, Line 768: > nit: remove the extra space Done https://review.coreboot.org/c/coreboot/+/59685/comment/b32be1e0_2027f6b7 PS11, Line 810: > nit: extra line Done https://review.coreboot.org/c/coreboot/+/59685/comment/b6e0788e_c89d9149 PS11, Line 975: int > `size_t` Done https://review.coreboot.org/c/coreboot/+/59685/comment/c2b913b2_ad6cb0f1 PS11, Line 975: 2 > `ARRAY_SIZE(cse_regions)` Done https://review.coreboot.org/c/coreboot/+/59685/comment/d32050e8_b4b0d603 PS11, Line 976: > nit: extra line Done -- To view, visit https://review.coreboot.org/c/coreboot/+/59685 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7c0cda51314c4f722f5432486a43e19b46f4b240 Gerrit-Change-Number: 59685 Gerrit-PatchSet: 13 Gerrit-Owner: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Kane Chen <kane.chen(a)intel.com> Gerrit-Reviewer: Marx Wang <marx.wang(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anfernee Chen <anfernee_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Comment-Date: Wed, 01 Dec 2021 18:56:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: comment

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coreboot-gerrit December 2021