coreboot-gerrit December 2021

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Change in coreboot[master]: mb/google/brya/var/primus: Fix PLD group order
by Scott Chao (Code Review) 07 Dec '21

07 Dec '21

Attention is currently required from: Tim Wawrzynczak. Scott Chao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59953 ) Change subject: mb/google/brya/var/primus: Fix PLD group order ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/59953 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If5ce6ca061d9d56ba0bbb1f157b2ba278d3fa9c3 Gerrit-Change-Number: 59953 Gerrit-PatchSet: 1 Gerrit-Owner: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-CC: Ariel Fang <ariel_fang(a)wistron.corp-partner.google.com> Gerrit-CC: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Tue, 07 Dec 2021 11:58:14 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/primus: Fix PLD group order
by Scott Chao (Code Review) 07 Dec '21

07 Dec '21

Scott Chao has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/59953 ) Change subject: mb/google/brya/var/primus: Fix PLD group order ...................................................................... mb/google/brya/var/primus: Fix PLD group order After CB:59401, PLD will add into ACPI table. It will cause DUT cannot boot into OS when PLD group increment is not correct. BUG=b:209568644 BRANCH=none TEST=build coreboot and system boot into OS. Signed-off-by: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Change-Id: If5ce6ca061d9d56ba0bbb1f157b2ba278d3fa9c3 --- M src/mainboard/google/brya/variants/primus/overridetree.cb M src/mainboard/google/brya/variants/primus4es/overridetree.cb 2 files changed, 4 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/59953/1 diff --git a/src/mainboard/google/brya/variants/primus/overridetree.cb b/src/mainboard/google/brya/variants/primus/overridetree.cb index 8424319..ef5ad98 100644 --- a/src/mainboard/google/brya/variants/primus/overridetree.cb +++ b/src/mainboard/google/brya/variants/primus/overridetree.cb @@ -322,7 +322,7 @@ chip drivers/usb/acpi register "desc" = ""USB3 Type-C Port C2 (MLB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" - register "group" = "ACPI_PLD_GROUP(3, 1)" + register "group" = "ACPI_PLD_GROUP(2, 1)" device ref tcss_usb3_port3 on end end end @@ -340,7 +340,7 @@ chip drivers/usb/acpi register "desc" = ""USB2 Type-C Port C2 (MLB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" - register "group" = "ACPI_PLD_GROUP(3, 1)" + register "group" = "ACPI_PLD_GROUP(2, 1)" device ref usb2_port3 on end end chip drivers/usb/acpi diff --git a/src/mainboard/google/brya/variants/primus4es/overridetree.cb b/src/mainboard/google/brya/variants/primus4es/overridetree.cb index c12939f..ce06d30 100644 --- a/src/mainboard/google/brya/variants/primus4es/overridetree.cb +++ b/src/mainboard/google/brya/variants/primus4es/overridetree.cb @@ -316,7 +316,7 @@ chip drivers/usb/acpi register "desc" = ""USB3 Type-C Port C2 (MLB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" - register "group" = "ACPI_PLD_GROUP(3, 1)" + register "group" = "ACPI_PLD_GROUP(2, 1)" device ref tcss_usb3_port3 on end end end @@ -334,7 +334,7 @@ chip drivers/usb/acpi register "desc" = ""USB2 Type-C Port C2 (MLB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" - register "group" = "ACPI_PLD_GROUP(3, 1)" + register "group" = "ACPI_PLD_GROUP(2, 1)" device ref usb2_port3 on end end chip drivers/usb/acpi -- To view, visit https://review.coreboot.org/c/coreboot/+/59953 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If5ce6ca061d9d56ba0bbb1f157b2ba278d3fa9c3 Gerrit-Change-Number: 59953 Gerrit-PatchSet: 1 Gerrit-Owner: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/intel/alderlake:[TEST_ONLY][NOT_FOR_MERGE] Run Mem Controller @ l...
by Sridhar Siricilla (Code Review) 07 Dec '21

07 Dec '21

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59862 to look at the new patch set (#5). Change subject: soc/intel/alderlake:[TEST_ONLY][NOT_FOR_MERGE] Run Mem Controller @ lowest frequency ...................................................................... soc/intel/alderlake:[TEST_ONLY][NOT_FOR_MERGE] Run Mem Controller @ lowest frequency Signed-off-by: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Change-Id: Ibbc591aff89e166bf90c0cec8bd308f8ea5a47dd --- M src/soc/intel/alderlake/romstage/fsp_params.c 1 file changed, 1 insertion(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/59862/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/59862 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibbc591aff89e166bf90c0cec8bd308f8ea5a47dd Gerrit-Change-Number: 59862 Gerrit-PatchSet: 5 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/octopus: add audio codec into SSFC support for ApelE
by Marco Chen (Code Review) 07 Dec '21

07 Dec '21

Attention is currently required from: Henry Sun, Paul2 Huang. Marco Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59856 ) Change subject: mb/google/octopus: add audio codec into SSFC support for ApelE ...................................................................... Patch Set 5: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/59856/comment/d879e641_ac0cec5f PS5, Line 7: add audio codec into SSFC support for ApelE We already have audio codec in SSFC so maybe this CL just `add ALC5682I-VS to be supported in the SSFC` https://review.coreboot.org/c/coreboot/+/59856/comment/cde73e72_11b9da26 PS5, Line 11: Define SSFC BIT9-11 for codec selection This CL didn't define SSFC bits but just add new codec support into existed bits. -- To view, visit https://review.coreboot.org/c/coreboot/+/59856 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I80be12d88e100ce8586371fc49b36447859e24f8 Gerrit-Change-Number: 59856 Gerrit-PatchSet: 5 Gerrit-Owner: Paul2 Huang <paul2_huang(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Marco Chen <marcochen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Henry Sun <henrysun(a)google.com> Gerrit-Attention: Paul2 Huang <paul2_huang(a)pegatron.corp-partner.google.com> Gerrit-Comment-Date: Tue, 07 Dec 2021 10:45:54 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/octopus: add audio codec into SSFC support for ApelE
by Marco Chen (Code Review) 07 Dec '21

07 Dec '21

Attention is currently required from: Henry Sun, Paul2 Huang. Marco Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59856 ) Change subject: mb/google/octopus: add audio codec into SSFC support for ApelE ...................................................................... Patch Set 5: (2 comments) Patchset: PS5: On the other hand, please split overridetree.cb to another CL since this one is common for baseboard level. File src/mainboard/google/octopus/mainboard.c: https://review.coreboot.org/c/coreboot/+/59856/comment/78afe6bc_f64cdc8f PS5, Line 212: if ((audio_dev->chip_ops == &drivers_i2c_generic_ops) && Could we category it with line 195 together since they all need to be drivers_i2c_generic_ops? -- To view, visit https://review.coreboot.org/c/coreboot/+/59856 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I80be12d88e100ce8586371fc49b36447859e24f8 Gerrit-Change-Number: 59856 Gerrit-PatchSet: 5 Gerrit-Owner: Paul2 Huang <paul2_huang(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Marco Chen <marcochen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Henry Sun <henrysun(a)google.com> Gerrit-Attention: Paul2 Huang <paul2_huang(a)pegatron.corp-partner.google.com> Gerrit-Comment-Date: Tue, 07 Dec 2021 10:42:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/corsola: revise GPIO set of NOR flash for kingler/krabby
by Paul Menzel (Code Review) 07 Dec '21

07 Dec '21

Attention is currently required from: Hung-Te Lin, Rex-BC Chen. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59945 ) Change subject: mb/google/corsola: revise GPIO set of NOR flash for kingler/krabby ...................................................................... Patch Set 5: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/59945/comment/e8381864_114029ec PS5, Line 7: for kingler/krabby Please put that in the prefix. -- To view, visit https://review.coreboot.org/c/coreboot/+/59945 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I031686ccddcf789f3fa966d113ee48949e454b8f Gerrit-Change-Number: 59945 Gerrit-PatchSet: 5 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Comment-Date: Tue, 07 Dec 2021 10:40:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/octopus/var/ampton: add touchscreen into SSFC support
by Marco Chen (Code Review) 07 Dec '21

07 Dec '21

Attention is currently required from: Henry Sun, Paul2 Huang. Marco Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59859 ) Change subject: mb/google/octopus/var/ampton: add touchscreen into SSFC support ...................................................................... Patch Set 8: (1 comment) File src/mainboard/google/octopus/variants/baseboard/include/baseboard/cbi_ssfc.h: https://review.coreboot.org/c/coreboot/+/59859/comment/42a4f103_4a4ef45c PS7, Line 44: SSFC_TOUCHSCREEN_ELAN9008, > Yes, ELAN9008 and ELAN0001 both are at same slave address (0x10) * Could you have them with different i2c slave address by either FW or HW strap pin? * Looks like ELAN0001 is in generic i2c driver but ELAN9008 is in hid over i2c so could you confirm kernel can not probe them correct and disable non-existed one? -- To view, visit https://review.coreboot.org/c/coreboot/+/59859 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie0919d40a6c39ffaed52bb9e24a3509eb353127c Gerrit-Change-Number: 59859 Gerrit-PatchSet: 8 Gerrit-Owner: Paul2 Huang <paul2_huang(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Marco Chen <marcochen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Henry Sun <henrysun(a)google.com> Gerrit-Attention: Paul2 Huang <paul2_huang(a)pegatron.corp-partner.google.com> Gerrit-Comment-Date: Tue, 07 Dec 2021 10:39:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul2 Huang <paul2_huang(a)pegatron.corp-partner.google.com> Comment-In-Reply-To: Marco Chen <marcochen(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/corsola: get SKU ID from EC (CBI)
by Paul Menzel (Code Review) 07 Dec '21

07 Dec '21

Attention is currently required from: Hung-Te Lin, Rex-BC Chen. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59944 ) Change subject: mb/google/corsola: get SKU ID from EC (CBI) ...................................................................... Patch Set 5: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/59944/comment/551b432c_622ce55f PS5, Line 9: Retrieve the SKU ID for Corsola via CBI interface. Please elaborate, that there are two IDs, and that the ID is logged to the console. -- To view, visit https://review.coreboot.org/c/coreboot/+/59944 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2888190d498df28b5ae13cf92cc41d088e8f8ee7 Gerrit-Change-Number: 59944 Gerrit-PatchSet: 5 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Comment-Date: Tue, 07 Dec 2021 10:39:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: [TESTME] sb/amd/pi/hudson/early_init: fix setting SPI_USE_SPI100 in S...
by Michał Żygowski (Code Review) 07 Dec '21

07 Dec '21

Attention is currently required from: Michał Kopeć, Felix Held. Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59934 ) Change subject: [TESTME] sb/amd/pi/hudson/early_init: fix setting SPI_USE_SPI100 in SPI100_ENABLE ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: SPIx20 register in BKDG describes only the bit0 (SPI100_ENABLE), the rest is reserved. It is still wise though to set only the known bits. MIchał, the flash used on apu2 can support 104MHz so the test would really be reliable if called hudson_set_spi(SPI_SPEED_100M, SPI_SPEED_100M, SPI_SPEED_100M, SPI_SPEED_100M); -- To view, visit https://review.coreboot.org/c/coreboot/+/59934 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifbd960a9509542b28f03326a3066995540260bef Gerrit-Change-Number: 59934 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 07 Dec 2021 10:38:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common: Not enable crashlog on all resets by default
by Curtis Chen (Code Review) 07 Dec '21

07 Dec '21

Curtis Chen has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/59952 ) Change subject: soc/intel/common: Not enable crashlog on all resets by default ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/59952 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ide994c8ddebcbc3645a169cfed76daee496070bb Gerrit-Change-Number: 59952 Gerrit-PatchSet: 1 Gerrit-Owner: Curtis Chen <curtis.chen(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: abandon

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coreboot-gerrit December 2021